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2022-10-05mailbox: qcom-ipcc: flag IRQ NO_THREADEric Chanudet1-1/+2
PREEMPT_RT forces qcom-ipcc's handler to be threaded with interrupts enabled, which triggers a warning in __handle_irq_event_percpu(): irq 173 handler irq_default_primary_handler+0x0/0x10 enabled interrupts WARNING: CPU: 0 PID: 77 at kernel/irq/handle.c:161 __handle_irq_event_percpu+0x4c4/0x4d0 Mark it IRQF_NO_THREAD to avoid running the handler in a threaded context with threadirqs or PREEMPT_RT enabled. Signed-off-by: Eric Chanudet <echanude@redhat.com> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05mailbox: pcc: Fix spelling mistake "Plaform" -> "Platform"Colin Ian King1-1/+1
There is a spelling mistake in a pr_err message. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05mailbox: bcm-ferxrm-mailbox: Fix error check for dma_map_sgJack Wang1-4/+4
dma_map_sg return 0 on error, fix the error check, and return -EIO to caller. Fixes: dbc049eee730 ("mailbox: Add driver for Broadcom FlexRM ring manager") Signed-off-by: Jack Wang <jinpu.wang@ionos.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock supportRobert Marko1-1/+1
IPQ8074 has the APSS clock controller utilizing the same register space as the APCS, so provide access to the APSS utilizing a child device like IPQ6018. IPQ6018 and IPQ8074 use the same controller and driver, so just utilize IPQ6018 match data for IPQ8074. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05mailbox: mpfs: account for mbox offsets while sendingConor Dooley1-4/+3
The mailbox offset is not only used for receiving messages, but it is also used by messages sent to the system controller by Linux that have a payload, such as the "digital signature service". It is also overloaded by certain other services (reprogramming of the FPGA fabric, see Link:) to have a meaning other than the offset the system controller should read from. When the driver was written, no such services of the latter type were in use & those of the former used an offset of zero so this has gone un-noticed. Link: https://www.microsemi.com/document-portal/doc_download/1245815-polarfire-fpga-and-polarfire-soc-fpga-system-services-user-guide # Section 5.2 Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05mailbox: mpfs: fix handling of the reg propertyConor Dooley1-10/+14
The "data" region of the PolarFire SoC's system controller mailbox is not one continuous register space - the system controller's QSPI sits between the control and data registers. Split the "data" reg into two parts: "data" & "control". Optionally get the "data" register address from the 3rd reg property in the devicetree & fall back to using the old base + MAILBOX_REG_OFFSET that the current code uses. Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05mailbox: imx: fix RST channel supportPeng Fan1-5/+5
Because IMX_MU_xCR_MAX was increased to 5, some mu cfgs were not updated to include the CR register. Add the missed CR register to xcr array. Fixes: 82ab513baed5 ("mailbox: imx: support RST channel") Reported-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Liu Ying <victor.liu@nxp.com> # i.MX8qm/qxp MEK boards boot Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-09-15mailbox: apple: Implement poll_data() operationHector Martin1-3/+33
This allows clients running in atomic context to poll for messages to arrive. Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-09-15mailbox: apple: Implement flush() operationHector Martin1-0/+27
This allows clients to use the atomic-safe mailbox API style. Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-08-08Merge tag 'mailbox-v5.20' of git://git.linaro.org/landing-teams/working/fujitsu/integrationLinus Torvalds2-17/+34
Pull mailbox updates from Jassi Brar: - mtk: - use rx_callback instead of cmdq_task_cb - qcom: - add syscon const - add SM6375 compatible - imx: - enable RST channel - clear pending irqs * tag 'mailbox-v5.20' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: imx: clear pending interrupts dt-bindings: mailbox: qcom-ipcc: Add SM6375 compatible mailbox: imx: support RST channel dt-bindings: mailbox: imx-mu: add RST channel dt-bindings: mailbox: qcom,apcs-kpss-global: Add syscon const for relevant entries mailbox: mtk-cmdq: Remove proprietary cmdq_task_cb
2022-08-03mailbox: imx: clear pending interruptsPeng Fan1-0/+11
During MU initialization, there maybe pending GSR and RSR pending interrupt, clear them to avoid unexpected kernel dump when requesting mailbox channel Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-08-02mailbox: imx: support RST channelPeng Fan1-6/+23
i.MX generic MU supports MU-A/B reset feature. When stop/start remotecore, MU is not reset. So when Linux stop remotecore, the MU-B side BCR may contain valid configuration, because MU-B is not reset. So when linux start Mcore again and notify Mcore, Mcore is not ready to handle MU interrupt and cause issues. So need reset MU when stop Mcore. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-08-02mailbox: mtk-cmdq: Remove proprietary cmdq_task_cbChun-Kuang Hu1-11/+0
rx_callback is a standard mailbox callback mechanism and could cover the function of proprietary cmdq_task_cb, so use the standard one instead of the proprietary one. Client driver has changed to use standard rx_callback, so remove proprietary cmdq_task_cb. Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-06-10treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)Thomas Gleixner1-12/+2
Based on the normalized pattern: this program is free software you can redistribute it and/or modify it under the terms of the gnu general public license as published by the free software foundation version 2 this program is distributed as is without any warranty of any kind whether express or implied without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal <allison@lohutok.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-24mailbox: qcom-ipcc: Fix -Wunused-function with CONFIG_PM_SLEEP=nNathan Chancellor1-1/+1
When CONFIG_PM_SLEEP is not set, there is a warning that qcom_ipcc_pm_resume() is unused: drivers/mailbox/qcom-ipcc.c:258:12: error: 'qcom_ipcc_pm_resume' defined but not used [-Werror=unused-function] 258 | static int qcom_ipcc_pm_resume(struct device *dev) | ^~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors Commit 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old ones") reworked the PM_OPS macros to avoid this problem. Use NOIRQ_SYSTEM_SLEEP_PM_OPS directly so that qcom_ipcc_pm_resume() always appears to be used to the compiler, even though it will be dead code eliminated in the !CONFIG_PM_SLEEP case. Fixes: c25f77899753 ("mailbox: qcom-ipcc: Log the pending interrupt during resume") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-23mailbox: forward the hrtimer if not queued and under a lockBjörn Ardö1-6/+13
This reverts commit c7dacf5b0f32957b24ef29df1207dc2cd8307743, "mailbox: avoid timer start from callback" The previous commit was reverted since it lead to a race that caused the hrtimer to not be started at all. The check for hrtimer_active() in msg_submit() will return true if the callback function txdone_hrtimer() is currently running. This function could return HRTIMER_NORESTART and then the timer will not be restarted, and also msg_submit() will not start the timer. This will lead to a message actually being submitted but no timer will start to check for its compleation. The original fix that added checking hrtimer_active() was added to avoid a warning with hrtimer_forward. Looking in the kernel another solution to avoid this warning is to check hrtimer_is_queued() before calling hrtimer_forward_now() instead. This however requires a lock so the timer is not started by msg_submit() inbetween this check and the hrtimer_forward() call. Fixes: c7dacf5b0f32 ("mailbox: avoid timer start from callback") Signed-off-by: Björn Ardö <bjorn.ardo@axis.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: qcom-ipcc: Log the pending interrupt during resumePrasad Sodagudi1-0/+23
Enable logging of the pending interrupt that triggered device wakeup. This logging information helps to debug IRQs that cause periodic device wakeups by printing the detailed information of pending IPCC interrupts. Scenario: Device wakeup caused by Modem crash Logs: qcom-ipcc mailbox: virq: 182 triggered client-id: 2; signal-id: 2 From the IPCC bindings it can further be understood that the client here is IPCC_CLIENT_MPSS and the signal was IPCC_MPROC_SIGNAL_SMP2P. Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Prasad Sodagudi <quic_psodagud@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: pcc: Fix an invalid-load caught by the address sanitizerMario Limonciello1-1/+1
`pcc_mailbox_probe` doesn't initialize all memory that has been allocated before the first time that one of it's members `txdone_irq` may be accessed. This leads to a an invalid load any time that this member is accessed: [ 2.429769] UBSAN: invalid-load in drivers/mailbox/pcc.c:684:22 [ 2.430324] UBSAN: invalid-load in drivers/mailbox/mailbox.c:486:12 [ 4.276782] UBSAN: invalid-load in drivers/acpi/cppc_acpi.c:314:45 Link: https://bugzilla.kernel.org/show_bug.cgi?id=215587 Fixes: ce028702ddbc ("mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe") Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: correct kerneldocKrzysztof Kozlowski3-3/+5
Correct kerneldoc warnings like: drivers/mailbox/arm_mhu_db.c:47: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst drivers/mailbox/qcom-ipcc.c:58: warning: Function parameter or member 'num_chans' not described in 'qcom_ipcc' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: omap: using pm_runtime_resume_and_get to simplify the coderan jianping1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: ran jianping <ran.jianping@zte.com.cn> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox:imx: using pm_runtime_resume_and_getran jianping1-4/+2
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: ran jianping <ran.jianping@zte.com.cn> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: mediatek: support mt8186 adsp mailboxTinghan Shen1-0/+8
Add support of mt8186 adsp mailbox. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: tegra-hsp: Add 128-bit shared mailbox supportKartik1-3/+74
Add support for 128-bit shared mailboxes found on Tegra234 chips. Signed-off-by: Kartik <kkartik@nvidia.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: tegra-hsp: Add tegra_hsp_sm_opsKartik1-27/+47
This patch introduces tegra_hsp_sm_ops to abstract send & receive API's for shared mailboxes. Signed-off-by: Kartik <kkartik@nvidia.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: remove an unneeded NULL check on list iteratorXiaomeng Tong1-1/+1
The list iterator is always non-NULL so it doesn't need to be checked. Thus just remove the unnecessary NULL check. Signed-off-by: Xiaomeng Tong <xiam0nd.tong@gmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21mailbox: imx: remove redundant initializerTom Rix1-1/+0
Smatch reports this issue imx-mailbox.c:887:10: warning: Initializer entry defined twice imx-mailbox.c:889:10: also defined here .rxdb = imx_mu_generic_rxdb, Is listed twice, so remove one. Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspendDave Gerlach1-2/+91
During the system suspend path we must set all queues to operate in polled mode as it is possible for any protocol built using this mailbox, such as TISCI, to require communication during the no irq phase of suspend, and we cannot rely on interrupts there. Polled mode is implemented by allowing the mailbox user to define an RX channel as part of the message that is sent which is what gets polled for a response. If polled mode is enabled, this will immediately be polled for a response at the end of the mailbox send_data op before returning success for the data send or timing out if no response is received. Finally, to ensure polled mode is always enabled during system suspend, iterate through all queues to set RX queues to polled mode during system suspend and disable polled mode for all in the resume handler. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: ti-msgmgr: Refactor message read during interrupt handlerDave Gerlach1-39/+49
Refactor the portion of code that actually reads received messages from a queue into its own function, ti_msgmgr_queue_rx_data, that is called by the interrupt handler instead of reading directly from the handler. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: support i.MX93 S401 MUPeng Fan1-0/+12
Add i.MX93 S401 MU cfg Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: support dual interruptsPeng Fan1-15/+30
i.MX93 S401 MU support two interrupts: tx empty and rx full. - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case - Update Copyright Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: extend irq to an arrayPeng Fan1-7/+7
To i.MX93 S401 MU, there are two interrupts: rx full and tx empty. So extend irq to an array to prepare i.MX93 S401 MU support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: add i.MX8 SECO MU supportFranck LENORMAND1-1/+212
i.MX8/8X SECO firmware IPC is an implementation of passing messages. But current imx-mailbox driver only support one word message, i.MX8/8X linux side firmware has to request four TX, four RX and a TXDB to support IPC to SECO firmware. This is low efficent and more interrupts triggered compared with one TX and one RX. To make SECO MU work, - parse the size of msg. - Only enable TR0/RR0 interrupt for transmit/receive message. - For TX/RX, only support one TX channel and one RX channel - For RX, support receive msg of any size, limited by hardcoded value of 30. Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: introduce rxdb callbackPeng Fan1-3/+17
Add a rxdb callback to prepare for i.MX8 SECO MU rxdb which has a different logic. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: enlarge timeout while reading/writing messages to SCFWRanjani Vaidyanathan1-2/+3
Mailbox driver needs to wait and read all the words in response to a SCFW API call, else the protocol gets messed up and results in kernel hang. When the responses are longer than 3 words its possible that SCFW will take some time to fill up the rest of the words in the MU, a timeout of 100us is arbritrary and too short. While waiting for Linux to consume the first 3 words of the response SCFW can be busy doing other stuff and hence Linux needs to wait for the rest of the words. Similar restriction applies when writing messages that are longer than 3 words. This patch increases the timeout to 5secs while waiting for response or writing long messages to SCFW. Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: fix crash in resume on i.mx8ulpRobin Gong1-1/+1
check 'priv->clk' before 'imx_mu_read()' otherwise crash happens on i.mx8ulp, since clock not enabled. Fixes: 4f0b776ef5831 ("mailbox: imx-mailbox: support i.MX8ULP MU") Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: fix wakeup failure from freeze modeRobin Gong1-0/+9
Since IRQF_NO_SUSPEND used for imx mailbox driver, that means this irq can't be used for wakeup source so that can't wakeup from freeze mode. Add pm_system_wakeup() to wakeup from freeze mode. Fixes: b7b2796b9b31e("mailbox: imx: ONLY IPC MU needs IRQF_NO_SUSPEND flag") Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: mediatek: add support for adsp mailbox controllerAllen-KH Cheng3-0/+187
This patch is to for MediaTek ADSP IPC mailbox controller driver It is used to send short messages between processors with adsp Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Tzung-Bi Shih <tzungbi@google.com> Reviewed-by: YC Hung <yc.hung@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoCAdam Skladowski1-0/+1
MSM8976 APCS block is similar to one found in MSM8994. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: tegra-hsp: Flush whole channelPekka Pessi1-0/+5
The txdone can re-fill the mailbox. Keep polling the mailbox during the flush until all the messages have been delivered. This fixes an issue with the Tegra Combined UART (TCU) where output can get truncated under high traffic load. Signed-off-by: Pekka Pessi <ppessi@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Fixes: 91b1b1c3da8a ("mailbox: tegra-hsp: Add support for shared mailboxes") Cc: stable@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-13Merge tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integrationLinus Torvalds8-48/+105
Pull mailbox updates from Jassi Brar: - qcom: misc updates to qcom-ipcc driver - mpfs: change compatible string - pcc: - fix handling of subtypes - avoid uninitialized variable - mtk: - add missing of_node_put - enable control_by_sw - silent probe-defer prints - fix gce_num for mt8192 - zynq: add missing of_node_put - imx: check for NULL instead of IS_ERR - appple: switch to generic compatibles - hi3660: convert comments to kernel-doc notation * tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: Add more protocol and client ID mailbox: qcom-ipcc: Support interrupt wake up from suspend mailbox: qcom-ipcc: Support more IPCC instance mailbox: qcom-ipcc: Dynamic alloc for channel arrangement mailbox: change mailbox-mpfs compatible string mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq mailbox: pcc: Avoid using the uninitialized variable 'dev' mailbox: mtk: add missing of_node_put before return mailbox: zynq: add missing of_node_put before return mailbox: imx: Fix an IS_ERR() vs NULL bug mailbox: hi3660: convert struct comments to kernel-doc notation mailbox: add control_by_sw for mt8195 mailbox: mtk-cmdq: Silent EPROBE_DEFER errors for clks mailbox: fix gce_num of mt8192 driver data mailbox: apple: Bind to generic compatibles dt-bindings: mailbox: apple,mailbox: Add generic and t6000 compatibles
2022-01-13Merge tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds1-6/+3
Pull MSI irq updates from Thomas Gleixner: "Rework of the MSI interrupt infrastructure. This is a treewide cleanup and consolidation of MSI interrupt handling in preparation for further changes in this area which are necessary to: - address existing shortcomings in the VFIO area - support the upcoming Interrupt Message Store functionality which decouples the message store from the PCI config/MMIO space" * tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (94 commits) genirq/msi: Populate sysfs entry only once PCI/MSI: Unbreak pci_irq_get_affinity() genirq/msi: Convert storage to xarray genirq/msi: Simplify sysfs handling genirq/msi: Add abuse prevention comment to msi header genirq/msi: Mop up old interfaces genirq/msi: Convert to new functions genirq/msi: Make interrupt allocation less convoluted platform-msi: Simplify platform device MSI code platform-msi: Let core code handle MSI descriptors bus: fsl-mc-msi: Simplify MSI descriptor handling soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs() soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation NTB/msi: Convert to msi_on_each_desc() PCI: hv: Rework MSI handling powerpc/mpic_u3msi: Use msi_for_each-desc() powerpc/fsl_msi: Use msi_for_each_desc() powerpc/pasemi/msi: Convert to msi_on_each_dec() powerpc/cell/axon_msi: Convert to msi_on_each_desc() powerpc/4xx/hsta: Rework MSI handling ...
2022-01-11mailbox: qcom-ipcc: Support interrupt wake up from suspendHuang Yiwei1-2/+1
Use IRQF_NO_SUSPEND flag instead of enable_irq_wake to support interrupt wake up from suspend. Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: qcom-ipcc: Support more IPCC instanceHuang Yiwei1-1/+7
Since hardware is supporting multiple IPCC instance, use ipcc_%d instead of ipcc as the irq name to support in driver. Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: qcom-ipcc: Dynamic alloc for channel arrangementHuang Yiwei1-21/+69
Dynamic alloc for channel arrangement instead of static alloced array, it is more flexible and can reduce memory usage. Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: change mailbox-mpfs compatible stringConor Dooley1-1/+1
The Polarfire SoC is currently using two different compatible string prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in its system controller in order to match the compatible string used in the soc binding and device tree. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irqSudeep Holla1-3/+5
Commit c45ded7e1135 ("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)") enabled the type3/4 of PCCT, but the change in pcc_mbox_irq breaks the other PCC subtypes. The kernel reports a warning on an Ampere eMag server -->8 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.16.0-rc4 #127 Hardware name: MiTAC RAPTOR EV-883832-X3-0001/RAPTOR, BIOS 0.14 02/22/2019 Call trace: dump_backtrace+0x0/0x200 show_stack+0x20/0x30 dump_stack_lvl+0x68/0x84 dump_stack+0x18/0x34 __report_bad_irq+0x54/0x17c note_interrupt+0x330/0x428 handle_irq_event_percpu+0x90/0x98 handle_irq_event+0x4c/0x148 handle_fasteoi_irq+0xc4/0x188 generic_handle_domain_irq+0x44/0x68 gic_handle_irq+0x84/0x2ec call_on_irq_stack+0x28/0x34 do_interrupt_handler+0x88/0x90 el1_interrupt+0x48/0xb0 el1h_64_irq_handler+0x18/0x28 el1h_64_irq+0x7c/0x80 Fixes: c45ded7e1135 ("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)") Reported-by: Justin He <justin.he@arm.com> Tested-by: Justin He <justin.he@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: pcc: Avoid using the uninitialized variable 'dev'Sudeep Holla1-1/+1
Smatch static checker warns: | drivers/mailbox/pcc.c:292 pcc_mbox_request_channel() | error: uninitialized symbol 'dev'. Fix the same by using pr_err instead of dev_err as the variable 'dev' is uninitialized at that stage. Fixes: ce028702ddbc ("mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe") Cc: Jassi Brar <jassisinghbrar@gmail.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: mtk: add missing of_node_put before returnWang Qing1-0/+1
Fix following coccicheck warning: WARNING: Function "for_each_child_of_node" should have of_node_put() before return. Early exits from for_each_child_of_node should decrement the node reference counter. Signed-off-by: Wang Qing <wangqing@vivo.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: zynq: add missing of_node_put before returnWang Qing1-0/+1
Fix following coccicheck warning: WARNING: Function "for_each_available_child_of_node" should have of_node_put() before return. Early exits from for_each_available_child_of_node should decrement the node reference counter. Signed-off-by: Wang Qing <wangqing@vivo.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11mailbox: imx: Fix an IS_ERR() vs NULL bugDan Carpenter1-2/+2
The devm_kzalloc() function does not return error pointers, it returns NULL on failure. Fixes: 97961f78e8bc ("mailbox: imx: support i.MX8ULP S4 MU") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>