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path: root/drivers/mtd/nand/spi/core.c (follow)
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2019-04-08mtd: spinand: Implement mtd->_max_bad_blocksBoris Brezillon1-0/+1
We just have to use nanddev_mtd_max_bad_blocks(). Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2019-03-21mtd: spinand: Use the spi-mem dirmap APIBoris Brezillon1-84/+84
Make use of the spi-mem direct mapping API to let advanced controllers optimize read/write operations when they support direct mapping. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Stefan Roese <sr@denx.de>
2019-01-31mtd: spinand: Fix the error/cleanup path in spinand_init()Boris Brezillon1-2/+2
The manufacturer specific initialization has already been done when block unlocking takes place, and if anything goes wrong during this procedure we should call spinand_manufacturer_cleanup(). Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-01-31mtd: spinand: Handle the case where PROGRAM LOAD does not reset the cacheBoris Brezillon1-22/+20
Looks like PROGRAM LOAD (AKA write cache) does not necessarily reset the cache content to 0xFF (depends on vendor implementation), so we must fill the page cache entirely even if we only want to program the data portion of the page, otherwise we might corrupt the BBM or user data previously programmed in OOB area. Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs") Reported-by: Stefan Roese <sr@denx.de> Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: spinand: add support for GigaDevice GD5FxGQ4xAChuanhong Guo1-0/+1
Add support for GigaDevice GD5F1G/2G/4GQ4xA SPI NAND. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: spinand: Add initial support for Toshiba TC58CVG2S0HSchrempf Frieder1-0/+1
Add minimal support for the Toshiba TC58CVG2S0H SPI NAND chip. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: spinand: Add initial support for the MX35LF1GE4AB chipBoris Brezillon1-0/+1
Add minimal support for the MX35LF1GE4AB SPI NAND chip. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: spinand: Add initial support for Winbond W25M02GVFrieder Schrempf1-0/+1
Add support for the W25M02GV chip. Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: spinand: Add initial support for Micron MT29F2G01ABAGDPeter Pan1-0/+17
Add a basic driver for Micron SPI NANDs. Only one device is supported right now, but the driver will be extended to support more devices afterwards. Signed-off-by: Peter Pan <peterpandong@micron.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: nand: Add core infrastructure to support SPI NANDsPeter Pan1-0/+1136
Add a SPI NAND framework based on the generic NAND framework and the spi-mem infrastructure. In its current state, this framework supports the following features: - single/dual/quad IO modes - on-die ECC Signed-off-by: Peter Pan <peterpandong@micron.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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