aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/net/wireless/mediatek/mt76/mac80211.c (unfollow)
AgeCommit message (Collapse)AuthorFilesLines
2020-03-23net: dsa: sja1105: make the AVB table dynamically reconfigurableVladimir Oltean3-3/+27
The AVB table contains the CAS_MASTER field (to be added in the next patch) which decides the direction of the PTP_CLK pin. Reconfiguring this field dynamically is highly preferable to having to reset the switch and upload a new static configuration, so we add support for exactly that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: dsa: sja1105: make future_base_time a common helperVladimir Oltean2-27/+27
Because the PTP_CLK pin starts toggling only at a time higher than the current PTP clock, this helper from the time-aware shaper code comes in handy here as well. We'll use it to transform generic user input for the perout request into valid input for the sja1105 hardware. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: dsa: sja1105: unconditionally set DESTMETA and SRCMETA in AVB tableVladimir Oltean2-38/+32
These fields configure the destination and source MAC address that the switch will put in the Ethernet frames sent towards the CPU port that contain RX timestamps for PTP. These fields do not enable the feature itself, that is configured via SEND_META0 and SEND_META1 in the General Params table. The implication of this patch is that the AVB Params table will always be present in the static config. Which doesn't really hurt. This is needed because in a future patch, we will add another field from this table, CAS_MASTER, for configuring the PTP_CLK pin function. That can be configured irrespective of whether RX timestamping is enabled or not, so always having this table present is going to simplify things a bit. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: typhoon: Add required whitespace after keywordsLogan Magee2-143/+143
checkpatch found a lack of appropriate whitespace after certain keywords as per the style guide. Add it in. Signed-off-by: Logan Magee <mageelog@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: tja11xx: use phy_read_poll_timeout() to simplify the codeDejin Zheng1-13/+3
use phy_read_poll_timeout() to replace the poll codes for simplify tja11xx_check() function. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: smsc: use phy_read_poll_timeout() to simplify the codeDejin Zheng1-11/+5
use phy_read_poll_timeout() to replace the poll codes for simplify lan87xx_read_status() function. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: use phy_read_poll_timeout() to simplify the codeDejin Zheng1-11/+5
use phy_read_poll_timeout() to replace the poll codes for simplify the code in phy_poll_reset() function. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: introduce phy_read_poll_timeout macroDejin Zheng1-0/+13
it is sometimes necessary to poll a phy register by phy_read() function until its value satisfies some condition. introduce phy_read_poll_timeout() macros that do this. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: marvell10g: use phy_read_mmd_poll_timeout() to simplify the codeDejin Zheng1-10/+5
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify mv3310_reset() function. Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: aquantia: use phy_read_mmd_poll_timeout() to simplify the codeDejin Zheng1-9/+4
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify aqr107_wait_reset_complete() function. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: bcm84881: use phy_read_mmd_poll_timeout() to simplify the codeDejin Zheng1-23/+4
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify bcm84881_wait_init() function. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: introduce phy_read_mmd_poll_timeout macroDejin Zheng1-0/+14
it is sometimes necessary to poll a phy register by phy_read_mmd() function until its value satisfies some condition. introduce phy_read_mmd_poll_timeout() macros that do this. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23iopoll: redefined readx_poll_timeout macro to simplify the codeDejin Zheng1-19/+1
redefined readx_poll_timeout macro by read_poll_timeout to simplify the code. Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23iopoll: introduce read_poll_timeout macroDejin Zheng1-0/+44
this macro is an extension of readx_poll_timeout macro. the accessor function op just supports only one parameter in the readx_poll_timeout macro, but this macro can supports multiple variable parameters for it. so functions like phy_read(struct phy_device *phydev, u32 regnum) and phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) can also use this poll timeout core. and also expand it can sleep some time before read operation. Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23Remove DST_HOSTDavid Laight8-24/+12
Previous changes to the IP routing code have removed all the tests for the DS_HOST route flag. Remove the flags and all the code that sets it. Signed-off-by: David Laight <david.laight@aculab.com> Acked-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: thunderx: remove set but not used variable 'tail'Zheng zengkai1-2/+1
Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/ethernet/cavium/thunder/nicvf_queues.c: In function nicvf_sq_free_used_descs: drivers/net/ethernet/cavium/thunder/nicvf_queues.c:1182:12: warning: variable tail set but not used [-Wunused-but-set-variable] It's not used since commit 4863dea3fab01("net: Adding support for Cavium ThunderX network controller"), so remove it. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zheng zengkai <zhengzengkai@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: dsa: Implement flow dissection for tag_brcm.cFlorian Fainelli1-0/+23
Provide a flow_dissect callback which returns the network offset and where to find the skb protocol, given the tags structure a common function works for both tagging formats that are supported. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23devlink: Only pass packet trap group identifier in trap structureIdo Schimmel4-18/+32
Packet trap groups are now explicitly registered by drivers and not implicitly registered when the packet traps are registered. Therefore, there is no need to encode entire group structure the trap is associated with inside the trap structure. Instead, only pass the group identifier. Refer to it as initial group identifier, as future patches will allow user space to move traps between groups. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23devlink: Stop reference counting packet trap groupsIdo Schimmel1-96/+5
Now that drivers explicitly register their supported packet trap groups there is no for devlink to create them on-demand and destroy them when their reference count reaches zero. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23netdevsim: Explicitly register packet trap groupsIdo Schimmel1-1/+18
Use the previously added API to explicitly register / unregister supported packet trap groups. This is in preparation for future patches that will enable drivers to pass additional group attributes, such as associated policer identifier. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23mlxsw: spectrum_trap: Explicitly register packet trap groupsIdo Schimmel1-3/+27
Use the previously added API to explicitly register / unregister supported packet trap groups. This is in preparation for future patches that will enable drivers to pass additional group attributes, such as associated policer identifier. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23devlink: Add API to register packet trap groupsIdo Schimmel2-0/+123
Currently, packet trap groups are implicitly registered by drivers upon packet trap registration. When the traps are registered, each is associated with a group and the group is created by devlink, if it does not exist already. This makes it difficult for drivers to pass additional attributes for the groups. Therefore, as a preparation for future patches that require passing additional group attributes, add an API to explicitly register / unregister these groups. Next patches will convert existing drivers to use this API. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23r8169: improve RTL8168b FIFO overflow workaroundHeiner Kallweit1-2/+1
So far only the reset bit it set, but the handler executing the reset is not scheduled. Therefore nothing will happen until some other action schedules the handler. Improve this by ensuring that the handler is scheduled. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23r8169: improve rtl_schedule_taskHeiner Kallweit1-2/+2
The current implementation makes the implicit assumption that if a bit is set, then the work is scheduled already. Remove the need for this implicit assumption and call schedule_work() always. It will check internally whether the work is scheduled already. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23r8169: simplify rtl_taskHeiner Kallweit1-17/+3
Currently rtl_task() is designed to handle a large number of tasks. However we have just one, so we can remove some overhead. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23r8169: add new helper rtl8168g_enable_gphy_10mHeiner Kallweit1-8/+10
Factor out setting GPHY 10M to new helper rtl8168g_enable_gphy_10m. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-pf: Remove wrapper APIs for mutex lock and unlockSunil Goutham5-89/+75
This patch removes wrapper fn()s around mutex_init/lock/unlock. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-af: Remove driver version and fix authorshipSunil Goutham2-6/+2
Removed MODULE_VERSION and fixed MODULE_AUTHOR. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Reviewed-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-pf: Cleanup all receive buffers in SG descriptorGeetha sowjanya2-9/+34
With MTU sized receive buffers it is not expected to have CQE_RX with multiple receive buffer pointers. But since same physcial link is shared by PF and it's VFs, the max receive packet configured at link could be morethan MTU. Hence there is a chance of receiving plts morethan MTU which then gets DMA'ed into multiple buffers and notified in a single CQE_RX. This patch treats such pkts as errors and frees up receive buffers pointers back to hardware. Also on the transmit side this patch sets SMQ MAXLEN to max value to avoid HW length errors for the packets whose size > MTU, eg due to path MTU. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-vf: Link event notification supportTomasz Duszynski2-2/+93
VF shares physical link with PF. Admin function (AF) sends notification to PF whenever a link change event happens. PF has to forward the same notification to each of the enabled VF. PF traps START/STOP_RX messages sent by VF to AF to keep track of VF's enabled/disabled state. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-vf: Ethtool supportTomasz Duszynski3-14/+117
Added ethtool support for VF devices for - Driver stats, Tx/Rx perqueue stats - Set/show Rx/Tx queue count - Set/show Rx/Tx ring sizes - Set/show IRQ coalescing parameters - RSS configuration etc It's the PF which owns the interface, hence VF cannot display underlying CGX interface stats. Except for this rest ethtool support reuses PF's APIs. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-vf: Virtual function driver supportTomasz Duszynski8-1/+699
On OcteonTx2 silicon there two two types VFs, VFs that share the physical link with their parent SR-IOV PF and the VFs which work in pairs using internal HW loopback channels (LBK). Except for the underlying Rx/Tx channel mapping from netdev functionality perspective they are almost identical. This patch adds netdev driver support for these VFs. Unlike it's parent PF a VF cannot directly communicate with admin function (AF) and it has to go through PF for the same. The mailbox communication with AF works like 'VF <=> PF <=> AF'. Also functionality wise VF and PF are identical, hence to avoid code duplication PF driver's APIs are resued here for HW initialization, packet handling etc etc ie almost everything. For VF driver to compile as module exported few of the existing PF driver APIs. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-pf: Handle VF function level resetGeetha sowjanya2-3/+239
When FLR is initiated for a VF (PCI function level reset), the parent PF gets a interrupt. PF then sends a message to admin function (AF), which then cleanups all resources attached to that VF. Also handled IRQs triggered when master enable bit is cleared or set for VFs. This handler just clears the transaction pending ie TRPEND bit. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23octeontx2-pf: Enable SRIOV and added VF mbox handlingSunil Goutham2-0/+446
Added 'sriov_configure' to enable/disable virtual functions (VFs). Also added handling of mailbox messages from these VFs. Admin function (AF) is the only one with all priviliges to configure HW, alloc resources etc etc, PFs and it's VFs have to request AF via mbox for all their needs. But unlike PFs, their VFs cannot send a mbox request directly. A VF shares a mailbox region with it's parent PF, so VF sends a mailbox msg to PF and then PF forwards it to AF. Then AF after processing sends response to PF which it again forwards to VF. This patch adds support for this 'VF <=> PF <=> AF' mailbox communication. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: aquantia: remove downshift warning now that phylib takes careHeiner Kallweit1-24/+1
Now that phylib notifies the user of a downshift we can remove this functionality from the driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: marvell: remove downshift warning now that phylib takes careHeiner Kallweit1-24/+0
Now that phylib notifies the user of a downshift we can remove this functionality from the driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: add and use phy_check_downshiftHeiner Kallweit3-1/+44
So far PHY drivers have to check whether a downshift occurred to be able to notify the user. To make life of drivers authors a little bit easier move the downshift notification to phylib. phy_check_downshift() compares the highest mutually advertised speed with the actual value of phydev->speed (typically read by the PHY driver from a vendor-specific register) to detect a downshift. v2: - Add downshift hint to phy_print_status Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: xpcs: Restart AutoNeg if outcome was invalidJose Abreu1-1/+3
Restart AutoNeg if we didn't get a valid result from previous run. Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: xpcs: Set Link down if AutoNeg is enabled and did not finishJose Abreu1-1/+3
Set XPCS Link as down when AutoNeg is enabled but it didn't finish with success. Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: xpcs: Reset XPCS upon probeJose Abreu1-1/+1
Reset the XPCS upon probe stage so that we start it from well known state. Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: xpcs: Return error when 10GKR link errors are foundJose Abreu1-1/+3
For 10GKR rate, when link errors are found we need to return fault status so that XPCS is correctly resumed. Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23mlxsw: spectrum_cnt: Fix 64-bit division in mlxsw_sp_counter_resources_registerNathan Chancellor1-1/+1
When building arm32 allyesconfig: ld.lld: error: undefined symbol: __aeabi_uldivmod >>> referenced by spectrum_cnt.c >>> net/ethernet/mellanox/mlxsw/spectrum_cnt.o:(mlxsw_sp_counter_resources_register) in archive drivers/built-in.a >>> did you mean: __aeabi_uidivmod >>> defined in: arch/arm/lib/lib.a(lib1funcs.o) pool_size and bank_size are u64; use div64_u64 so that 32-bit platforms do not error. Fixes: ab8c4cc60420 ("mlxsw: spectrum_cnt: Move config validation along with resource register") Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: sched: rename more stats_typesJakub Kicinski7-58/+55
Commit 53eca1f3479f ("net: rename flow_action_hw_stats_types* -> flow_action_hw_stats*") renamed just the flow action types and helpers. For consistency rename variables, enums, struct members and UAPI too (note that this UAPI was not in any official release, yet). Signed-off-by: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: mptcp: don't hang in mptcp_sendmsg() after TCP fallbackDavide Caratti2-4/+6
it's still possible for packetdrill to hang in mptcp_sendmsg(), when the MPTCP socket falls back to regular TCP (e.g. after receiving unsupported flags/version during the three-way handshake). Adjust MPTCP socket state earlier, to ensure correct functionality of mptcp_sendmsg() even in case of TCP fallback. Fixes: 767d3ded5fb8 ("net: mptcp: don't hang before sending 'MP capable with data'") Fixes: 1954b86016cf ("mptcp: Check connection state before attempting send") Signed-off-by: Davide Caratti <dcaratti@redhat.com> Acked-by: Paolo Abeni <pabeni@redhat.com> Reviewed-by: Matthieu Baerts <matthieu.baerts@tessares.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: mscc: add support for VSC8502Vladimir Oltean2-0/+25
This is a dual copper PHY with support for MII/GMII/RGMII on MAC side, as well as a bunch of other features such as SyncE and Ring Resiliency. I haven't tested interrupts and WoL, but I am confident that they work since support is already present in the driver and the register map is no different for this PHY. PHY statistics work, PHY tunables appear to work, suspend/resume works. Signed-off-by: Wes Li <wes.li@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: mscc: configure both RX and TX internal delays for RGMIIVladimir Oltean2-3/+15
The driver appears to be secretly enabling the RX clock skew irrespective of PHY interface type, which is generally considered a big no-no. Make them configurable instead, and add TX internal delays when necessary too. While at it, configure a more canonical clock skew of 2.0 nanoseconds than the current default of 1.1 ns. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: mscc: accept all RGMII species in vsc85xx_mac_if_setVladimir Oltean1-0/+3
The helper for configuring the pinout of the MII side of the PHY should do so irrespective of whether RGMII delays are used or not. So accept the ID, TXID and RXID variants as well, not just the no-delay RGMII variant. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: mscc: rename enum rgmii_rx_clock_delay to rgmii_clock_delayVladimir Oltean2-10/+10
There is nothing RX-specific about these clock skew values. So remove "RX" from the name in preparation for the next patch where TX delays are also going to be configured. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23enetc: Remove unused variable 'enetc_drv_name'YueHaibing2-2/+0
commit ed0a72e0de16 ("net/freescale: Clean drivers from static versions") leave behind this, remove it . Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23Crypto/chtls: add/delete TLS header in driverRohit Maheshwari1-14/+59
Kernel TLS forms TLS header in kernel during encryption and removes while decryption before giving packet back to user application. The similar logic is introduced in chtls code as well. v1->v2: - tls_proccess_cmsg() uses tls_handle_open_record() which is not required in TOE-TLS. Don't mix TOE with other TLS types. Signed-off-by: Vinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.