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2017-06-22crypto: ccp - Release locks before returningGary R Hook1-4/+3
krobot warning: make sure that all error return paths release locks. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-22crypto: cavium/nitrox - dma_mapping_error() returns boolDan Carpenter1-6/+9
We want to return negative error codes here, but we're accidentally propogating the "true" return from dma_mapping_error(). Fixes: 14fa93cdcd9b ("crypto: cavium - Add support for CNN55XX adapters.") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: caam - make of_device_ids const.Arvind Yadav1-1/+1
of_device_ids are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs as const. File size before: text data bss dec hex filename 2376 808 128 3312 cf0 drivers/crypto/caam/jr.o File size after constify caam_jr_match: text data bss dec hex filename 2976 192 128 3296 ce0 drivers/crypto/caam/jr.o Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: vmx - remove unnecessary checkTudor-Dan Ambarus4-24/+4
You can't reach init() if parent alg_name is invalid. Moreover, cypto_alloc_base() will return ENOENT if alg_name is NULL. Found while grasping the fallback mechanism. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: n2 - make of_device_ids constArvind Yadav1-2/+2
of_device_ids are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs as const. File size before: text data bss dec hex filename 2001 2168 48 4217 1079 drivers/crypto/n2_core.o File size after constify dummy_tlb_ops.: text data bss dec hex filename 3601 536 48 4185 1059 drivers/crypto/n2_core.o Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - use the base_end pointer in ring rollbackAntoine Ténart1-1/+1
A base_end pointer is set and provided. Use it in the ring rollback function to avoid using build-in defines. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - increase the batch sizeAntoine Ténart1-1/+1
Increase the batch size to the maximum number of requests a ring can handle at a time (its size). This is possible now that the request queues are per hw ring. This improves performances. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - only dequeue when neededAntoine Ténart1-3/+3
This force the need_dequeue flag to be unset whenever the dequeue function is called, to avoid calling it when it is not necessary. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - get the backlog before dequeueing the requestAntoine Ténart1-1/+1
Get the backlog before dequeuing the request otherwise we'll miss the first request in line. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - stop requeueing failed requestsAntoine Ténart1-8/+10
This update the dequeue function of the inside-secure safexcel driver so that failed requests aren't requeued when they fail (for whatever reason, which can be because the hw ring is full). Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - use one queue per hw ringAntoine Ténart4-85/+89
Update the inside-secure safexcel driver from using one global queue to one queue per hw ring. This ease the request management and keep the hw in sync with what's done in sw. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - update the context and request laterAntoine Ténart2-8/+7
This move the context and request updates at the end of the cipher and hash send() functions. This way the context and request fields are set only when everything else was successful in the send() functions. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - align the cipher and hash send functionsOfer Heifetz1-1/+1
The cipher and hash send functions both set the results variable, to be used later by the caller. Align the way they're setting this variable. Signed-off-by: Ofer Heifetz <oferh@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - optimize DSE bufferability controlIgal Liberman2-0/+2
Configure the data write bufferability to always buffer packets in the DSE. This change slightly improves performance. Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - enable single WR in DSE configurationIgal Liberman2-0/+2
When enable_single_wr is not enabled, the DSE will only write those parts of a result descriptor that need updating, which means a final result descriptor will be written in 2 or 3 smaller transfers. When enable_single_wr is enabled the DSE will combine these 2-3 updates into one large write transfer, generally improving performance. Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - fix incorrect DSE data cache settingAntoine Ténart1-1/+1
Set the correct value to the DSE data cache, using WR_CACHE_3BITS instead of RD_CACHE_3BITS. This fixes an incorrect setting and helps improving performances. Reported-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - fix the ring wr_cache offsetAntoine Ténart1-1/+1
The EIP197_HIA_xDR_CFG_WR_CACHE macro was defined to use an offset of 23, which is wrong as it's actually 25. Fix this. Reported-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - use hmac ipad/opad constantsAntoine Ténart1-2/+3
Replace the hmac ipad/opad values by their defined constants. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Select device in Round Robin fashionHarsh Jain5-21/+44
When multiple devices are present in system select device in round-robin fashion for crypto operations Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Reviewed-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Ensure Destination sg entry size less than 2kHarsh Jain2-17/+142
Allocate new sg list in case received destination sg list has entry greater that 2k. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20chcr - Add debug countersHarsh Jain5-1/+62
Count types of operation done by HW. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Add ctr mode and process large sg entries for cipherHarsh Jain5-145/+690
It send multiple WRs to H/W to handle large sg lists. Adds ctr(aes) and rfc(ctr(aes)) modes. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Avoid changing request structureHarsh Jain1-23/+14
Do not update assoclen received in aead_request. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Return correct error codeHarsh Jain1-34/+42
Return correct error instead of EINVAL. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Fix fallback key settingHarsh Jain1-1/+11
Set key of fallback tfm for rfc4309. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Pass lcb bit setting to firmwareHarsh Jain2-9/+13
GCM and CBC mode of operation requires Last Cipher Block. This patch set lcb bit in WR header when required. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: cavium - fix spelling mistake "Revsion" -> "Revision"Colin Ian King1-1/+1
Trivial fix to spelling mistake in seq_printf message Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: omap-aes - fix spelling mistake "Encryptio" -> "Encryption"Colin Ian King1-1/+1
Trivial fix to spelling mistake in pr_err message Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20hwrng: mtk - add runtime PM supportSean Wang1-0/+42
Add runtime PM support. There will be the benefit on SoCs where the clock to the RNG used can be shutdown. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: crypto4xx - fix an error codeChristophe Jaillet1-0/+1
If 'kzalloc' fails, we return 0 which means success. return -ENOMEM instead as already done a few lines above. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: brcm - fix spelling mistake: "fallbck" -> "fallback"Colin Ian King1-1/+1
Trivial fix to spelling mistake in flow_log message Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Steve Lin <steven.lin1@broadcom.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - fix large block size supportAntoine Ténart1-0/+18
The run-time self-tests fail quite early, as soon as the input block size is larger than 64 bytes: alg: hash: Test 4 failed for sha1-sun4i-ss 00000000: b9 c9 1e 52 c0 26 d8 39 81 ff f2 3c 99 b1 27 b2 00000010: 30 d6 c9 85 One thing to notice is the value of the last word, which is the one expected (it can sometime be the last two words). The datasheet isn't very clear about when the digest is ready to retrieve and is seems the bit SS_DATA_END is cleared when the digest was computed *but* that doesn't mean the digest is ready to retrieve in the registers. A ndelay(1) is added before reading the computed digest to ensure it is available in the SS_MD[] registers. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - add the CRYPTO_ALG_KERN_DRIVER_ONLY flagAntoine Ténart1-5/+10
The CRYPTO_ALG_KERN_DRIVER_ONLY flag is set for hardware accelerated ciphers accessible through a kernel driver only. This is the case for ciphers exposed by the sun4i-ss driver. This patch sets this flag. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - move from ablkcipher to skcipher APIAntoine Ténart3-224/+221
Update the sun4i-ss driver to use the skcipher API instead of the old ablkcipher one. It's a bit more tricky than s/ablkcipher/skcipher/, but still nothing special and the driver's logic stays the same. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - use GENMASK to generate masksAntoine Ténart1-3/+6
Use the GENMASK helper instead of custom calculations to generate masks, It also helps the readability. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - simplify the appended bit assignmentAntoine Ténart1-6/+2
A bit is appended at the end of the input buffer for sha1. Simplify the code assigning it. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - simplify the pad length calculationAntoine Ténart1-17/+12
When sending the last block of data to the engine, it should be padded so that the total length of the request can be given to the engine as the last 2 words of the last 64 bytes block. Simplify the calculation of this pad offset. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - do not dynamically set parts of the last buffer to 0Antoine Ténart1-2/+1
Parts of the bf buffer were dynamically set to 0. Change this to set the whole buffer to 0 by default to avoid any mistake. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - cannot use DMA is the request is 0 lengthAntoine Ténart1-1/+1
Do not use DMA is the request is 0 length. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - use lower/upper_32_bits helpersAntoine Ténart1-6/+6
Replace custom bit shifts and masks with lower/upper_32_bits helpers. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - remove conditional checks against 0Antoine Ténart3-39/+39
Cosmetic clean up if conditional checks on 0s values. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - group variable definitions in sun4i_hash()Antoine Ténart1-20/+11
Cosmetic change to avoid having a full screen a variable definitions. It also helps to see which variables share the same type. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: mediatek - drop .owner field in mtk_crypto_driverGeliang Tang1-1/+0
Drop .owner field in mtk_crypto_driver, since platform_driver_register() will set it automatically. Signed-off-by: Geliang Tang <geliangtang@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: cavium - Add more algorithmsGeorge Cherian1-0/+81
Add more algorithm support for the driver. Add support for ecb(aes), cfb(aes) and ecb(des3_ede). Signed-off-by: George Cherian <george.cherian@cavium.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: cavium - Remove the individual encrypt/decrypt function for each algorithmGeorge Cherian2-77/+83
Remove the individual encrypt/decrypt function for easch algorithm. This is in prepration of adding more crypto algorithms supported by hardware. While at that simplify create_ctx_hdr/create_input_list function interfaces. Signed-off-by: George Cherian <george.cherian@cavium.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: cavium - Downgrade the annoying misc interrupt print from dev_err to dev_dbgGeorge Cherian1-1/+1
Mailbox interrupt is common and it is not an error interrupt. So downgrade the print from dev_err to dev_dbg. Signed-off-by: George Cherian <george.cherian@cavium.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: ccp - return NULL instead of 0pjambhlekar1-2/+2
This change is to handle sparse warning. Return type of function is a pointer to the structure and it returns 0. Instead it should return NULL. Signed-off-by: Pushkar Jambhlekar <pushkar.iit@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: ccp - Add debugfs entries for CCP informationGary R Hook5-3/+395
Expose some data about the configuration and operation of the CCP through debugfs entries: device name, capabilities, configuration, statistics. Allow the user to reset the counters to zero by writing (any value) to the 'stats' file. This can be done per queue or per device. Changes from V1: - Correct polarity of test when destroying devices at module unload Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: talitos - Extend max key length for SHA384/512-HMAC and AEADMartin Hicks1-1/+6
An updated patch that also handles the additional key length requirements for the AEAD algorithms. The max keysize is not 96. For SHA384/512 it's 128, and for the AEAD algorithms it's longer still. Extend the max keysize for the AEAD size for AES256 + HMAC(SHA512). Cc: <stable@vger.kernel.org> # 3.6+ Fixes: 357fb60502ede ("crypto: talitos - add sha224, sha384 and sha512 to existing AEAD algorithms") Signed-off-by: Martin Hicks <mort@bork.org> Acked-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-10crypto: mediatek - remove redundant clock settingRyder Lee2-11/+1
This patch removes redundant clock setting for 'clk_ethif', which is the parent of 'clk_cryp'. Hence, we just need to handle its child. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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