| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156 |   Thomas Gleixner | 1 | -14/+1 |
| 2014-02-10 | ARM: zynq: Map I/O memory on clkc init |   Michal Simek | 1 | -1/+1 |
| 2013-05-27 | arm: zynq: Migrate platform to clock controller |   Soren Brinkmann | 1 | -1/+7 |
| 2012-11-14 | clk: Add support for fundamental zynq clks |   Josh Cartwright | 1 | -0/+24 |
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index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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