aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/scripts/gdb/linux/utils.py (unfollow)
AgeCommit message (Collapse)AuthorFilesLines
2020-10-15interconnect: qcom: sdm845: Init BCMs before creating the nodesGeorgi Djakov1-3/+3
Currently if we use sync_state, by default the bandwidth is maxed out, but in order to set this in hardware, the BCMs (Bus Clock Managers) need to be initialized first. Move the BCM initialization before creating the nodes to fix this. Fixes: 7d3b0b0d8184 ("interconnect: qcom: Use icc_sync_state") Acked-by: Saravana Kannan <saravanak@google.com> Link: https://lore.kernel.org/r/20201013135913.29059-2-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-10-15interconnect: Aggregate before setting initial bandwidthGeorgi Djakov1-0/+3
When setting the initial bandwidth, make sure to call the aggregate() function (if such is implemented for the current provider), to handle cases when data needs to be aggregated first. Fixes: b1d681d8d324 ("interconnect: Add sync state support") Acked-by: Saravana Kannan <saravanak@google.com> Link: https://lore.kernel.org/r/20201013135913.29059-1-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-10-15interconnect: qcom: sdm845: Enable keepalive for the MM1 BCMGeorgi Djakov1-1/+1
After enabling interconnect scaling for display on the db845c board, in certain configurations the board hangs, while the following errors are observed on the console: Error sending AMC RPMH requests (-110) qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 ... In this specific case, the above is related to one of the sequencers being stuck, while client drivers are returning from probe and trying to disable the currently unused clock and interconnect resources. Generally we want to keep the multimedia NoC enabled like the rest of the NoCs, so let's set the keepalive flag on it too. Fixes: aae57773fbe0 ("interconnect: qcom: sdm845: Split qnodes into their respective NoCs") Reported-by: Amit Pundir <amit.pundir@linaro.org> Reviewed-by: Mike Tipton <mdtipton@codeaurora.org> Tested-by: John Stultz <john.stultz@linaro.org> Link: https://lore.kernel.org/r/20201012194034.26944-1-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-21interconnect: imx: simplify the return expression of imx_icc_unregisterLiu Shixin1-6/+1
Simplify the return expression. Signed-off-by: Liu Shixin <liushixin2@huawei.com> Link: https://lore.kernel.org/r/20200921082437.2591461-1-liushixin2@huawei.com Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18interconnect: imx: Simplify with dev_err_probe()Krzysztof Kozlowski1-4/+2
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200902172433.1138-2-krzk@kernel.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18interconnect: core: Simplify with dev_err_probe()Krzysztof Kozlowski1-6/+2
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200902172433.1138-1-krzk@kernel.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18interconnect: qcom: Use icc_sync_stateGeorgi Djakov3-0/+3
Lowering the bandwidth on the bus might have negative consequences if it's done before all consumers had a chance to cast their vote. Now by default the framework sets the bandwidth to maximum during boot. We need to use the icc_sync_state callback to notify the framework when all consumers are probed and there is no need to keep the bandwidth set to maximum anymore. Link: https://lore.kernel.org/r/20200825170152.6434-4-georgi.djakov@linaro.org Reviewed-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18interconnect: Add sync state supportGeorgi Djakov2-0/+72
The bootloaders often do some initial configuration of the interconnects in the system and we want to keep this configuration until all consumers have probed and expressed their bandwidth needs. This is because we don't want to change the configuration by starting to disable unused paths until every user had a chance to request the amount of bandwidth it needs. To accomplish this we will implement an interconnect specific sync_state callback which will synchronize (aggregate and set) the current bandwidth settings when all consumers have been probed. Link: https://lore.kernel.org/r/20200825170152.6434-3-georgi.djakov@linaro.org Reviewed-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18interconnect: Add get_bw() callbackGeorgi Djakov1-0/+2
The interconnect controller hardware may support querying the current bandwidth settings, so add a callback for providers to implement this functionality if supported. Link: https://lore.kernel.org/r/20200825170152.6434-2-georgi.djakov@linaro.org Reviewed-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-15interconnect: qcom: osm-l3: Mark more structures constStephen Boyd1-9/+10
These structures aren't modified at runtime. Mark them const so they get moved to read-only memory. We have to cast away const in one place when we store into the data member of struct icc_node. This is paired with a re-const of the data member when it is extracted in qcom_icc_set(). Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Evan Green <evgreen@chromium.org> Link: https://lore.kernel.org/r/20200914182112.513981-1-swboyd@chromium.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Add EPSS L3 support on SM8250Sibi Sankar2-0/+25
Add Epoch Subsystem (EPSS) L3 interconnect provider support on SM8250 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200801123049.32398-6-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: Add EPSS L3 DT binding on SM8250Sibi Sankar2-0/+4
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SM8250 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200801123049.32398-5-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Lay the groundwork for adding EPSS supportSibi Sankar1-11/+26
Lay the groundwork for adding Epoch Subsystem (EPSS) L3 support on SM8250. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200801123049.32398-4-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Add OSM L3 support on SM8150Sibi Sankar2-0/+17
Add Operation State Manager (OSM) L3 interconnect provider support on SM8150 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200801123049.32398-3-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: Add OSM L3 DT binding on SM8150Sibi Sankar1-0/+1
Add Operation State Manager (OSM) L3 interconnect provider binding on SM8150 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200801123049.32398-2-sibis@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: sc7180: Replace xlate with xlate_extendedSibi Sankar1-1/+1
Use the qcom_icc_xlate_extended() in order to parse tags, that are specified as an additional arguments to the path endpoints in DT. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20200903133134.17201-7-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: sdm845: Replace xlate with xlate_extendedGeorgi Djakov1-1/+1
Use the qcom_icc_xlate_extended() in order to parse tags, that are specified as an additional arguments to the path endpoints in DT. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20200903133134.17201-5-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Implement xlate_extended() to parse tagsGeorgi Djakov2-0/+28
Implement a function to parse the arguments of the "interconnects" DT property and populate the interconnect path tags if this information is available. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200903133134.17201-4-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: Document the support of optional path tagGeorgi Djakov1-1/+23
Let's document that we now support specifying path tag information in the arg cells of the 'interconnects' DT property. This information would be populated when the xlate_extended() callback is used. Specifying the tag in DT will allow the interconnect framework to do the aggregation based on the tag automatically. The users can still use the icc_set_tag() API if/when needed. Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200903133134.17201-3-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: Introduce xlate_extended() callbackGeorgi Djakov2-25/+65
Currently there is the xlate() callback, which is used by providers for mapping the nodes from phandle arguments. That's fine for simple mappings, but the phandle arguments could contain an additional data, such as tag information. Let's create another callback xlate_extended() for the cases where providers want also populate the path tag data. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20200903133134.17201-2-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Add support for per-BCM scaling factorsMike Tipton3-2/+7
Currently, bcm-voter always assumes requests are made in KBps and that BCM HW always wants them in Bps, so it always scales the requests by 1000. However, certain use cases and BCMs may use different units. Thus, add support for BCM-specific scaling factors. Signed-off-by: Mike Tipton <mdtipton@codeaurora.org> Link: https://lore.kernel.org/r/20200903192149.30385-7-mdtipton@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Only wait for completion in AMC/WAKE by defaultMike Tipton1-1/+1
Change the default TCS wait behavior to only wait for completion in AMC and WAKE. Waiting isn't necessary in the SLEEP TCS, since votes are only being removed in this case. Resources can be safely disabled asynchronously in parallel with the rest of the power collapse sequence. This reduces the sleep entry latency. Signed-off-by: Mike Tipton <mdtipton@codeaurora.org> Link: https://lore.kernel.org/r/20200903192149.30385-6-mdtipton@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Support bcm-voter-specific TCS wait behaviorMike Tipton1-11/+21
Currently, all bcm-voters set tcs_cmd::wait=true for the last VCD command in each TCS (AMC, WAKE, and SLEEP). However, some bcm-voters don't need the completion and instead need to optimize for latency. For instance, disabling wait-for-completion in the WAKE set can decrease resume latency and allow for certain operations to occur in parallel with the WAKE TCS triggering. This is only safe in very specific situations. Keep the default behavior of always waiting, but allow it to be overridden in devicetree. Signed-off-by: Mike Tipton <mdtipton@codeaurora.org> Link: https://lore.kernel.org/r/20200903192149.30385-5-mdtipton@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: Add property to set BCM TCS wait behaviorMike Tipton1-0/+20
Add "qcom,tcs-wait" property to set which TCS should wait for completion when triggering. Signed-off-by: Mike Tipton <mdtipton@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200903192149.30385-4-mdtipton@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: Add generic qcom bindingsMike Tipton2-16/+28
Add generic qcom interconnect bindings that are common across platforms. In particular, these include QCOM_ICC_TAG_* macros that clients can use when calling icc_set_tag(). Signed-off-by: Mike Tipton <mdtipton@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200903192149.30385-3-mdtipton@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Add SM8250 interconnect provider driverJonathan Marek4-0/+825
Add driver for the Qualcomm interconnect buses found in SM8250 based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Based on SC7180 driver and generated from downstream dts. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200728023811.5607-6-jonathan@marek.ca Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: qcom: Add SM8150 interconnect provider driverJonathan Marek4-0/+799
Add driver for the Qualcomm interconnect buses found in SM8150 based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Based on SC7180 driver and generated from downstream dts. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200728023811.5607-5-jonathan@marek.ca Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: Add Qualcomm SM8250 DT bindingsJonathan Marek2-0/+183
The Qualcomm SM8250 platform has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200728023811.5607-4-jonathan@marek.ca Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: Add Qualcomm SM8150 DT bindingsJonathan Marek2-0/+173
The Qualcomm SM8150 platform has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200728023811.5607-3-jonathan@marek.ca Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08dt-bindings: interconnect: single yaml file for RPMh interconnect driversJonathan Marek2-88/+17
These two bindings are almost identical, so combine them into one. This will make it easier to add the sm8150 and sm8250 interconnect bindings. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200728023811.5607-2-jonathan@marek.ca Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08interconnect: Add bulk API helpersGeorgi Djakov3-1/+140
There are drivers which just need to get multiple interconnect paths, request some predefined amounts of bandwidth and then just toggle the paths between enabled/disabled state. The aim of this patch is simplify the above and to allow drivers to put all the path names and bandwidth data into a single static icc_bulk_data table and call the icc_bulk_* functions on that table in order to scale all the interconnect paths in parallel. Suggested-by: Evan Green <evgreen@chromium.org> Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200729123439.9961-1-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-04interconnect: qcom: Fix small BW votes being truncated to zeroMike Tipton1-8/+19
Small BW votes that translate to less than a single BCM unit are currently truncated to zero. Ensure that non-zero BW requests always result in at least a vote of 1 to BCM. Fixes: 976daac4a1c5 ("interconnect: qcom: Consolidate interconnect RPMh support") Signed-off-by: Mike Tipton <mdtipton@codeaurora.org> Link: https://lore.kernel.org/r/20200903192149.30385-2-mdtipton@codeaurora.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-03interconnect: Show bandwidth for disabled paths as zero in debugfsMatthias Kaehlcke1-2/+8
For disabled paths the 'interconnect_summary' in debugfs currently shows the orginally requested bandwidths. This is confusing, since the bandwidth requests aren't active. Instead show the bandwidths for disabled paths/requests as zero. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Evan Green <evgreen@chromium.org> Link: https://lore.kernel.org/r/20200729104933.1.If8e80e4c0c7ddf99056f6e726e59505ed4e127f3@changeid Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-08-30Linux 5.9-rc3Linus Torvalds1-1/+1
2020-08-30genirq/matrix: Deal with the sillyness of for_each_cpu() on UPThomas Gleixner1-0/+7
Most of the CPU mask operations behave the same way, but for_each_cpu() and it's variants ignore the cpumask argument and claim that CPU0 is always in the mask. This is historical, inconsistent and annoying behaviour. The matrix allocator uses for_each_cpu() and can be called on UP with an empty cpumask. The calling code does not expect that this succeeds but until commit e027fffff799 ("x86/irq: Unbreak interrupt affinity setting") this went unnoticed. That commit added a WARN_ON() to catch cases which move an interrupt from one vector to another on the same CPU. The warning triggers on UP. Add a check for the cpumask being empty to prevent this. Fixes: 2f75d9e1c905 ("genirq: Implement bitmap matrix allocator") Reported-by: kernel test robot <rong.a.chen@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org
2020-08-29fsldma: fix very broken 32-bit ppc ioread64 functionalityLinus Torvalds1-6/+6
Commit ef91bb196b0d ("kernel.h: Silence sparse warning in lower_32_bits") caused new warnings to show in the fsldma driver, but that commit was not to blame: it only exposed some very incorrect code that tried to take the low 32 bits of an address. That made no sense for multiple reasons, the most notable one being that that code was intentionally limited to only 32-bit ppc builds, so "only low 32 bits of an address" was completely nonsensical. There were no high bits to mask off to begin with. But even more importantly fropm a correctness standpoint, turning the address into an integer then caused the subsequent address arithmetic to be completely wrong too, and the "+1" actually incremented the address by one, rather than by four. Which again was incorrect, since the code was reading two 32-bit values and trying to make a 64-bit end result of it all. Surprisingly, the iowrite64() did not suffer from the same odd and incorrect model. This code has never worked, but it's questionable whether anybody cared: of the two users that actually read the 64-bit value (by way of some C preprocessor hackery and eventually the 'get_cdar()' inline function), one of them explicitly ignored the value, and the other one might just happen to work despite the incorrect value being read. This patch at least makes it not fail the build any more, and makes the logic superficially sane. Whether it makes any difference to the code _working_ or not shall remain a mystery. Compile-tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-28kernel.h: Silence sparse warning in lower_32_bitsHerbert Xu1-1/+1
I keep getting sparse warnings in crypto such as: CHECK drivers/crypto/ccree/cc_hash.c drivers/crypto/ccree/cc_hash.c:49:9: warning: cast truncates bits from constant value (47b5481dbefa4fa4 becomes befa4fa4) drivers/crypto/ccree/cc_hash.c:49:26: warning: cast truncates bits from constant value (db0c2e0d64f98fa7 becomes 64f98fa7) [.. many more ..] This patch removes the warning by adding a mask to keep sparse happy. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-28cifs: fix check of tcon dfs in smb1Paulo Alcantara2-1/+16
For SMB1, the DFS flag should be checked against tcon->Flags rather than tcon->share_flags. While at it, add an is_tcon_dfs() helper to check for DFS capability in a more generic way. Signed-off-by: Paulo Alcantara (SUSE) <pc@cjr.nz> Signed-off-by: Steve French <stfrench@microsoft.com> Reviewed-by: Shyam Prasad N <nspmangalore@gmail.com>
2020-08-28KVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous exceptionJames Morse1-1/+2
AT instructions do a translation table walk and return the result, or the fault in PAR_EL1. KVM uses these to find the IPA when the value is not provided by the CPU in HPFAR_EL1. If a translation table walk causes an external abort it is taken as an exception, even if it was due to an AT instruction. (DDI0487F.a's D5.2.11 "Synchronous faults generated by address translation instructions") While we previously made KVM resilient to exceptions taken due to AT instructions, the device access causes mismatched attributes, and may occur speculatively. Prevent this, by forbidding a walk through memory described as device at stage2. Now such AT instructions will report a stage2 fault. Such a fault will cause KVM to restart the guest. If the AT instructions always walk the page tables, but guest execution uses the translation cached in the TLB, the guest can't make forward progress until the TLB entry is evicted. This isn't a problem, as since commit 5dcd0fdbb492 ("KVM: arm64: Defer guest entry when an asynchronous exception is pending"), KVM will return to the host to process IRQs allowing the rest of the system to keep running. Cc: stable@vger.kernel.org # <v5.3: 5dcd0fdbb492 ("KVM: arm64: Defer guest entry when an asynchronous exception is pending") Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-08-28KVM: arm64: Survive synchronous exceptions caused by AT instructionsJames Morse3-8/+42
KVM doesn't expect any synchronous exceptions when executing, any such exception leads to a panic(). AT instructions access the guest page tables, and can cause a synchronous external abort to be taken. The arm-arm is unclear on what should happen if the guest has configured the hardware update of the access-flag, and a memory type in TCR_EL1 that does not support atomic operations. B2.2.6 "Possible implementation restrictions on using atomic instructions" from DDI0487F.a lists synchronous external abort as a possible behaviour of atomic instructions that target memory that isn't writeback cacheable, but the page table walker may behave differently. Make KVM robust to synchronous exceptions caused by AT instructions. Add a get_user() style helper for AT instructions that returns -EFAULT if an exception was generated. While KVM's version of the exception table mixes synchronous and asynchronous exceptions, only one of these can occur at each location. Re-enter the guest when the AT instructions take an exception on the assumption the guest will take the same exception. This isn't guaranteed to make forward progress, as the AT instructions may always walk the page tables, but guest execution may use the translation cached in the TLB. This isn't a problem, as since commit 5dcd0fdbb492 ("KVM: arm64: Defer guest entry when an asynchronous exception is pending"), KVM will return to the host to process IRQs allowing the rest of the system to keep running. Cc: stable@vger.kernel.org # <v5.3: 5dcd0fdbb492 ("KVM: arm64: Defer guest entry when an asynchronous exception is pending") Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-08-28KVM: arm64: Add kvm_extable for vaxorcism codeJames Morse8-26/+108
KVM has a one instruction window where it will allow an SError exception to be consumed by the hypervisor without treating it as a hypervisor bug. This is used to consume asynchronous external abort that were caused by the guest. As we are about to add another location that survives unexpected exceptions, generalise this code to make it behave like the host's extable. KVM's version has to be mapped to EL2 to be accessible on nVHE systems. The SError vaxorcism code is a one instruction window, so has two entries in the extable. Because the KVM code is copied for VHE and nVHE, we end up with four entries, half of which correspond with code that isn't mapped. Signed-off-by: James Morse <james.morse@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-08-28arm64: vdso32: make vdso32 install conditionalFrank van der Linden1-1/+2
vdso32 should only be installed if CONFIG_COMPAT_VDSO is enabled, since it's not even supposed to be compiled otherwise, and arm64 builds without a 32bit crosscompiler will fail. Fixes: 8d75785a8142 ("ARM64: vdso32: Install vdso32 from vdso_install") Signed-off-by: Frank van der Linden <fllinden@amazon.com> Cc: stable@vger.kernel.org [5.4+] Link: https://lore.kernel.org/r/20200827234012.19757-1-fllinden@amazon.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-08-28arm64: use a common .arch preamble for inline assemblySami Tolvanen3-5/+18
Commit 7c78f67e9bd9 ("arm64: enable tlbi range instructions") breaks LLVM's integrated assembler, because -Wa,-march is only passed to external assemblers and therefore, the new instructions are not enabled when IAS is used. This change adds a common architecture version preamble, which can be used in inline assembly blocks that contain instructions that require a newer architecture version, and uses it to fix __TLBI_0 and __TLBI_1 with ARM64_TLB_RANGE. Fixes: 7c78f67e9bd9 ("arm64: enable tlbi range instructions") Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nathan Chancellor <natechancellor@gmail.com> Link: https://github.com/ClangBuiltLinux/linux/issues/1106 Link: https://lore.kernel.org/r/20200827203608.1225689-1-samitolvanen@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-08-28mfd: mfd-core: Ensure disabled devices are ignored without errorLee Jones1-4/+6
Commit e49aa9a9bd22 ("mfd: core: Make a best effort attempt to match devices with the correct of_nodes") changed the semantics for disabled devices in mfd_add_device(). Instead of silently ignoring a disabled child device, an error was returned. On receipt of the error mfd_add_devices() the precedes to remove *all* child devices and returns an all-failed error to the caller, which will inevitably fail the parent device as well. This patch reverts back to the old semantics and ignores child devices which are disabled in Device Tree. Fixes: e49aa9a9bd22 ("mfd: core: Make a best effort attempt to match devices with the correct of_nodes") Reported-by: Icenowy Zheng <icenowy@aosc.io> Tested-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2020-08-28usb: storage: Add unusual_uas entry for Sony PSZ drivesAlan Stern1-0/+7
The PSZ-HA* family of USB disk drives from Sony can't handle the REPORT OPCODES command when using the UAS protocol. This patch adds an appropriate quirks entry. Reported-and-tested-by: Till Dörges <doerges@pre-sense.de> Signed-off-by: Alan Stern <stern@rowland.harvard.edu> CC: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200826143229.GB400430@rowland.harvard.edu Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-08-27md/raid5: make sure stripe_size as power of twoYufen Yu1-2/+5
Commit 3b5408b98e4d ("md/raid5: support config stripe_size by sysfs entry") make stripe_size as a configurable value. It just requires stripe_size as multiple of 4KB. In fact, we should make sure stripe_size as power of two. Otherwise, stripe_shift which is the result of ilog2 can not represent the real stripe_size. Then, stripe_hash() and stripe_hash_locks_hash() may get unexpected value. Fixes: 3b5408b98e4d ("md/raid5: support config stripe_size by sysfs entry") Signed-off-by: Yufen Yu <yuyufen@huawei.com> Signed-off-by: Song Liu <songliubraving@fb.com>
2020-08-28powerpc/32s: Disable VMAP stack which CONFIG_ADB_PMUChristophe Leroy1-1/+1
low_sleep_handler() can't restore the context from virtual stack because the stack can hardly be accessed with MMU OFF. For now, disable VMAP stack when CONFIG_ADB_PMU is selected. Fixes: cd08f109e262 ("powerpc/32s: Enable CONFIG_VMAP_STACK") Cc: stable@vger.kernel.org # v5.6+ Reported-by: Giuseppe Sacco <giuseppe@sguazz.it> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/ec96c15bfa1a7415ab604ee1c98cd45779c08be0.1598553015.git.christophe.leroy@csgroup.eu
2020-08-27io_uring: don't bounce block based -EAGAIN retry off task_workJens Axboe1-20/+6
These events happen inline from submission, so there's no need to bounce them through the original task. Just set them up for retry and issue retry directly instead of going over task_work. Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-08-27io_uring: fix IOPOLL -EAGAIN retriesJens Axboe1-5/+9
This normally isn't hit, as polling is mostly done on NVMe with deep queue depths. But if we do run into request starvation, we need to ensure that retries are properly serialized. Reported-by: Andres Freund <andres@anarazel.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-08-27arm64/cpuinfo: Remove unnecessary fallthrough annotationGustavo A. R. Silva1-1/+0
Fallthrough annotations for consecutive default and case labels are not necessary. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.