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2016-07-15Revert "clk: gxbb: expose CLKID_MMC_PCLK"Michael Turquette2-2/+1
This reverts commit e16fb2e6355c1c1b41623af9e01ada196e2af098. Updated documentation from the chip vendor reveals that this clock is not required for correct operation of the MMC controller. As such, do not expose it to DT. Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-07-13clk: samsung: Allow modular build of the Audio Subsystem CLKCON driverSylwester Nawrocki3-12/+11
Any clock dependencies can be properly handled with deferred probing so we can remove core_initcall and switch to a proper loadable platform driver module. This change has been tested on Exynos4412 Odroid U3 based board. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1467987300-31450-1-git-send-email-s.nawrocki@samsung.com
2016-07-13clk: samsung: make clk-s5pv210-audss explicitly non-modularPaul Gortmaker1-27/+2
The Kconfig currently controlling compilation of this code is: arch/arm/mach-s5pv210/Kconfig:config ARCH_S5PV210 arch/arm/mach-s5pv210/Kconfig: bool "Samsung S5PV210/S5PC110" if ARCH_MULTI_V7 ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since this code is already not using module_init, case, the init ordering remains unchanged with this commit. We also delete the MODULE_LICENSE tags etc. since all that information is already contained at the top of the file in the comments. Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160704211220.5685-8-paul.gortmaker@windriver.com
2016-07-13clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocksAndi Shyti1-3/+2
Because the Exynos5433 SPI driver supports the ioclk handling and the following patch: http://marc.info/?l=linux-kernel&m=146787645626318&w=2 fixes a synchronus abort issue, none of the SPI clocks require any critical handling: remove, then, the CLK_IGNORE_UNUSED flag for the SPI related clocks. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1468317736-18841-8-git-send-email-andi.shyti@samsung.com
2016-07-12clk: oxnas: Add hardware dependenciesJean Delvare1-0/+1
The clk-oxnas driver is specific to its architecture, so do not propose it on other architectures, unless build-testing. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160707091844.196a7930@endymion
2016-07-12clk: imx7d: do not set parent of ethernet time/ref clocksStefan Agner1-9/+0
All device trees currently in mainline specify the time clock parent using the assigned-clocks/assigned-clock-parents method, there is no need to statically assign the parent in the core clock driver. Also all current boards provide an Ethernet reference clock for the PHY externally, hence configuring the internal PHY reference clock. Furthermore, and the actual driver of this patch, specify ethernet related parents at that early point in boot leads to a warning: bad: scheduling from the idle thread! The reason for the warning is that setting the parent enables the ENET PLL since we are using CLK_OPS_PARENT_ENABLE. Enabling the ENET PLL can cause clk_pllv3_wait_lock to sleep. See also: commit fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)"). Note that setting the ENET AXI root clock parent also requires ENET PLL to be enabled. However, U-Boot typically leaves the ENET PLL on, hence when the framework sets the parent of the first clock, it does not need to wait for the PLL to come up. But because there is currently no user of that clock, the PLL gets disabled after setting the parent. Therefore, subsequent reparenting calls of any clock which somehow rely on the ENET PLL, need to reenable the ENET PLL which leads to a sleep. Removing those subsequent reparenting calls works around this issue. Also remove comments. The code is really verbose enough. Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160703174813.13970-1-stefan@agner.ch
2016-07-11ARM: dt: sun8i: switch the H3 to the new CCU driverMaxime Ripard1-252/+60
Now that we have a different clock representation, switch to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-15-maxime.ripard@free-electrons.com
2016-07-11clk: sunxi-ng: h3: Fix Kconfig symbol typoMaxime Ripard1-1/+1
The Kconfig symbol for the sun8i SoC family was mistyped. Fix that. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160711203448.18062-2-maxime.ripard@free-electrons.com
2016-07-11clk: sunxi-ng: h3: Fix audio clock divider offsetMaxime Ripard1-2/+2
The code had a typo and got the wrong offset for the hardcoded divider, fix that. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reported-by: Jean-Francois Moine <moinejf@free.fr> Reported-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160711203448.18062-1-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add H3 clocksMaxime Ripard6-0/+1152
Add the list of clocks and resets found in the H3 CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-14-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add N-K-M-P factor clockMaxime Ripard4-0/+244
Introduce support for clocks that use a combination of two linear multipliers (N and K factors), one linear divider (M) and one power of two divider (P). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-13-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add N-K-M Factor clockMaxime Ripard4-0/+227
Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add N-M-factor clock supportMaxime Ripard4-0/+212
Introduce support for clocks that multiply and divide using linear factors. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-11-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add N-K-factor clock supportMaxime Ripard4-0/+223
Introduce support for clocks that use a combination of two linear multipliers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-10-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add M-P factor clock supportMaxime Ripard4-0/+245
Introduce support for the clocks that combine a linear divider and a power-of-two based one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-9-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add dividerMaxime Ripard4-0/+274
Add support for the various dividers (linear, table or pow-of-two based) found in the CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-8-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add phase clock supportMaxime Ripard4-0/+180
Add support for the clocks in the CCU that introduce a phase shift from their parent clock. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-7-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add mux clock supportMaxime Ripard4-0/+282
Some clocks in the Allwinner SoCs clocks unit are just muxes. However, those muxes might also be found in some other complicated clocks that would benefit from the code in there to deal with "advanced" features, like pre-dividers. Introduce a set of helpers to reduce the code duplication in such cases. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-6-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add gate clock supportMaxime Ripard4-0/+138
Some clocks in the Allwinner SoCs clocks unit are just simple gates. Add support for those clocks. Since it's a feature that can also be found in more complex clocks, provide a bunch of helpers that can be reused later on. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-5-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add fractional libMaxime Ripard4-0/+175
Some clocks can be switched to a mode called fractional that have two fixed output rate you can choose from. Add a small library to deal with those clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-4-maxime.ripard@free-electrons.com
2016-07-08clk: sunxi-ng: Add common infrastructureMaxime Ripard9-0/+293
Start our new clock infrastructure by adding the registration code, common structure and common code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com