wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2021-02-09	clk: meson: axg: Remove MIPI enable clock gate	Remi Pommarel	2	-4/+0
2021-02-09	clk: meson-axg: remove CLKID_MIPI_ENABLE	Remi Pommarel	1	-1/+0
2021-02-09	dt-bindings: clock: imx: Switch to my personal address	Fabio Estevam	3	-3/+3
2021-02-09	clk: mediatek: mux: Update parent at enable time	Laurent Pinchart	2	-3/+30
2021-02-09	clk: mediatek: mux: Drop unused clock ops	Laurent Pinchart	2	-70/+4
2021-02-08	clk: mediatek: Select all the MT8183 clocks by default	Enric Balletbo i Serra	1	-0/+11
2021-02-08	clk: remove u300 driver	Arnd Bergmann	4	-1281/+0
2021-02-08	clk: remove sirf prima2/atlas drivers	Arnd Bergmann	10	-3211/+0
2021-02-08	clk: remove zte zx driver	Arnd Bergmann	9	-2691/+0
2021-02-08	clk: remove tango4 driver	Arnd Bergmann	3	-109/+0
2021-02-08	clk: xilinx: move xlnx_vcu clock driver from soc	Michael Tretter	7	-18/+23
2021-02-08	soc: xilinx: vcu: fix alignment to open parenthesis	Michael Tretter	1	-1/+1
2021-02-08	soc: xilinx: vcu: fix repeated word the in comment	Michael Tretter	1	-1/+1
2021-02-08	soc: xilinx: vcu: use bitfields for register definition	Michael Tretter	1	-81/+34
2021-02-08	soc: xilinx: vcu: remove calculation of PLL configuration	Michael Tretter	1	-117/+0
2021-02-08	soc: xilinx: vcu: make the PLL configurable	Michael Tretter	1	-37/+103
2021-02-08	soc: xilinx: vcu: make pll post divider explicit	Michael Tretter	1	-16/+36
2021-02-08	soc: xilinx: vcu: implement clock provider for output clocks	Michael Tretter	1	-37/+160
2021-02-08	soc: xilinx: vcu: register PLL as fixed rate clock	Michael Tretter	2	-2/+19
2021-02-08	soc: xilinx: vcu: implement PLL disable	Michael Tretter	1	-9/+19
2021-02-08	soc: xilinx: vcu: add helpers for configuring PLL	Michael Tretter	1	-67/+104
2021-02-08	soc: xilinx: vcu: add helper to wait for PLL locked	Michael Tretter	1	-19/+27
2021-02-08	soc: xilinx: vcu: drop coreclk from struct xlnx_vcu	Michael Tretter	1	-4/+2
2021-02-08	clk: divider: fix initialization with parent_hw	Michael Tretter	1	-2/+7