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2016-11-08drm/i915: Fix error handling for cursor/sprite plane create failureVille Syrjälä1-2/+2
2016-11-08drm/i915: Grab the rotation from the passed plane state for VLV spritesVille Syrjälä1-1/+1
2016-11-08drm/i915: Remove chipset flush after cache flushChris Wilson2-16/+9
2016-11-08drm/i915: Remove two sloppy inline functions from .hJoonas Lahtinen3-18/+9
2016-11-08drm/i915: Update DRIVER_DATE to 20161108Daniel Vetter1-2/+2
2016-11-07drm/i915: Mark CPU cache as dirty when used for renderingChris Wilson1-0/+8
2016-11-07drm/i915: Add assert for no pending GPU requests during suspend/resume in LR modeImre Deak1-0/+3
2016-11-07drm/i915: Make sure engines are idle during GPU idling in LR modeImre Deak3-0/+33
2016-11-07drm/i915: Avoid early GPU idling due to race with new requestImre Deak1-0/+7
2016-11-07drm/i915: Avoid early GPU idling due to already pending idle workImre Deak1-3/+3
2016-11-07drm/i915: Limit Valleyview and earlier to only using mappable scanoutChris Wilson1-2/+16
2016-11-07drm/i915: Round tile chunks up for constructing partial VMAsChris Wilson1-1/+1
2016-11-07drm/i915: Remove the vma from the object list upon closeChris Wilson1-2/+3
2016-11-04drm/i915: Reinit polling before hpd when resumingLyude1-1/+2
2016-11-04drm/i915: Remove redundant reprobe in i915_drm_resumeLyude1-2/+0
2016-11-04drm/i915/dp: Extend BDW DP audio workaround to GEN9 platformsDhinakaran Pandiyan1-2/+4
2016-11-04drm/i915/dp: BDW cdclk fix for DP audioDhinakaran Pandiyan1-3/+24
2016-11-04drm/i915: Fix pages pin counting around swizzle quirkChris Wilson3-21/+34
2016-11-03drm/i915: Fix test on inputs for vma_compare()Chris Wilson1-1/+1
2016-11-03drm/i915/guc: Cache the client mappingChris Wilson2-20/+20
2016-11-03drm/i915: Tidy slab cache allocationsTvrtko Ursulin1-27/+10
2016-11-03drm/i915: Introduce HAS_64BIT_RELOCJoonas Lahtinen4-4/+10
2016-11-02drm/i915: Show the execlist queue in debugfs/i915_engine_infoChris Wilson1-0/+6
2016-11-02drm/i915: Unify global_list into global_linkJoonas Lahtinen6-23/+23
2016-11-02drm/i915: Move hangcheck code out from i915_irq.cMika Kuoppala6-422/+453
2016-11-02drm/i915/gtt: Mark tlbs dirty on clearMika Kuoppala1-10/+12
2016-11-02drm/i915/gtt: Fix pte clear rangeMika Kuoppala1-5/+7
2016-11-02drm/i915/bxt: Don't set OCL2_LDOFUSE_PWR_DIS bit in phy init sequenceAnder Conselvan de Oliveira1-21/+0
2016-11-01drm/i915: Allow shrinking of userptr objects once againTvrtko Ursulin5-5/+15
2016-11-01drm/i915: Pass dev_priv to intel_init_pm()Ville Syrjälä3-7/+5
2016-11-01drm/i915: Pass dev_priv to ilk_setup_wm_latency() & co.Ville Syrjälä1-23/+15
2016-11-01drm/i915: Pass dev_priv to intel_suspend_hw()Ville Syrjälä3-8/+6
2016-11-01drm/i915: Pass dev_priv to init_clock_gatingVille Syrjälä5-89/+49
2016-11-01drm/i915: Pass dev_priv to single_enabled_crtc()Ville Syrjälä1-13/+9
2016-11-01drm/i915: Pass dev_priv to rest of IS_FOO() macros for the old platformsVille Syrjälä3-7/+7
2016-11-01drm/i915: Pass dev_priv to IS_BROADWATER/IS_CRESTLINEVille Syrjälä3-5/+5
2016-11-01drm/i915: Pass dev_priv to HAS_FW_BLCVille Syrjälä2-2/+2
2016-11-01drm/i915: Pass dev_priv to .get_fifo_size()Ville Syrjälä2-14/+10
2016-11-01drm/i915: Pass dev_priv to i915_pineview_get_mem_freq() and i915_ironlake_get_mem_freq()Ville Syrjälä1-6/+4
2016-11-01drm/i915: Pass dev_priv to IS_PINEVIEW()Ville Syrjälä3-16/+14
2016-11-01drm/i915: Pass dev_priv to IS_MOBILE()Ville Syrjälä3-8/+6
2016-11-01drm/i915: Pass dev_priv to .get_display_clock_speed()Ville Syrjälä3-43/+38
2016-11-01drm/i915: Pass dev_priv to cdclk update funcsVille Syrjälä1-20/+15
2016-11-01drm/i915: Pass dev_priv to intel_crtc_init()Ville Syrjälä1-6/+5
2016-11-01drm/i915: Always use intel_get_crtc_for_pipe()Ville Syrjälä5-19/+26
2016-11-01drm/i915: Pass dev_priv to intel_get_crtc_for_pipe()Ville Syrjälä7-20/+17
2016-11-01drm/i915: Pass dev_priv to g4x wm functionsVille Syrjälä1-9/+9
2016-11-01drm/i915: Pass dev_priv to vlv force pll functionsVille Syrjälä3-13/+12
2016-11-01drm/i915: Pass dev_priv to intel_wait_for_vblank()Ville Syrjälä8-36/+38
2016-11-01drm/i915: Store struct intel_crtc * in {pipe,plane}_to_crtc_mapping[]Ville Syrjälä9-76/+64
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