| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-07-27 | clk: mediatek: Fix asymmetrical PLL enable and disable control |   Chun-Jie Chen | 1 | -4/+16 |
| 2021-07-27 | clk: mediatek: Get regmap without syscon compatible check | Chun-Jie Chen | 4 | -4/+4 |
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index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
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