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2023-08-12ARM: dts: st: spear: split interrupts per cellsKrzysztof Kozlowski2-16/+16
Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20230730111536.98164-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-06arm: dts: Enable device-tree overlay support for sun8i-h3 pi devicesFelix Moessbauer1-0/+19
Add the '-@' DTC option for the sun8i-h3 pi-class devices. This option populates the '__symbols__' node that contains all the necessary symbols for supporting device-tree overlays (for instance from the firmware or the bootloader) on these devices. These devices allow various modules to be connected and this enables users to create out-of-tree device-tree overlays for these modules. Please note that this change does increase the size of the resulting DTB by ~30%. For example, with v6.4 increase in size is as follows: 22909 -> 29564 sun8i-h3-orangepi-lite.dtb 24214 -> 30935 sun8i-h3-bananapi-m2-plus.dtb 23915 -> 30664 sun8i-h3-nanopi-m1-plus.dtb 22969 -> 29537 sun8i-h3-nanopi-m1.dtb 24157 -> 30836 sun8i-h3-nanopi-duo2.dtb 24110 -> 30845 sun8i-h3-orangepi-plus2e.dtb 23472 -> 30037 sun8i-h3-orangepi-one.dtb 24600 -> 31410 sun8i-h3-orangepi-plus.dtb 23618 -> 30230 sun8i-h3-orangepi-2.dtb 22170 -> 28548 sun8i-h3-orangepi-zero-plus2.dtb 23258 -> 29795 sun8i-h3-nanopi-neo-air.dtb 23113 -> 29699 sun8i-h3-zeropi.dtb 22803 -> 29270 sun8i-h3-nanopi-neo.dtb 24674 -> 31318 sun8i-h3-nanopi-r1.dtb 23477 -> 30038 sun8i-h3-orangepi-pc.dtb 24622 -> 31380 sun8i-h3-bananapi-m2-plus-v1.2.dtb 23750 -> 30366 sun8i-h3-orangepi-pc-plus.dtb Signed-off-by: Felix Moessbauer <felix.moessbauer@siemens.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230627133703.355893-1-felix.moessbauer@siemens.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-06arm64: dts: allwinner: h616: Add OrangePi Zero 3 board supportAndre Przywara2-0/+95
The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC, which seems to be just an H616 with more L2 cache. The board itself is a slightly updated version of the Orange Pi Zero 2. It features: - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU - 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2) - AXP313a PMIC (more capable AXP305 on the Zero2) - Raspberry-Pi-1 compatible GPIO header - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports - 1 USB 2.0 host port - 1 USB 2.0 type C port (power supply + OTG) - MicroSD slot - on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2) - 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2) - micro-HDMI port - (yet) unsupported Allwinner WiFi/BT chip Add the devicetree file describing the currently supported features, namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at the moment, though the basic functionality works. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230804170856.1237202-4-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-06dt-bindings: arm: sunxi: document Orange Pi Zero 3 board nameAndre Przywara1-0/+5
The Orange Pi Zero 3 board is an updated version of the Zero 2 board. It uses a SoC called H618, which just seems to be an H616 with more L2 cache. Add the board/SoC compatible string pair to the list of known boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230804170856.1237202-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-06arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DTAndre Przywara2-118/+135
The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some DT nodes with the Zero 2, but comes with a different PMIC. Move the common parts (except the PMIC) into a new shared file, and include that from the existing board .dts file. No functional change, the generated DTB is the same, except for some phandle numbering differences. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230804170856.1237202-2-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-04ARM: dts: at91: remove duplicated entriesClaudiu Beznea1-14/+1
Remove duplicated DTC_FLAGS_<board> := -@ entries which intends to enable the building of device tree overlays. Commit 724ba6751532 ("ARM: dts: Move .dts files to vendor sub-directories") added those entries at the beginning of file w/o removing the already available entries spread though file. Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230721053918.33944-1-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-08-03arm64: dts: hi3798cv200: Fix clocks order of sd0David Yang1-2/+2
"ciu" and "biu" were incorrectly swapped. Fix their order. Signed-off-by: David Yang <mmyangfl@gmail.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2023-08-02ARM: dts: microchip: split interrupts per cellsKrzysztof Kozlowski4-35/+35
Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230730111542.98238-1-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31arm64: dts: amlogic: drop cooling-[min|max]-state from pwm-fanNeil Armstrong2-4/+0
Drop the invalid cooling-min-state & cooling-max-state from the pwm-fan node defined in the bananapi dtsi and odroid-hc4 DT. Link: https://lore.kernel.org/r/20230706-topic-amlogic-upstream-dt-fixes-take3-v1-3-63ed070eeab2@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: meson-g12-common: change aobus-pinctrl node nameNeil Armstrong1-1/+1
Bindings expects name to be "pinctrl", fix it. Link: https://lore.kernel.org/r/20230706-topic-amlogic-upstream-dt-fixes-take3-v1-2-63ed070eeab2@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: meson-g12b-odroid-n2: fix usb hub hog nameNeil Armstrong1-1/+1
This fixes the following dtschema check error: arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dtb: pinctrl@40: bank@40: Unevaluated properties are not allowed ('hog-0' was unexpected) Link: https://lore.kernel.org/r/20230706-topic-amlogic-upstream-dt-fixes-take3-v1-1-63ed070eeab2@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: drop redundant status=okay in sound nodesKrzysztof Kozlowski34-35/+0
status=okay is by default. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230731093615.148949-1-krzysztof.kozlowski@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: meson-g12b-bananapi: switch to enable-gpiosKrzysztof Kozlowski1-1/+1
The recommended name for enable GPIOs property in regulator-gpio is enable-gpios. This is also required by bindings: meson-g12b-bananapi-cm4-cm4io.dtb: regulator-vddio-c: Unevaluated properties are not allowed ('enable-gpio' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230725142703.157547-1-krzysztof.kozlowski@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: add support for C3 power domain controllerXianwei Zhao1-0/+9
Enable power domain controller for Amlogic C3 SoC Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230707003710.2667989-5-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: Add gpio_intc node and pinctrl node for Amlogic C3 SoCsHuqiang Qin1-0/+26
Add gpio interrupt controller device and pinctrl device. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Link: https://lore.kernel.org/r/20230720114639.833436-1-huqiang.qin@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: add board AN400Xianwei Zhao2-0/+40
Add devicetrees support for Amlogic AN400 board based T7 SoC. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20230706091954.3301224-3-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31dt-bindings: arm: amlogic: add board AN400Xianwei Zhao1-0/+1
Add the board AN400 tree bindings based Amloigc T7 SoC. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230706091954.3301224-2-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: minor whitespace cleanup around '='Krzysztof Kozlowski2-2/+2
Use space after '=' sign to match DTS coding style. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230702185327.44625-1-krzysztof.kozlowski@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic-t7-a311d2-khadas-vim4: add initial device-treeLucas Tanure3-0/+210
The Khadas VIM4 uses the Amlogic A311D2 SoC, based on the Amlogic T7 SoC family, on a board with the same form factor as the VIM3 models. - 8GB LPDDR4X 2016MHz - 32GB eMMC 5.1 storage - 32MB SPI flash - 10/100/1000 Base-T Ethernet - AP6275S Wireless (802.11 a/b/g/n/ac/ax, BT5.1) - HDMI 2.1 video - HDMI Input - 1x USB 2.0 + 1x USB 3.0 ports - 1x USB-C (power) with USB 2.0 OTG - 3x LED's (1x red, 1x blue, 1x white) - 3x buttons (power, function, reset) - M2 socket with PCIe, USB, ADC & I2C - 40pin GPIO Header - 1x micro SD card slot Signed-off-by: Lucas Tanure <tanure@linux.com> Link: https://lore.kernel.org/r/20230629073419.207886-5-tanure@linux.com Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31dt-bindings: arm: amlogic: add Amlogic A311D2 bindingsLucas Tanure1-0/+7
Add bindings for the Khadas Vim4 board, using A311D2 Soc from Amlogic T7 family chip. Signed-off-by: Lucas Tanure <tanure@linux.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230629073419.207886-2-tanure@linux.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm: dts: ti: omap: Fix OPP table node namesNishanth Menon10-35/+64
Fix the opp table node names for opps to be compliant with bindings. Signed-off-by: Nishanth Menon <nm@ti.com> Message-ID: <20230724153911.1376830-4-nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-07-31arm: dts: ti: omap: am5729-beagleboneai: Drop the OPPNishanth Menon1-6/+0
opp_slow is not defined in the table in dra7 or derivatives, drop the definition. Signed-off-by: Nishanth Menon <nm@ti.com> Message-ID: <20230724153911.1376830-3-nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-07-31arm: dts: ti: omap: omap36xx: Rename opp_supply nodenameNishanth Menon1-1/+1
Use opp-supply as the proper node name. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Message-ID: <20230724153911.1376830-2-nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-07-31ARM: dts: ti: add missing space before {Krzysztof Kozlowski3-6/+6
Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20230705145755.292927-1-krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechner <david@lechnology.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-07-31ARM: dts: ti: split interrupts per cellsKrzysztof Kozlowski4-24/+19
Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20230730111533.98136-1-krzysztof.kozlowski@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-07-31ARM: dts: Unify pinctrl-single pin group nodes for davinciTony Lindgren4-31/+31
We want to unify the pinctrl-single pin group nodes to use naming "pins". Otherwise non-standad pin group names will add make dtbs checks errors when the pinctrl-single yaml binding gets merged. Cc: Conor Dooley <conor+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Reviewed-by: David Lechner <david@lechnology.com> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Message-ID: <20230523090406.59632-1-tony@atomide.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-07-31dt-bindings: omap: Partially convert omap.txt to yamlAndrew Davis2-99/+176
Convert omap.txt to yaml. CC: linux-omap@vger.kernel.org Signed-off-by: Andrew Davis <afd@ti.com> [reduced to only OMAP3/4/5 and AM3, adding Epson Moverio BT-200] Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20230515074512.66226-2-andreas@kemnade.info> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-07-31ARM: dts: at91: ksz9477_evb: Add tx-internal-delay-ps property for port5Lukasz Majewski1-0/+1
Without this change the KSZ9477 Evaluation board's Linux (v6.5-rc1) shows following device warning: 'ksz-switch spi1.0: Port 5 interpreting RGMII delay settings based on "phy-mode" property, please update device tree to specify "rx-internal-delay-ps" and "tx-internal-delay-ps"' This is not critical, as KSZ driver by itself assigns default value of tx delay to 2000 ps (as 'rgmii-txid' is set as PHY mode). However, to avoid extra warnings in logs - the missing 'tx-internal-delay-ps' has been specified with the default value of 2000 ps. Signed-off-by: Lukasz Majewski <lukma@denx.de> Link: https://lore.kernel.org/r/20230727080656.3828397-1-lukma@denx.de Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31ARM: dts: at91: ksz9477_evb: Add missing timer nodesLukasz Majewski1-0/+12
Without this change the KSZ9477-EVB board hangs just after passing execution flow from u-boot to Linux kernel. This code has been copied from at91-sama5d3_xplained.dts. Test setup: Linux 6.5-rc1 Config: arch/arm/configs/sama5_defconfig Toolchain: gcc-linaro-7.3.1-2018.05-x86_64_arm-linux-gnueabi Signed-off-by: Lukasz Majewski <lukma@denx.de> Link: https://lore.kernel.org/r/20230712152111.3756211-1-lukma@denx.de Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31ARM: dts: at91-vinco: Fix "status" valuesRob Herring1-2/+2
The defined value for "status" is "disabled", not "disable". Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230626221010.3946263-1-robh@kernel.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31riscv: dts: allwinner: d1: Add GPADC nodeMaksim Kiselev1-0/+10
This patch adds declaration of the general purpose ADC for D1 and T113s SoCs. Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230619154252.3951913-5-bigunclemax@gmail.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-29arm64: dts: microchip: minor whitespace cleanup around '='Krzysztof Kozlowski1-6/+6
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230702185108.43959-1-krzysztof.kozlowski@linaro.org [claudiu.beznea: added link] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-29ARM: dts: microchip: add missing space before {Krzysztof Kozlowski9-9/+9
Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230705150058.293942-1-krzysztof.kozlowski@linaro.org [claudiu.beznea: added link] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-29ARM: dts: microchip: minor whitespace cleanup around '='Krzysztof Kozlowski1-1/+1
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230702185108.43959-1-krzysztof.kozlowski@linaro.org [claudiu.beznea: added link] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-27ARM: tegra: Provide specific compatible string for Nexus 7 panelThierry Reding1-8/+4
panel-lvds alone is not a valid compatible string and we always need a specific compatible string as well. Nexus 7 can come with one of (at least) two panels, so pick one of them as the specific compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27ARM: tegra: Use Hannstar HSD101PWW2 on Pegatron ChagallThierry Reding1-1/+1
The LVDS bindings require a specific compatible string in addition to the generic "panel-lvds". Add the HannStar HSD101PWW2 which is used on a similar device (ASUS TF201) and seems to work fine with slightly modified timings in DT. Suggested-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27ARM: tegra: Reuse I2C3 for NVECThierry Reding1-10/+9
Instead of duplicating the I2C3 node and adding NVEC specific properties, reuse the I2C3 node, extend it with NVEC specific properties and drop properties that are not needed by NVEC. This results in a DTB that is a bit cleaner and avoids accidentally using I2C3 and NVEC which would have them fight over the same hardware resources. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27arm64: tegra: Add blank lines for better readabilityThierry Reding1-0/+8
Add a few blank lines to visually separate blocks in the Jetson AGX Orin device tree. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27arm64: tegra: Remove {clock,reset}-names from VIC powergateThierry Reding1-2/+0
According to the device tree bindings, the powergate definition nodes don't contain clock-names and reset-names properties, so remove them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27arm64: tegra: Drop incorrect maxim,disable-etr on SmaugKrzysztof Kozlowski1-1/+0
There is no "maxim,disable-etr" property (but there is maxim,enable-etr), neither in the bindings nor in the Linux driver: tegra210-smaug.dtb: regulator@1c: Unevaluated properties are not allowed ('maxim,disable-etr' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27arm64: tegra: Add SPI device tree nodes for Tegra234Gautham Srinivasan1-0/+57
Create the device tree nodes for the SPI1, SPI2 and SPI3 controllers found on Tegra234. Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27arm64: tegra: Enable UARTA and UARTE for Orin NanoGautham Srinivasan1-0/+14
Activate UARTA and UARTE functionalities for Orin Nano. - UARTA is accessible via the 40-pin header with pin 8 and 10 (TX/RX) - UARTE utilizes the M2.E connector Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27arm64: tegra: Add UARTE device tree node on Tegra234Gautham Srinivasan1-0/+9
This commit adds the device tree node for UARTE on Tegra234. Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27arm64: dts: renesas: spider-cpu: Add GP LEDsGeert Uytterhoeven1-0/+20
Describe the two General Purpose LEDs LED7 and LED8 on the Spider CPU board, so they can be used as indicator LEDs. Note that General Purpose LEDs LED9 to LED11 are not added, as they are connected to GPIO block 4, which can only be accessed from the Control Domain. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/fdaf6c700b624851039a60733c7f73a413c6d2c5.1690447094.git.geert+renesas@glider.be
2023-07-27arm64: dts: renesas: r8a779f0: Add INTC-EX nodeGeert Uytterhoeven1-0/+15
Add the device node for the Interrupt Controller for External Devices (INTC-EX) on the Renesas R-Car S4-8 (R8A779F0) SoC, which serves external IRQ pins IRQ[0-5]. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/8f5612c0353b8c90f98366978563340d93c7ae58.1690447013.git.geert+renesas@glider.be
2023-07-27arm64: dts: renesas: rzg2ul-smarc: Add support for enabling MTU3Biju Das3-0/+30
Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2UL SMARC EVK. The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when PMOD_MTU3 macro is enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230727081848.100834-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-07-27arm64: dts: renesas: r9a07g043: Add MTU3a nodeBiju Das1-0/+70
Add MTU3a node to R9A07G043 (RZ/{G2UL,Five}) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230727081848.100834-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-07-27ARM dts: renesas: armadillo800eva: Switch to enable-gpiosKrzysztof Kozlowski1-1/+1
The recommended name for enable GPIOs property in regulator-gpio is "enable-gpios". This is also required by bindings: r8a7740-armadillo800eva.dtb: regulator-vccq-sdhi0: Unevaluated properties are not allowed ('enable-gpio' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230726070241.103545-1-krzysztof.kozlowski@linaro.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-07-27arm64: zynqmp: Describe interrupts by using macrosMichal Simek1-75/+110
Use arm-gic.h and irq.h for interrupt description. It helps to improve readability of device tree file. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9d5bd17f37772be186cab17b06cc21351d36ff62.1688986332.git.michal.simek@amd.com
2023-07-26arm64: tegra: Adapt to LP855X bindings changesArtur Weber1-4/+2
Change underscores in ROM node names to dashes, and remove deprecated pwm-period property. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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