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2024-02-22arm64: dts: renesas: rzg3s-smarc-som: Guard Ethernet IRQ GPIO hogsClaudiu Beznea1-0/+4
Ethernet IRQ GPIOs are marked as GPIO hogs. Thus, these GPIOs are requested at probe time without considering if there are other peripherals that need them. The Ethernet IRQ GPIOs are shared with SDHI2. Selection between Ethernet and SDHI2 is done through a hardware switch. To avoid scenarios where one wants to boot with SDHI2 support and some SDHI pins are not propertly configured because of the GPIO hogs, guard the Ethernet IRQ GPIO hogs with the proper build flag. Fixes: 932ff0c802c6 ("arm64: dts: renesas: rzg3s-smarc-som: Enable the Ethernet interfaces") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-22arm64: dts: renesas: r9a08g045: Add missing interrupts to IRQC nodeLad Prabhakar1-2/+6
The IRQC block on the RZ/G3S (R9A08G045) SoC supports ECCRAM error interrupts too. Add those missing interrupts to the IRQC node. Fixes: 837918aa3fdd ("arm64: dts: renesas: r9a08g045: Add IA55 interrupt controller node") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240205144421.51195-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-22arm64: dts: renesas: rzg2l: Add missing interrupts to IRQC nodesLad Prabhakar3-4/+52
The IRQC IP block supports Bus error and ECCRAM interrupts on RZ/G2L and alike SoC's (listed below). Update the IRQC nodes with the missing interrupts, and additionally, include the 'interrupt-names' properties in the IRQC nodes so that the driver can parse interrupts by name. - R9A07G043U - RZ/G2UL - R9A07G044L/R9A07G044LC - RZ/{G2L,G2LC} - R9A07G054 - RZ/V2L Fixes: 5edc51af5b30 ("arm64: dts: renesas: r9a07g044: Add IRQC node") Fixes: 48ab6eddd8bb ("arm64: dts: renesas: r9a07g043u: Add IRQC node") Fixes: 379478ab09e0 ("arm64: dts: renesas: r9a07g054: Add IRQC node") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240205144421.51195-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-22arm64: dts: renesas: r8a779h0: Add CA76 operating pointsDuy Nguyen1-0/+20
Add operating points for running the Cortex-A76 CPU cores on R-Car V4M at various speeds, up to the Normal (1.0 GHz). Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/736b5836ec2b54e8b36712866309dc1b7ee1fc48.1706796979.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: r8a779h0: Add CPU core clocksDuy Nguyen1-0/+4
Describe the clocks for the four Cortex-A76 CPU cores. CA76 CPU cores 0,1,2,3 are clocked by ZC0,ZC1,ZC2,ZC3. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/c64cf6ca1590fa1a36b90a18fd70c831d5b8318e.1706796979.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: r8a779h0: Add CPUIdle supportDuy Nguyen1-0/+17
Support CPUIdle for ARM Cortex-A76 on R-Car V4M. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/848d176bdbcaf3bc44e5dae555afa9c812a19fd1.1706796979.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: r8a779h0: Add secondary CA76 CPU coresDuy Nguyen1-0/+50
Complete the description of the Cortex-A76 CPU cores and L3 cache controllers on the Renesas R-Car V4M (R8A779H0) SoC, including CPU topology and PSCI support for enabling CPU cores. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/c2a38a0da74915bf2a9171e53886c83a1c732934.1706796979.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: r8a779h0: Add L3 cache controllerDuy Nguyen1-0/+8
Describe the cache configuration for the first Cortex-A76 CPU core on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/9d56a46892c5e0957d244370e6809013cf815905.1706796979.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: r8a779h0: Add GPIO nodesCong Dang1-0/+120
Add device nodes for the General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/d4c1c40404ab84c7e7c07612077ca1a319ae7283.1706796918.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: gray-hawk-single: Add I2C0 and EEPROMsGeert Uytterhoeven1-0/+41
Enable the I2C0 bus on the Gray Hawk Single board, and describe the I2C EEPROMs present. Based on patches for Gray Hawk in the BSP by Hai Pham. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/960595394a274b675f1ec9ec1c324e4cc1ac1f77.1706796660.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: r8a779h0: Add I2C nodesHai Pham1-0/+56
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/7dbbe13428273c5786ddff6ea7af6724fcdd4de8.1706796660.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: ulcb-kf: Adapt sound 5v regulator to schematicsWolfram Sang1-6/+8
Sound uses the standard 5V supply, so rename the fixed regulator as such. Also add properties documenting it is always on, also during boot. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240129212350.33370-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-22arm64: dts: renesas: ulcb-kf: Adapt 1.8V HDMI regulator to schematicsWolfram Sang1-6/+8
It is named T1.8V in the schematics. Also add properties documenting it is always on, also during boot. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240129212350.33370-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-22arm64: dts: renesas: ulcb-kf: Add regulators for PCIe ch1Wolfram Sang1-0/+21
Without them, no power, so cards do not get recognized. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240129135840.28988-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-02-22arm64: dts: renesas: gray-hawk-single: Add serial console pin controlGeert Uytterhoeven1-0/+18
Complete the descriptions of the serial console and the external serial clock by adding pin control. Based on patches for Gray Hawk in the BSP by Hai Pham and Nghia Nguyen. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b1eb2d3364d5ead7f7bcf7a737c5914971db64d3.1706266286.git.geert+renesas@glider.be
2024-02-22arm64: dts: renesas: r8a779h0: Add pinctrl device nodeHai Pham1-0/+8
Add a device node for the Pin Function Controller on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/0ab32290014b64ddbee5c9ec2808c8294d0b6192.1706266286.git.geert+renesas@glider.be
2024-02-06arm64: dts: renesas: gray-hawk-single: Enable watchdog timerGeert Uytterhoeven1-0/+5
Enable the watchdog timer on the Gray Hawk Single board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/cf6effafd9e0472a457eed9d84a834abc3e1c833.1706790320.git.geert+renesas@glider.be
2024-02-06arm64: dts: renesas: r8a779h0: Add RWDT nodeMinh Le1-0/+11
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Minh Le <minh.le.aj@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/43bb03f3baa87b4be8ce953b1955df6b89387e4c.1706790320.git.geert+renesas@glider.be
2024-02-06arm64: dts: renesas: Improve TMU interrupt descriptionsGeert Uytterhoeven15-38/+151
Add the input capture interrupt on Timer Unit instances that have it. Add "interrupt-names" properties for clarity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5c70ad8c2ea14333616c5add31a4a958f4a47081.1705325654.git.geert+renesas@glider.be
2024-02-06ARM: dts: renesas: Improve TMU interrupt descriptionsGeert Uytterhoeven3-4/+16
Add the input capture interrupt on Timer Unit instances that have it. Add "interrupt-names" properties for clarity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/389a18ee2cea96726462c28463cf212330f74ee3.1705325654.git.geert+renesas@glider.be
2024-01-31arm64: dts: renesas: r9a07g043u: Add CSI and CRU nodesBiju Das1-0/+69
Add CSI and CRU nodes r9a07g043 (RZ/G2UL) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240126133116.121981-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-01-31arm64: dts: renesas: Add Gray Hawk Single board supportGeert Uytterhoeven2-0/+54
Add initial support for the Renesas Gray Hawk Single board, which is based on the R-Car V4M (R8A779H0) SoC: - Memory, - Crystal oscillators, - Serial console. Based on the White Hawk Single DTS, and on a patch for the Gray Hawk board stack in the BSP by Hai Pham. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be