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The driver already assumes transitions will not take longer than
APPLE_DVFS_TRANSITION_TIMEOUT in apple_soc_cpufreq_set_target(), so it
makes little sense to set CPUFREQ_ETERNAL as the transition latency
when the transistion latency is not given by the opp-table.
Reviewed-by: Christian Loehle <christian.loehle@arm.com>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Apple A11 SoC takes a long time to switch. Maximum switch time
observed is 345us, so increase the cluster switch timeout to 400us
to be safe.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Apple A7-A9(X) SoCs requires 32-bit reads on the status register. Newer
SoCs accepts 32-bit reads on the status register as well.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Support for SoC that has a different APPLE_DVFS_CMD_PS1 will be added soon,
so modify the driver first to allow it to be configured per-SoC.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Newer device do not use this. It is not known what this field does,
but change the behavior to be same as macOS to be safe.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Add compatibles for Apple A7-A11, T2 SoCs.
Apple A7, A8, A8X gets the per-SoC compatible and the A7
"apple,s5l8960x-cluster-cpufreq" compatible.
Apple A9, A9X, A10, A10X, T2, A11 gets the per-SoC compatible, M1
"apple,t8103-cluster-cpufreq" compatible, then the
"apple,cluster-cpufreq" fallback compatible.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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