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2024-05-01ARM: dts: aspeed: ahe50dc: Update lm25066 regulator nameZev Weiss1-1/+1
A recent change to the lm25066 driver changed the name of its regulator from vout0 to vout; device-tree users of lm25066's regulator functionality (of which ahe50dc is the only one) thus require a corresponding update. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Cc: Conor Dooley <conor+dt@kernel.org> Cc: Guenter Roeck <linux@roeck-us.net> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Add vendor prefixes to lm25066 compat stringsZev Weiss2-3/+3
Due to the way i2c driver matching works (falling back to the driver's id_table if of_match_table fails) this didn't actually cause any misbehavior, but let's add the vendor prefixes so things actually work the way they were intended to. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROMZev Weiss2-0/+18
Like the more recently added ASRock BMC platforms, e3c246d4i and romed8hm3 also have the BMC's MAC address available in the baseboard FRU EEPROM, so let's add support for using it. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: system1: IBM System1 BMC boardAndrew Geissler2-0/+1624
Added a device tree for IBM system1 BMC board, which uses AST2600 SoC. Signed-off-by: Andrew Geissler <geissonator@yahoo.com> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Link: https://lore.kernel.org/r/20240125212154.4028640-3-ninad@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01dt-bindings: arm: aspeed: add IBM system1-bmcNinad Palsule1-0/+1
Document the new compatibles used on IBM system1-bmc Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Link: https://lore.kernel.org/r/20240125212154.4028640-2-ninad@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: FSI interrupt supportEddie James2-0/+6
Enable FSI interrupt controllers for AST2600 and P10BMC hub master. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20240215220759.976998-27-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Modify GPIO line namePeter Yin1-9/+29
Add: "reset-cause-platrst", "cpu0-err-alert", "leakage-detect-alert", "presence-post-card", "ac-power-button", "P0_I3C_APML_ALERT_L", "irq-uv-detect-alert", "irq-hsc-alert", "cpu0-prochot-alert", "cpu0-thermtrip-alert", "reset-cause-pcie", "pvdd11-ocp-alert" Rename: "power-cpu-good" to "host0-ready", "host-ready-n" to "post-end-n Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-13-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Add retimer devicePeter Yin1-0/+8
Add pt5161l device in i2c bus12 and bus21. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-12-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Revise node namePeter Yin1-3/+3
Revise max31790 and delta_brick node name. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-11-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Add ltc4286 devicePeter Yin1-0/+7
Add ltc4286 device. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-10-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Add NIC Fru devicePeter Yin1-0/+6
Add MB NIC Device Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-9-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Revise max31790 addressPeter Yin1-4/+4
Revise max31790 address from 0x30 to 0x5e Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-8-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Add PDB temperaturePeter Yin1-1/+6
Add PDB temperature sensor. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-7-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Add spi-gpioPeter Yin1-0/+21
Add spi-gpio for tpm device. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-6-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Add cpu power good line namePeter Yin1-1/+1
Add a line name for cpu power good. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-5-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Remove VuartPeter Yin1-4/+0
Remove vuart to avoid port conflict with uart2 Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-4-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: mapping ttyS2 to UART4.Peter Yin1-2/+2
Change routing to match SOL(Serial Over LAN) settings. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-3-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Revise SGPIO line name.Peter Yin1-2/+2
The same name as reset-control-smb-e1s change to reset-control-smb-e1s-0 and reset-control-smb-e1s-0. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20240412091600.2534693-2-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: add sgpio line nameYang Chen1-0/+149
Add the SGPIO line name that the project's function can use by the meaningful name. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-12-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: add gpio line nameYang Chen1-0/+30
Add the GPIO line name that the project's function can use by the meaningful name. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-11-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: Add led-fan-fault gpioYang Chen1-0/+17
Add led-fan-fault gpio pin on the PCA9555 on the i2c bus 0. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-10-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: add fan rpm controllerYang Chen1-0/+42
Add fan rpm controller max31790 on all bus of FCB. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-9-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: add bus labels and aliasesYang Chen1-6/+16
Add bus labels and aliases for the fan control board. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-8-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: correct the address of eepromYang Chen1-2/+2
Correct the address from 0x51 to 0x54 of eeprom on the i2c bus 1 Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-7-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: Add temperature sensorYang Chen1-1/+6
Add one temperature sensor on i2c bus 1 Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-6-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: Enable power monitor deviceYang Chen1-0/+22
Enable power monitor device ina230 and ltc2945 on the i2c bus 0 Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-5-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: Change sgpio useYang Chen1-1/+1
Correct the sgpio use from sgpiom1 to sgpiom0 Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-4-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: Modify mac3 settingYang Chen1-2/+5
Remove the unuse setting and fix the link to 100 M Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-3-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: minerva: Revise the name of DTSYang Chen2-2/+2
The project Minerva which is the platform used by Meta has two boards: the Chassis Management Module (Minerva) and the Motherboard (Harma), so change the DTS name to minerva here for CMM use. Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231212075200.983536-2-yangchen.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Harma: Add Meta Harma (AST2600) BMCPeter Yin2-0/+586
Add linux device tree entry related to the Meta(Facebook) computer-node system use an AT2600 BMC. This node is named "Harma". Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231211162656.2564267-3-peteryin.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01dt-bindings: arm: aspeed: add Meta Harma boardPeter Yin1-0/+1
Document the new compatibles used on Meta Harma. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://lore.kernel.org/r/20231211162656.2564267-2-peteryin.openbmc@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: asrock: Add ASRock X570D4U BMCRenze Nicolai2-0/+378
This is a relatively low-cost AST2500-based Amd Ryzen 5000 Series micro-ATX board that we hope can provide a decent platform for OpenBMC development. This initial device-tree provides the necessary configuration for basic BMC functionality such as serial console, KVM support and POST code snooping. Signed-off-by: Renze Nicolai <renze@rnplus.nl> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231202003908.3635695-3-renze@rnplus.nl Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01dt-bindings: arm: aspeed: add Asrock X570D4U boardRenze Nicolai1-0/+1
Document Asrock X570D4U compatible. Signed-off-by: Renze Nicolai <renze@rnplus.nl> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20231202003908.3635695-2-renze@rnplus.nl Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01ARM: dts: aspeed: Add ASRock SPC621D8HM3 BMCZev Weiss2-0/+325
This is a Xeon board broadly similar (aside from CPU vendor) to the already-support romed8hm3 (half-width, single-socket, ast2500). It doesn't require anything terribly special for OpenBMC support, so this device-tree should provide everything necessary for basic functionality with it. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Link: https://lore.kernel.org/r/20231120121954.19926-6-zev@bewilderbeest.net Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01dt-bindings: arm: aspeed: document ASRock SPC621D8HM3Zev Weiss1-0/+1
Document ASRock SPC621D8HM3 board compatible. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231120121954.19926-5-zev@bewilderbeest.net Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-03-24Linux 6.9-rc1Linus Torvalds1-2/+2
2024-03-24efi: fix panic in kdump kernelOleksandr Tymoshenko1-0/+2
Check if get_next_variable() is actually valid pointer before calling it. In kdump kernel this method is set to NULL that causes panic during the kexec-ed kernel boot. Tested with QEMU and OVMF firmware. Fixes: bad267f9e18f ("efi: verify that variable services are supported") Signed-off-by: Oleksandr Tymoshenko <ovt@google.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-03-24x86/efistub: Don't clear BSS twice in mixed modeArd Biesheuvel1-1/+2
Clearing BSS should only be done once, at the very beginning. efi_pe_entry() is the entrypoint from the firmware, which may not clear BSS and so it is done explicitly. However, efi_pe_entry() is also used as an entrypoint by the mixed mode startup code, in which case BSS will already have been cleared, and doing it again at this point will corrupt global variables holding the firmware's GDT/IDT and segment selectors. So make the memset() conditional on whether the EFI stub is running in native mode. Fixes: b3810c5a2cc4a666 ("x86/efistub: Clear decompressor BSS in native EFI entrypoint") Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-03-24x86/efistub: Call mixed mode boot services on the firmware's stackArd Biesheuvel1-0/+9
Normally, the EFI stub calls into the EFI boot services using the stack that was live when the stub was entered. According to the UEFI spec, this stack needs to be at least 128k in size - this might seem large but all asynchronous processing and event handling in EFI runs from the same stack and so quite a lot of space may be used in practice. In mixed mode, the situation is a bit different: the bootloader calls the 32-bit EFI stub entry point, which calls the decompressor's 32-bit entry point, where the boot stack is set up, using a fixed allocation of 16k. This stack is still in use when the EFI stub is started in 64-bit mode, and so all calls back into the EFI firmware will be using the decompressor's limited boot stack. Due to the placement of the boot stack right after the boot heap, any stack overruns have gone unnoticed. However, commit 5c4feadb0011983b ("x86/decompressor: Move global symbol references to C code") moved the definition of the boot heap into C code, and now the boot stack is placed right at the base of BSS, where any overruns will corrupt the end of the .data section. While it would be possible to work around this by increasing the size of the boot stack, doing so would affect all x86 systems, and mixed mode systems are a tiny (and shrinking) fraction of the x86 installed base. So instead, record the firmware stack pointer value when entering from the 32-bit firmware, and switch to this stack every time a EFI boot service call is made. Cc: <stable@kernel.org> # v6.1+ Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-03-24x86/boot/64: Move 5-level paging global variable assignments backTom Lendacky1-9/+7
Commit 63bed9660420 ("x86/startup_64: Defer assignment of 5-level paging global variables") moved assignment of 5-level global variables to later in the boot in order to avoid having to use RIP relative addressing in order to set them. However, when running with 5-level paging and SME active (mem_encrypt=on), the variables are needed as part of the page table setup needed to encrypt the kernel (using pgd_none(), p4d_offset(), etc.). Since the variables haven't been set, the page table manipulation is done as if 4-level paging is active, causing the system to crash on boot. While only a subset of the assignments that were moved need to be set early, move all of the assignments back into check_la57_support() so that these assignments aren't spread between two locations. Instead of just reverting the fix, this uses the new RIP_REL_REF() macro when assigning the variables. Fixes: 63bed9660420 ("x86/startup_64: Defer assignment of 5-level paging global variables") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/2ca419f4d0de719926fd82353f6751f717590a86.1711122067.git.thomas.lendacky@amd.com
2024-03-24x86/boot/64: Apply encryption mask to 5-level pagetable updateTom Lendacky1-1/+1
When running with 5-level page tables, the kernel mapping PGD entry is updated to point to the P4D table. The assignment uses _PAGE_TABLE_NOENC, which, when SME is active (mem_encrypt=on), results in a page table entry without the encryption mask set, causing the system to crash on boot. Change the assignment to use _PAGE_TABLE instead of _PAGE_TABLE_NOENC so that the encryption mask is set for the PGD entry. Fixes: 533568e06b15 ("x86/boot/64: Use RIP_REL_REF() to access early_top_pgt[]") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/8f20345cda7dbba2cf748b286e1bc00816fe649a.1711122067.git.thomas.lendacky@amd.com
2024-03-24x86/cpu: Add model number for another Intel Arrow Lake mobile processorTony Luck1-0/+1
This one is the regular laptop CPU. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322161725.195614-1-tony.luck@intel.com
2024-03-24x86/fpu: Keep xfd_state in sync with MSR_IA32_XFDAdamos Ttofari2-6/+13
Commit 672365477ae8 ("x86/fpu: Update XFD state where required") and commit 8bf26758ca96 ("x86/fpu: Add XFD state to fpstate") introduced a per CPU variable xfd_state to keep the MSR_IA32_XFD value cached, in order to avoid unnecessary writes to the MSR. On CPU hotplug MSR_IA32_XFD is reset to the init_fpstate.xfd, which wipes out any stale state. But the per CPU cached xfd value is not reset, which brings them out of sync. As a consequence a subsequent xfd_update_state() might fail to update the MSR which in turn can result in XRSTOR raising a #NM in kernel space, which crashes the kernel. To fix this, introduce xfd_set_state() to write xfd_state together with MSR_IA32_XFD, and use it in all places that set MSR_IA32_XFD. Fixes: 672365477ae8 ("x86/fpu: Update XFD state where required") Signed-off-by: Adamos Ttofari <attofari@amazon.de> Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240322230439.456571-1-chang.seok.bae@intel.com Closes: https://lore.kernel.org/lkml/20230511152818.13839-1-attofari@amazon.de
2024-03-24Documentation/x86: Document that resctrl bandwidth control units are MiBTony Luck1-4/+4
The memory bandwidth software controller uses 2^20 units rather than 10^6. See mbm_bw_count() which computes bandwidth using the "SZ_1M" Linux define for 0x00100000. Update the documentation to use MiB when describing this feature. It's too late to fix the mount option "mba_MBps" as that is now an established user interface. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322182016.196544-1-tony.luck@intel.com
2024-03-23x86/mpparse: Register APIC address only onceThomas Gleixner1-5/+5
The APIC address is registered twice. First during the early detection and afterwards when actually scanning the table for APIC IDs. The APIC and topology core warn about the second attempt. Restrict it to the early detection call. Fixes: 81287ad65da5 ("x86/apic: Sanitize APIC address setup") Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.297774848@linutronix.de
2024-03-23x86/topology: Handle the !APIC case gracefullyThomas Gleixner1-0/+11
If there is no local APIC enumerated and registered then the topology bitmaps are empty. Therefore, topology_init_possible_cpus() will die with a division by zero exception. Prevent this by registering a fake APIC id to populate the topology bitmap. This also allows to use all topology query interfaces unconditionally. It does not affect the actual APIC code because either the local APIC address was not registered or no local APIC could be detected. Fixes: f1f758a80516 ("x86/topology: Add a mechanism to track topology via APIC IDs") Reported-by: Guenter Roeck <linux@roeck-us.net> Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.242709302@linutronix.de
2024-03-23x86/topology: Don't evaluate logical IDs during early bootThomas Gleixner1-5/+7
The local APICs have not yet been enumerated so the logical ID evaluation from the topology bitmaps does not work and would return an error code. Skip the evaluation during the early boot CPUID evaluation and only apply it on the final run. Fixes: 380414be78bf ("x86/cpu/topology: Use topology logical mapping mechanism") Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.186943142@linutronix.de
2024-03-23x86/cpu: Ensure that CPU info updates are propagated on UPThomas Gleixner3-37/+14
The boot sequence evaluates CPUID information twice: 1) During early boot 2) When finalizing the early setup right before mitigations are selected and alternatives are patched. In both cases the evaluation is stored in boot_cpu_data, but on UP the copying of boot_cpu_data to the per CPU info of the boot CPU happens between #1 and #2. So any update which happens in #2 is never propagated to the per CPU info instance. Consolidate the whole logic and copy boot_cpu_data right before applying alternatives as that's the point where boot_cpu_data is in it's final state and not supposed to change anymore. This also removes the voodoo mb() from smp_prepare_cpus_common() which had absolutely no purpose. Fixes: 71eb4893cfaf ("x86/percpu: Cure per CPU madness on UP") Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.127642785@linutronix.de
2024-03-22lkdtm/bugs: Improve warning message for compilers without counted_by supportNathan Chancellor1-1/+1
The current message for telling the user that their compiler does not support the counted_by attribute in the FAM_BOUNDS test does not make much sense either grammatically or semantically. Fix it to make it correct in both aspects. Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20240321-lkdtm-improve-lack-of-counted_by-msg-v1-1-0fbf7481a29c@kernel.org Signed-off-by: Kees Cook <keescook@chromium.org>
2024-03-22overflow: Change DEFINE_FLEX to take __counted_by memberKees Cook8-22/+58
The norm should be flexible array structures with __counted_by annotations, so DEFINE_FLEX() is updated to expect that. Rename the non-annotated version to DEFINE_RAW_FLEX(), and update the few existing users. Additionally add selftests for the macros. Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20240306235128.it.933-kees@kernel.org Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by: Kees Cook <keescook@chromium.org>
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