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2019-11-03arm64: dts: lg1313: DT fix s/#interrupts-cells/#interrupt-cells/Geert Uytterhoeven1-1/+1
The standard DT property is called "#interrupt-cells". Link: https://lore.kernel.org/r/20191101160356.32034-2-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03arm64: dts: lg1312: DT fix s/#interrupts-cells/#interrupt-cells/Geert Uytterhoeven1-1/+1
The standard DT property is called "#interrupt-cells". Link: https://lore.kernel.org/r/20191101160356.32034-1-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03ARM: dts: mmp3-dell-ariel: Add a serial point aliasLubomir Rintel1-0/+4
Make sure UART3, where the console is, is called ttyS2. That is consistent with the early console. Link: https://lore.kernel.org/r/20191031163455.1711872-5-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03ARM: dts: mmp3-dell-ariel: Add a name to /memory nodeLubomir Rintel1-1/+1
Ponted out by DTC: <stdout>: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Link: https://lore.kernel.org/r/20191031163455.1711872-4-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03ARM: dts: mmp3: Fix /soc/watchdog node nameLubomir Rintel1-1/+1
There's a typo there that rightfully upsets DTS: <stdout>: Warning (simple_bus_reg): /soc/watchdog@2c000620: simple-bus unit address format error, expected "e0000620" Link: https://lore.kernel.org/r/20191031163455.1711872-3-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03ARM: dts: mmp3: Add a name to /clocks nodeLubomir Rintel1-1/+1
It should have one and DTC is indeed unhappy about its absence: <stdout>: Warning (unit_address_vs_reg): /soc/clocks: node has a reg or ranges property, but no unit name Link: https://lore.kernel.org/r/20191031163455.1711872-2-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03ARM: dts: Add RDA8810PL GPIO controllersManivannan Sadhasivam1-0/+48
Add GPIO controllers for RDA8810PL SoC. There are 4 GPIO controllers in this SoC with maximum of 32 gpios. Except GPIOC, all controllers are capable of generating edge/level interrupts from first 8 lines. Link: https://lore.kernel.org/r/20191030101154.6312-2-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-02dt-bindings: arm: sunxi: add FriendlyARM NanoPi Duo2Karl Palsson1-0/+5
Adds bindings for the newly added NanoPi Duo2 board. Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-02ARM: dts: sun8i: add FriendlyARM NanoPi Duo2Karl Palsson2-0/+175
This is an Allwinner H3 based board, with 512MB ram, a USB OTG port, microsd slot, an onboard AP6212A wifi/bluetooth module, and a CSI connector. Full details and schematic available from vendor: http://wiki.friendlyarm.com/wiki/index.php/NanoPi_Duo2 Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-02arm64: allwinner: h6: Enable GPU node for Tanix TX6Clément Péron1-0/+4
Unlike other H6 boards, Tanix TX6 doesn't have a PMIC so we can enable the GPU without providing a specific power supply. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+Geert Uytterhoeven2-0/+32
Add initial support for the Renesas Salvator-X 2nd version development board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM. The memory map is as follows: - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff 0x000480000000 -> 0x004ffffffff - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff Based on a patch in the BSP by Takeshi Kihara <takeshi.kihara.df@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-10-geert+renesas@glider.be