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2023-04-06ARM: dts: qcom: sdx65: add IPA informationAlex Elder2-0/+44
Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust Zone on this platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327195605.2854123-2-elder@linaro.org
2023-04-04dt-bindings: arm: qcom: Add Yiming LTE dongle uz801-v3.0 (yiming-uz801v3)Yang Xiwen1-0/+1
Add a compatible for Yiming LTE dongle uz801-v3.0 Signed-off-by: Yang Xiwen <forbidden405@foxmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/tencent_61B4697855AD14BA2930AC7B21FFC75C4406@qq.com
2023-04-04dt-bindings: vendor-prefixes: Add Henan Yiming Technology Co., Ltd.Yang Xiwen1-0/+2
Henan Yiming Technology Co., Ltd. was established in 2021. The business scope of the company includes: communication equipment (excluding radio control equipment). Link: https://gw.yimingkeji.net Signed-off-by: Yang Xiwen <forbidden405@foxmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/tencent_27DD0718C3FD9C5F7D6E2FBA225CAA760405@qq.com
2023-03-21ARM: dts: qcom: sdx55: add dedicated SDX55 TCSR compatibleKrzysztof Kozlowski1-1/+1
syscon should not be used alone as compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230306072618.10770-2-krzysztof.kozlowski@linaro.org
2023-03-15ARM: dts: qcom: sdx55-t55: Move "status" property downManivannan Sadhasivam1-3/+5
To align with rest of the devicetree files, let's move the "status" property down Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308082424.140224-11-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: sdx55-t55: Enable PCIe RC supportManivannan Sadhasivam1-0/+42
Enable PCIe RC support on Thundercomm T55 board. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308082424.140224-10-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: sdx55: List the property values verticallyManivannan Sadhasivam1-5/+18
To align with the rest of the devicetree files and the relative properties, let's list the values of properties such as {reg/clock/interrupt}-names vertically. Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308082424.140224-9-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: sdx55: Add support for PCIe RC controllerManivannan Sadhasivam1-0/+81
The PCIe controller in SDX55 can act as the RC controller also. Let's add support for it. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308082424.140224-8-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane}Manivannan Sadhasivam2-4/+4
There is only one PCIe PHY in this SoC, so there is no need to add an index to the suffix. This also matches the naming convention of the PCIe controller. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308082424.140224-7-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP nodeManivannan Sadhasivam1-39/+39
Unit address of PCIe EP node should be 0x1c00000 as it has to match the first address specified in the reg property. This also requires sorting the node in the ascending order. Fixes: e6b69813283f ("ARM: dts: qcom: sdx55: Add support for PCIe EP") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230308082424.140224-6-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: ipq8064: Fix the PCI I/O port rangeManivannan Sadhasivam1-6/+6
For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses (0x0fe00000, 0x31e00000, 0x35e00000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 93241840b664 ("ARM: dts: qcom: Add pcie nodes for ipq8064") Reported-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230228164752.55682-17-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: ipq4019: Fix the PCI I/O port rangeManivannan Sadhasivam1-2/+2
For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address (0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 187519403273 ("ARM: dts: ipq4019: Add a few peripheral nodes") Reported-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230228164752.55682-16-manivannan.sadhasivam@linaro.org
2023-03-15ARM: dts: qcom: apq8064: Use 0x prefix for the PCI I/O and MEM rangesManivannan Sadhasivam1-2/+2
To maintain the uniformity, let's use the 0x prefix for the values of ranges property. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230228164752.55682-15-manivannan.sadhasivam@linaro.org
2023-03-15dt-bindings: arm: qcom: Add ipq9574 compatibleDevi Priya1-0/+7
Document the new ipq9574 SoC/board device tree bindings Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214163116.9924-6-quic_devipriy@quicinc.com
2023-03-15ARM: dts: qcom: msm8974: add correct XO clock source to GCC nodeRayyan Ansari1-1/+1
Change the XO clock in MSM8974's GCC node to point to RPMCC. Signed-off-by: Rayyan Ansari <rayyan@ansari.sh> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230121192540.9177-4-rayyan@ansari.sh
2023-03-15ARM: dts: qcom: msm8226: add clocks and clock-names to GCC nodeRayyan Ansari1-0/+6
Add the XO and Sleep Clock sources to the GCC node on MSM8226. Signed-off-by: Rayyan Ansari <rayyan@ansari.sh> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230121192540.9177-3-rayyan@ansari.sh
2023-03-15ARM: dts: qcom: rename kpss-acc-v2 nodes to power-manager nodesChristian Marangi3-12/+12
Change kpss-acc-v2 nodes naming to power-manager to reflect Documentation schema. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230116204751.23045-8-ansuelsmth@gmail.com
2023-03-15ARM: dts: qcom: add missing clock configuration for kpss-acc-v1Christian Marangi3-0/+32
Add missing clock configuration by adding clocks, clock-names, clock-output-names and #clock-cells bindings for each kpss-acc-v1 clock-controller to reflect Documentation schema. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230116204751.23045-7-ansuelsmth@gmail.com
2023-03-15ARM: dts: qcom: add and fix clock configuration for kpss-gcc nodesChristian Marangi3-1/+7
Add missing clock configuration by adding clocks, clock-names and #clock-cells bindings for each kpss-acc-v1 clock-controller node for apq8064 and msm8960 to reflect Documentation schema. Add missing #clock-cells binding and remove useless clock-output-names for ipq806x dtsi. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230116204751.23045-6-ansuelsmth@gmail.com
2023-03-15ARM: dts: qcom: add per SoC compatible for qcom,kpss-gcc nodesChristian Marangi5-5/+5
Add per Soc compatible for qcom,kpss-gcc nodes. While currently not used by the kpss driver they can serve further customization and they are required to be defined per Documentation schema. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230116204751.23045-5-ansuelsmth@gmail.com
2023-03-15dt-bindings: qcom: add ipq5332 boardsKathiravan T1-0/+7
Document the new ipq5332 SoC/board device tree bindings Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230307062232.4889-7-quic_kathirav@quicinc.com
2023-03-13ARM: dts: qcom-apq8064: Fix opp table child nameKonrad Dybcio1-1/+1
The opp-320000000 name is rather misleading with the opp-hz value of 450 MHz. Fix it! Fixes: 8db0b6c7b636 ("ARM: dts: qcom: apq8064: Convert adreno from legacy gpu-pwrlevels to opp-v2") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230220120831.1591820-1-konrad.dybcio@linaro.org
2023-03-13ARM: dts: qcom: ipq4019: remove clk-output-names for sleep clockRobert Marko1-1/+0
Now that sleep clock is being passed directly to GCC, there is no need for global name matching, so remove clk-output-names for sleep clock. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214162325.312057-4-robert.marko@sartura.hr
2023-03-13ARM: dts: qcom: ipq4019: pass XO and sleep clocks to GCCRobert Marko1-0/+2
Directly pass XO and sleep clocks to GCC via phandles. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214162325.312057-3-robert.marko@sartura.hr
2023-03-13ARM: dts: qcom: ipq4018-ap120c-ac: use NVMEM for ath10k caldataRobert Marko1-0/+15
Since ath10k now supports loading the pre-cal via NVMEM instead of having to use userspace scripts, lets use it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214161211.306462-4-robert.marko@sartura.hr
2023-03-13ARM: dts: qcom: ipq4018-ap120c-ac: align SPI-NAND with DT schemaRobert Marko1-1/+1
SPI-NAND node name should be flash@1 and not nand@1 according to schema. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214161211.306462-3-robert.marko@sartura.hr
2023-03-13ARM: dts: qcom: ipq4018-ap120c-ac: align GPIO hog with DT schemaRobert Marko1-1/+1
Align USB power GPIO hog node to DT schema. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214161211.306462-2-robert.marko@sartura.hr
2023-03-13ARM: dts: qcom: ipq4018-ap120c-ac: setup serial consoleRobert Marko1-0/+8
Add the required alias and stdout property so that kernel can setup the console based off DTS and not have to set it in the cmdline. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230214161211.306462-1-robert.marko@sartura.hr
2023-03-13dt-bindings: arm: qcom: add QRD8550Krzysztof Kozlowski1-0/+1
Add board compatible for QRD8550 - a mobile-like development board with SM8550. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230210163844.765074-1-krzysztof.kozlowski@linaro.org
2023-03-05Linux 6.3-rc1Linus Torvalds1-2/+2
2023-03-05cpumask: re-introduce constant-sized cpumask optimizationsLinus Torvalds4-72/+72
Commit aa47a7c215e7 ("lib/cpumask: deprecate nr_cpumask_bits") resulted in the cpumask operations potentially becoming hugely less efficient, because suddenly the cpumask was always considered to be variable-sized. The optimization was then later added back in a limited form by commit 6f9c07be9d02 ("lib/cpumask: add FORCE_NR_CPUS config option"), but that FORCE_NR_CPUS option is not useful in a generic kernel and more of a special case for embedded situations with fixed hardware. Instead, just re-introduce the optimization, with some changes. Instead of depending on CPUMASK_OFFSTACK being false, and then always using the full constant cpumask width, this introduces three different cpumask "sizes": - the exact size (nr_cpumask_bits) remains identical to nr_cpu_ids. This is used for situations where we should use the exact size. - the "small" size (small_cpumask_bits) is the NR_CPUS constant if it fits in a single word and the bitmap operations thus end up able to trigger the "small_const_nbits()" optimizations. This is used for the operations that have optimized single-word cases that get inlined, notably the bit find and scanning functions. - the "large" size (large_cpumask_bits) is the NR_CPUS constant if it is an sufficiently small constant that makes simple "copy" and "clear" operations more efficient. This is arbitrarily set at four words or less. As a an example of this situation, without this fixed size optimization, cpumask_clear() will generate code like movl nr_cpu_ids(%rip), %edx addq $63, %rdx shrq $3, %rdx andl $-8, %edx callq memset@PLT on x86-64, because it would calculate the "exact" number of longwords that need to be cleared. In contrast, with this patch, using a MAX_CPU of 64 (which is quite a reasonable value to use), the above becomes a single movq $0,cpumask instruction instead, because instead of caring to figure out exactly how many CPU's the system has, it just knows that the cpumask will be a single word and can just clear it all. Note that this does end up tightening the rules a bit from the original version in another way: operations that set bits in the cpumask are now limited to the actual nr_cpu_ids limit, whereas we used to do the nr_cpumask_bits thing almost everywhere in the cpumask code. But if you just clear bits, or scan for bits, we can use the simpler compile-time constants. In the process, remove 'cpumask_complement()' and 'for_each_cpu_not()' which were not useful, and which fundamentally have to be limited to 'nr_cpu_ids'. Better remove them now than have somebody introduce use of them later. Of course, on x86-64 with MAXSMP there is no sane small compile-time constant for the cpumask sizes, and we end up using the actual CPU bits, and will generate the above kind of horrors regardless. Please don't use MAXSMP unless you really expect to have machines with thousands of cores. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2023-03-05Remove Intel compiler supportMasahiro Yamada11-287/+5
include/linux/compiler-intel.h had no update in the past 3 years. We often forget about the third C compiler to build the kernel. For example, commit a0a12c3ed057 ("asm goto: eradicate CC_HAS_ASM_GOTO") only mentioned GCC and Clang. init/Kconfig defines CC_IS_GCC and CC_IS_CLANG but not CC_IS_ICC, and nobody has reported any issue. I guess the Intel Compiler support is broken, and nobody is caring about it. Harald Arnesen pointed out ICC (classic Intel C/C++ compiler) is deprecated: $ icc -v icc: remark #10441: The Intel(R) C++ Compiler Classic (ICC) is deprecated and will be removed from product release in the second half of 2023. The Intel(R) oneAPI DPC++/C++ Compiler (ICX) is the recommended compiler moving forward. Please transition to use this compiler. Use '-diag-disable=10441' to disable this message. icc version 2021.7.0 (gcc version 12.1.0 compatibility) Arnd Bergmann provided a link to the article, "Intel C/C++ compilers complete adoption of LLVM". lib/zstd/common/compiler.h and lib/zstd/compress/zstd_fast.c were kept untouched for better sync with https://github.com/facebook/zstd Link: https://www.intel.com/content/www/us/en/developer/articles/technical/adoption-of-llvm-complete-icx.html Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2023-03-05Adding VFS co-maintainerAl Viro1-0/+1
Acked-by: Christian Brauner <brauner@kernel.org> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2023-03-04mm: avoid gcc complaint about pointer castingLinus Torvalds1-2/+8
The migration code ends up temporarily stashing information of the wrong type in unused fields of the newly allocated destination folio. That all works fine, but gcc does complain about the pointer type mis-use: mm/migrate.c: In function ‘__migrate_folio_extract’: mm/migrate.c:1050:20: note: randstruct: casting between randomized structure pointer types (ssa): ‘struct anon_vma’ and ‘struct address_space’ 1050 | *anon_vmap = (void *)dst->mapping; | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~ and gcc is actually right to complain since it really doesn't understand that this is a very temporary special case where this is ok. This could be fixed in different ways by just obfuscating the assignment sufficiently that gcc doesn't see what is going on, but the truly "proper C" way to do this is by explicitly using a union. Using unions for type conversions like this is normally hugely ugly and syntactically nasty, but this really is one of the few cases where we want to make it clear that we're not doing type conversion, we're really re-using the value bit-for-bit just using another type. IOW, this should not become a common pattern, but in this one case using that odd union is probably the best way to document to the compiler what is conceptually going on here. [ Side note: there are valid cases where we convert pointers to other pointer types, notably the whole "folio vs page" situation, where the types actually have fundamental commonalities. The fact that the gcc note is limited to just randomized structures means that we don't see equivalent warnings for those cases, but it migth also mean that we miss other cases where we do play these kinds of dodgy games, and this kind of explicit conversion might be a good idea. ] I verified that at least for an allmodconfig build on x86-64, this generates the exact same code, apart from line numbers and assembler comment changes. Fixes: 64c8902ed441 ("migrate_pages: split unmap_and_move() to _unmap() and _move()") Cc: Huang, Ying <ying.huang@intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2023-03-03umh: simplify the capability pointer logicLinus Torvalds1-13/+5
The usermodehelper code uses two fake pointers for the two capability cases: CAP_BSET for reading and writing 'usermodehelper_bset', and CAP_PI to read and write 'usermodehelper_inheritable'. This seems to be a completely unnecessary indirection, since we could instead just use the pointers themselves, and never have to do any "if this then that" kind of logic. So just get rid of the fake pointer values, and use the real pointer values instead. Reviewed-by: Luis Chamberlain <mcgrof@kernel.org> Cc: Eric Biederman <ebiederm@xmission.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Kees Cook <keescook@chromium.org> Cc: Iurii Zaikin <yzaikin@google.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2023-03-03i2c: gxp: fix an error code in probeDan Carpenter1-1/+1
This is passing IS_ERR() instead of PTR_ERR() so instead of an error code it prints and returns the number 1. Fixes: 4a55ed6f89f5 ("i2c: Add GXP SoC I2C Controller") Signed-off-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Nick Hawkins <nick.hawkins@hpe.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2023-03-03i2c: gxp: return proper error on address NACKWolfram Sang1-2/+4
According to Documentation/i2c/fault-codes.rst, NACK after sending an address should be -ENXIO. Signed-off-by: Wolfram Sang <wsa@kernel.org>
2023-03-03i2c: gxp: remove "empty" switch statementWolfram Sang1-12/+1
There used to be error messages which had to go. Now, it only consists of 'break's, so it can go. Signed-off-by: Wolfram Sang <wsa@kernel.org>
2023-03-03i2c: Disable I2C_APPLE when I2C_PASEMI is a builtinBenjamin Gray1-0/+1
The ppc64le_allmodconfig sets I2C_PASEMI=y and leaves COMPILE_TEST to default to y and I2C_APPLE to default to m, running into a known incompatible configuration that breaks the build [1]. Specifically, a common dependency (i2c-pasemi-core.o in this case) cannot be used by both builtin and module consumers. Disable I2C_APPLE when I2C_PASEMI is a builtin to prevent this. [1]: https://lore.kernel.org/all/202112061809.XT99aPrf-lkp@intel.com Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Benjamin Gray <bgray@linux.ibm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Wolfram Sang <wsa@kernel.org>
2023-03-03ALSA: ice1712: Delete unreachable code in aureon_add_controls()Dmitry Fomin1-4/+0
If the check (id != 0x41) fails, then id == 0x41 and the other check in 'else' branch also fails: id & 0x0F = 0b01000001 & 0b00001111 = 0b00000001. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Dmitry Fomin <fomindmitriyfoma@mail.ru> Link: https://lore.kernel.org/r/20230225184322.6286-2-fomindmitriyfoma@mail.ru Signed-off-by: Takashi Iwai <tiwai@suse.de>
2023-03-03ALSA: ice1712: Do not left ice->gpio_mutex locked in aureon_add_controls()Dmitry Fomin1-1/+1
If snd_ctl_add() fails in aureon_add_controls(), it immediately returns and leaves ice->gpio_mutex locked. ice->gpio_mutex locks in snd_ice1712_save_gpio_status and unlocks in snd_ice1712_restore_gpio_status(ice). It seems that the mutex is required only for aureon_cs8415_get(), so snd_ice1712_restore_gpio_status(ice) can be placed just after that. Compile tested only. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Dmitry Fomin <fomindmitriyfoma@mail.ru> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20230225184322.6286-1-fomindmitriyfoma@mail.ru Signed-off-by: Takashi Iwai <tiwai@suse.de>
2023-03-03ALSA: hda/realtek: Add quirk for HP EliteDesk 800 G6 Tower PCŁukasz Stelmach1-0/+1
HP EliteDesk 800 G6 Tower PC (103c:870c) requires a quirk for enabling headset-mic. Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> Cc: <stable@vger.kernel.org> Link: https://bugzilla.kernel.org/show_bug.cgi?id=217008 Link: https://lore.kernel.org/r/20230223074749.1026060-1-l.stelmach@samsung.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2023-03-03ALSA: hda/realtek: Improve support for Dell Precision 3260Jaroslav Kysela1-0/+1
The headset jack works better with model=alc283-dac-wcaps. Without this option, the headset insertion (separate physical jack) may not be handled correctly (re-insertion is required). It seems that it follows the "Intel Reference Board" defaults. Reported-by: steven_wu2@dell.com Signed-off-by: Jaroslav Kysela <perex@perex.cz> Link: https://lore.kernel.org/r/20230221102157.515852-1-perex@perex.cz Signed-off-by: Takashi Iwai <tiwai@suse.de>
2023-03-03ata: ahci: Revert "ata: ahci: Add Tiger Lake UP{3,4} AHCI controller"Damien Le Moal1-1/+0
Commit 104ff59af73a ("ata: ahci: Add Tiger Lake UP{3,4} AHCI controller") enabled low power mode for the Tiger Lake AHIC adapter in the author system but created regressions for others. Revert this patch for now until a better solution is found to make this adapter eco-friendly. Link: https://bugzilla.kernel.org/show_bug.cgi?id=217114 CC: stable@vger.kernel.org Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
2023-03-02mailmap: map Dikshita Agarwal's old address to his current oneKonrad Dybcio1-0/+1
Dikshita's old email is still picked up by the likes of get_maintainer.pl and keeps bouncing. Map it to his current one. Link: https://lkml.kernel.org/r/20230228153335.907164-2-konrad.dybcio@linaro.org Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Cc: Dikshita Agarwal <dikshita@qti.qualcomm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-03-02mailmap: map Vikash Garodia's old address to his current oneKonrad Dybcio1-0/+1
Vikash's old email is still picked up by the likes of get_maintainer.pl and keeps bouncing. Map it to his current one. Link: https://lkml.kernel.org/r/20230228153335.907164-3-konrad.dybcio@linaro.org Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Cc: Vikash Garodia <quic_vgarodia@quicinc.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-03-02fs/cramfs/inode.c: initialize file_ra_stateAndrew Morton1-1/+1
file_ra_state_init() assumes that the file_ra_state has been zeroed out. Fixes a KMSAN used-unintialized issue (at least). Fixes: cf948cbc35e80 ("cramfs: read_mapping_page() is synchronous") Reported-by: syzbot <syzbot+8ce7f8308d91e6b8bbe2@syzkaller.appspotmail.com> Link: https://lkml.kernel.org/r/0000000000008f74e905f56df987@google.com Cc: Matthew Wilcox <willy@infradead.org> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-03-02fs: hfsplus: fix UAF issue in hfsplus_put_superDongliang Mu1-2/+2
The current hfsplus_put_super first calls hfs_btree_close on sbi->ext_tree, then invokes iput on sbi->hidden_dir, resulting in an use-after-free issue in hfsplus_release_folio. As shown in hfsplus_fill_super, the error handling code also calls iput before hfs_btree_close. To fix this error, we move all iput calls before hfsplus_btree_close. Note that this patch is tested on Syzbot. Link: https://lkml.kernel.org/r/20230226124948.3175736-1-mudongliangabcd@gmail.com Reported-by: syzbot+57e3e98f7e3b80f64d56@syzkaller.appspotmail.com Tested-by: Dongliang Mu <mudongliangabcd@gmail.com> Signed-off-by: Dongliang Mu <mudongliangabcd@gmail.com> Cc: Bart Van Assche <bvanassche@acm.org> Cc: Jens Axboe <axboe@kernel.dk> Cc: Muchun Song <songmuchun@bytedance.com> Cc: Roman Gushchin <roman.gushchin@linux.dev> Cc: "Theodore Ts'o" <tytso@mit.edu> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-03-02panic: fix the panic_print NMI backtrace settingGuilherme G. Piccoli1-18/+26
Commit 8d470a45d1a6 ("panic: add option to dump all CPUs backtraces in panic_print") introduced a setting for the "panic_print" kernel parameter to allow users to request a NMI backtrace on panic. Problem is that the panic_print handling happens after the secondary CPUs are already disabled, hence this option ended-up being kind of a no-op - kernel skips the NMI trace in idling CPUs, which is the case of offline CPUs. Fix it by checking the NMI backtrace bit in the panic_print prior to the CPU disabling function. Link: https://lkml.kernel.org/r/20230226160838.414257-1-gpiccoli@igalia.com Fixes: 8d470a45d1a6 ("panic: add option to dump all CPUs backtraces in panic_print") Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Cc: <stable@vger.kernel.org> Cc: Baoquan He <bhe@redhat.com> Cc: Dave Young <dyoung@redhat.com> Cc: Feng Tang <feng.tang@intel.com> Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com> Cc: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com> Cc: Kees Cook <keescook@chromium.org> Cc: Michael Kelley <mikelley@microsoft.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Vivek Goyal <vgoyal@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-03-02lib: parser: update documentation for match_NUMBER functionsEric Biggers1-7/+7
commit 67222c4ba8af ("lib: parser: optimize match_NUMBER apis to use local array") removed -ENOMEM as a possible return value, so update the comments accordingly. Link: https://lkml.kernel.org/r/20230224042618.9092-1-ebiggers@kernel.org Fixes: 67222c4ba8af ("lib: parser: optimize match_NUMBER apis to use local array") Signed-off-by: Eric Biggers <ebiggers@google.com> Cc: Li Lingfeng <lilingfeng3@huawei.com> Cc: Tejun Heo <tj@kernel.org> Cc: Yu Kuai <yukuai1@huaweicloud.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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