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2023-06-20MAINTAINERS: add PHY-related files to Amlogic SoC file listHeiner Kallweit1-0/+2
Add PHY-related files to the Amlogic SoC file list. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/38f87b22-d9a8-b8d8-ba7b-a2c2d7311b04@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-19drivers: meson: secure-pwrc: always enable DMA domainAlexey Romanov1-1/+1
Starting from commit e45f243409db ("firmware: meson_sm: populate platform devices from sm device tree data") pwrc is probed successfully and disables unused pwr domains. By A1 SoC family design, any TEE requires DMA pwr domain always enabled. Fixes: b3dde5013e13 ("soc: amlogic: Add support for Secure power domains controller") Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230610090414.90529-1-avromanov@sberdevices.ru [narmstrong: added fixes tag] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-14soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencerVijaya Krishna Nivarthi1-24/+4
The select_fifo/dma_mode() functions in geni driver enable/disable interrupts (secondary included) conditionally for non-uart modes, while uart is supposed to manage this internally. However, only uart uses secondary IRQs while spi, i2c do not care about these at all making their enablement (or disablement) totally unnecessary for these protos. Similarly, select_gpi_mode() also does disable s_irq and its useless again. Drop enabling/disabling secondary IRQs. This doesn't solve any observed problem but only gets rid of code pieces that are not required. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1686742087-30731-1-git-send-email-quic_vnivarth@quicinc.com
2023-06-13dt-bindings: sram: qcom,imem: document qdu1000Komal Bajaj1-0/+1
Add compatible for QDU1000 and QRU1000 SoCs IMEM. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230522151206.22654-2-quic_kbajaj@quicinc.com
2023-06-13soc: qcom: icc-bwmon: Fix MSM8998 count unitKonrad Dybcio1-1/+1
MSM8998's BWMON counts in megabytes. Fix it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230531-topic-msm8998-bwmon-v1-1-454f9d550ee5@linaro.org
2023-06-13dt-bindings: soc: qcom,rpmh-rsc: Require power-domainsKonrad Dybcio1-0/+2
The Linux RPMh implementation refrains from sending some RPMh votes until the system is about to enter suspend (which is indicated by all CPU cores entering a low-power state). Lack of the power-domains property will make it such that these votes are never sent. Require the power-domains property as discussed in [1]. [1] https://lore.kernel.org/linux-arm-msm/20230512150425.3171122-1-quic_bjorande@quicinc.com/ Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-1-b4a985f57b8b@linaro.org
2023-06-13soc: qcom: socinfo: Add Soc ID for IPQ5300Kathiravan T1-0/+1
Add the SoC ID for IPQ5300, which belong to the family of IPQ5332 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230605080531.3879-3-quic_kathirav@quicinc.com
2023-06-13dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300Kathiravan T1-0/+1
Add the SoC ID for IPQ5300, which belong to the family of IPQ5332 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230605080531.3879-2-quic_kathirav@quicinc.com
2023-06-13soc: qcom: Fix a IS_ERR() vs NULL bug in probeDan Carpenter1-1/+1
The devm_ioremap() function returns NULL on error, it never returns error pointers. Fixes: a77b2a0b1280 ("soc: qcom: Introduce RPM master stats driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/ZH7sgpLAN23bCz9v@moroto
2023-06-13soc: qcom: socinfo: Add support for new fields in revision 19Naman Jain2-10/+30
Add support for below fields coming in socinfo structure under v19: * num_func_clusters: number of clusters with at least one functional core * boot_cluster: cluster selected as boot cluster * boot_core: core selected as boot core While at it, rename some variables to align them with their functionalities. Signed-off-by: Naman Jain <quic_namajain@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230606134626.18790-3-quic_namajain@quicinc.com
2023-06-13soc: qcom: socinfo: Add support for new fields in revision 18Naman Jain2-0/+4
Add support for below fields coming in socinfo structure under v18: * num_kvps: number of key value pairs (KVP) * kvps_offset: the offset of the KVP table from the base address of socinfo structure in SMEM KVP table has boolean values for certain feature flags, used to determine hardware configuration. Signed-off-by: Naman Jain <quic_namajain@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230606134626.18790-2-quic_namajain@quicinc.com
2023-06-13dt-bindings: firmware: scm: Add compatible for SDX75Rohit Agarwal1-0/+1
Add devicetree compatible for SCM present in SDX75 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1686311438-24177-3-git-send-email-quic_rohiagar@quicinc.com
2023-06-13soc: qcom: mdt_loader: Fix split image detectionBjorn Andersson1-0/+8
The enhanced detection introduced in commit '210d12c8197a ("soc: qcom: mdt_loader: Enhance split binary detection")' requires that all segments lies within the file on disk. But the Qualcomm firmware files consistently has a BSS-like segment at the end, with a p_offset aligned to the next 4k boundary. As the p_size is 0 and there's nothing to load, the image is not padded to cover this (empty) segment. Ignore zero-sized segments when determining if the image is split, to avoid this problem. Fixes: 210d12c8197a ("soc: qcom: mdt_loader: Enhance split binary detection") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # qrb5165-rb5 Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230612215804.1883458-1-quic_bjorande@quicinc.com
2023-06-09firmware: tegra: bpmp: Add support for DRAM MRQ GSCsPeter De Schrijver2-61/+147
Implement support for DRAM MRQ GSCs. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> [treding@nvidia.com: drop unnecessary discrimination enum] Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-09soc/tegra: pmc: Use devm_clk_notifier_register()Thierry Reding1-2/+2
Move to the device-managed version of clk_notifier_register() to remove the need for manual cleanup. This fixes a potential issue where the clock notifier would stick around after the driver fails to probe at a later point. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-09soc/tegra: pmc: Simplify debugfs initializationThierry Reding1-22/+4
debugfs calls should generally not be error-checked to simplify the case where debugfs is disabled. Since this driver is built-in and has the sysfs bind/unbind attributes disabled, it cannot be unloaded, so there is no need to hold onto a reference to the debugfs files that are created. We can further simplify this by moving the debugfs file creation to a later stage to avoid any cleanup we might have to do during error unwind operations. This is also a little cleaner because the debugfs file relies on data structures that are created at a later point than when the file was previously created. Suggested-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-09soc: mediatek: remove DDP_DOMPONENT_DITHER from enumJason-JH.Lin1-2/+1
After mmsys and drm change DITHER enum to DDP_COMPONENT_DITHER0, mmsys header can remove the useless DDP_COMPONENT_DITHER enum. Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20230306080659.15261-3-jason-jh.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-06-09soc: mediatek: SVS: Fix MT8192 GPU node nameChen-Yu Tsai1-2/+2
Device tree node names should be generic. The planned device node name for the GPU, according to the bindings and posted DT changes, is "gpu", not "mali". Fix the GPU node name in the SVS driver to follow. Fixes: 0bbb09b2af9d ("soc: mediatek: SVS: add mt8192 SVS GPU driver") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230531063532.2240038-1-wenst@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-06-08soc/tegra: fuse: Fix Tegra234 fuse sizeKartik1-1/+1
The Tegra234 fuse size is incorrectly defined as 0x98c. The actual size of the Tegra234 fuses is 0xf8c and so update the size of the Tegra234 fuses to fix this. Signed-off-by: Kartik <kkartik@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-08soc/tegra: pmc: Add AON SW Wake support for Tegra234Viswanath L1-0/+1
Wake-up signal 83 on Tegra234 is triggered by software writing to WAKE_AOWAKE_SW_WAKE_TIER0_TRIGGER_0 register. This wake-up is mapped to CPU interrupt 179 and is used by the Sensor Processing Engine (SPE) in the Always-on (AON) power domain for waking up the system. Signed-off-by: Viswanath L <viswanathl@nvidia.com> Signed-off-by: Kartik <kkartik@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-06wkup_m3_ipc.c: Fix error checking for debugfs_create_dirOsama Muhammad1-1/+1
This patch fixes the error checking in wkup_m3_ipc.c in debugfs_create_dir. The correct way to check if an error occurred is 'IS_ERR' inline function. Signed-off-by: Osama Muhammad <osmtendev@gmail.com> Link: https://lore.kernel.org/r/20230517172431.13507-1-osmtendev@gmail.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-06-05soc: renesas: rmobile-sysc: Convert to readl_poll_timeout_atomic()Geert Uytterhoeven1-20/+9
Use readl_poll_timeout_atomic() instead of open-coding the same operation. 1. rmobile_pd_power_down(): as typically less than 20 retries are needed, PSTR_RETRIES (100) µs is a suitable timeout value. 2. __rmobile_pd_power_up(): the old method of first polling some cycles with a 1 µs delay, followed by more polling cycles without any delay didn't make much sense, as the latter was insignificant compared to the former. Furthermore, typically no retries are needed. Hence just retain the polling with delay. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ae4bf03ab8fd5a557c683086958d6764babc0723.1685692810.git.geert+renesas@glider.be
2023-06-05iopoll: Do not use timekeeping in read_poll_timeout_atomic()Geert Uytterhoeven1-5/+17
read_poll_timeout_atomic() uses ktime_get() to implement the timeout feature, just like its non-atomic counterpart. However, there are several issues with this, due to its use in atomic contexts: 1. When called in the s2ram path (as typically done by clock or PM domain drivers), timekeeping may be suspended, triggering the WARN_ON(timekeeping_suspended) in ktime_get(): WARNING: CPU: 0 PID: 654 at kernel/time/timekeeping.c:843 ktime_get+0x28/0x78 Calling ktime_get_mono_fast_ns() instead of ktime_get() would get rid of that warning. However, that would break timeout handling, as (at least on systems with an ARM architectured timer), the time returned by ktime_get_mono_fast_ns() does not advance while timekeeping is suspended. Interestingly, (on the same ARM systems) the time returned by ktime_get() does advance while timekeeping is suspended, despite the warning. 2. Depending on the actual clock source, and especially before a high-resolution clocksource (e.g. the ARM architectured timer) becomes available, time may not advance in atomic contexts, thus breaking timeout handling. Fix this by abandoning the idea that one can rely on timekeeping to implement timeout handling in all atomic contexts, and switch from a global time-based to a locally-estimated timeout handling. In most (all?) cases the timeout condition is exceptional and an error condition, hence any additional delays due to underestimating wall clock time are irrelevant. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/3d2a2f4e553489392d871108797c3be08f88300b.1685692810.git.geert+renesas@glider.be
2023-06-05iopoll: Call cpu_relax() in busy loopsGeert Uytterhoeven1-0/+2
It is considered good practice to call cpu_relax() in busy loops, see Documentation/process/volatile-considered-harmful.rst. This can not only lower CPU power consumption or yield to a hyperthreaded twin processor, but also allows an architecture to mitigate hardware issues (e.g. ARM Erratum 754327 for Cortex-A9 prior to r2p0) in the architecture-specific cpu_relax() implementation. In addition, cpu_relax() is also a compiler barrier. It is not immediately obvious that the @op argument "function" will result in an actual function call (e.g. in case of inlining). Where a function call is a C sequence point, this is lost on inlining. Therefore, with agressive enough optimization it might be possible for the compiler to hoist the: (val) = op(args); "load" out of the loop because it doesn't see the value changing. The addition of cpu_relax() would inhibit this. As the iopoll helpers lack calls to cpu_relax(), people are sometimes reluctant to use them, and may fall back to open-coded polling loops (including cpu_relax() calls) instead. Fix this by adding calls to cpu_relax() to the iopoll helpers: - For the non-atomic case, it is sufficient to call cpu_relax() in case of a zero sleep-between-reads value, as a call to usleep_range() is a safe barrier otherwise. However, it doesn't hurt to add the call regardless, for simplicity, and for similarity with the atomic case below. - For the atomic case, cpu_relax() must be called regardless of the sleep-between-reads value, as there is no guarantee all architecture-specific implementations of udelay() handle this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/45c87bec3397fdd704376807f0eec5cc71be440f.1685692810.git.geert+renesas@glider.be
2023-06-05MAINTAINERS: Switch to @amd.com emailsMichal Simek1-6/+6
@xilinx.com is still working but better to switch to new amd.com after AMD/Xilinx acquisition. Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> Acked-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f7773fdd002f89578b9e5262692a563fe7be4123.1684244928.git.michal.simek@amd.com
2023-05-29soc: qcom: ocmem: Add OCMEM hardware version printLuca Weiss1-0/+10
It might be useful to know what hardware version of the OCMEM block the SoC contains. Add a debug print for that. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230509-ocmem-hwver-v3-1-e51f3488e0f4@z3ntu.xyz
2023-05-29soc: mediatek: mtk-mutex: Remove unnecessary .ownerJiapeng Chong1-1/+0
Remove .owner field if calls are used which set it automatically. ./drivers/soc/mediatek/mtk-mutex.c:1054:3-8: No need to set .owner here. The core will do it. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4869 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Link: https://lore.kernel.org/r/20230505061950.25977-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29dt-bindings: phy: mediatek,dsi-phy: Add compatible for MT6795 Helio X10AngeloGioacchino Del Regno1-0/+4
Add a compatible string for MediaTek Helio X10 MT6795: this SoC uses the same DSI PHY as MT8173. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230412112739.160376-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29dt-bindings: pwm: Add compatible for MediaTek MT6795AngeloGioacchino Del Regno1-1/+3
Add a compatible string for MediaTek Helio X10 MT6795's display PWM block: this is the same as MT8173. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20230412112739.160376-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29dt-bindings: spmi: spmi-mtk-pmif: Document mediatek,mt8195-spmi as fallback of mediatek,mt8186-spmiAllen-KH Cheng1-3/+8
The mt8186-spmi is used as compatible with mt8195-spmi on the MT8186, document this situation. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20230324021258.15863-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29soc: mediatek: pwrap: Add support for MT6795 Helio X10AngeloGioacchino Del Regno1-1/+135
Add the necessary bits to support the MT6795 Helio X10 smartphone SoC: this is always paired with a MT6331 PMIC, with MT6332 companion. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230412131216.198313-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29soc: mediatek: mtk-pmic-wrap: Add support for MT6331 w/ MT6332 companionAngeloGioacchino Del Regno1-0/+47
Add support for the MT6331 PMIC and for its companion MT6332 PMIC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230412131216.198313-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29soc: mediatek: mtk-pmic-wrap: Add support for companion PMICsAngeloGioacchino Del Regno1-14/+59
Some PMICs are designed to work with a companion part, which provides more regulators and/or companion devices such as LED controllers, display backlight controllers, battery charging, fuel gauge, etc: this kind of PMICs are usually present in smartphone platforms, where tight integration is required. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230412131216.198313-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29soc: mediatek: pwrap: Add kerneldoc for struct pwrap_slv_typeAngeloGioacchino Del Regno1-1/+7
In preparation for adding new members with name abbreviations describe the struct pwrap_slv_type with kerneldoc to enhance human readability. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230412131216.198313-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29soc: mediatek: pwrap: Move PMIC read test sequence in functionAngeloGioacchino Del Regno1-12/+20
The PMIC read test is performed in two places: pwrap_init_dual_io() and pwrap_init_sidly(). In preparation for adding support for PMICs requiring a companion part, move this sequence to a new function pwrap_pmic_read_test(). Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230412131216.198313-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-29dt-bindings: soc: mediatek: pwrap: Add compatible for MT6795 Helio X10AngeloGioacchino Del Regno1-0/+1
Add a compatible for the PMIC Wrapper found on the MT6795 Helio X10 SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230412131216.198313-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2023-05-26cpufreq: qcom-nvmem: use helper to get SMEM SoC IDRobert Marko1-46/+10
Now that SMEM exports a helper to get the SMEM SoC ID lets utilize it. Currently qcom_cpufreq_get_msm_id() is encoding the returned SMEM SoC ID into an enum, however there is no reason to do so and we can just match directly on the SMEM SoC ID as returned by qcom_smem_get_soc_id(). Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526204802.3081168-5-robimarko@gmail.com
2023-05-26cpufreq: qcom-nvmem: use SoC ID-s from bindingsRobert Marko1-10/+5
SMEM SoC ID-s are now stored in DT bindings so lets use those instead of defining them in the driver again. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526204802.3081168-4-robimarko@gmail.com
2023-05-26soc: qcom: smem: introduce qcom_smem_get_soc_id()Robert Marko2-0/+25
Introduce a helper to return the SoC SMEM ID, which is used to identify the exact SoC model as there may be differences in the same SoC family. Currently, cpufreq-nvmem does this completely in the driver and there has been more interest expresed for other drivers to use this information so lets expose a common helper to prevent redoing it in individual drivers since this field is present on every SMEM table version. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526204802.3081168-3-robimarko@gmail.com
2023-05-26soc: qcom: smem: Switch to EXPORT_SYMBOL_GPL()Robert Marko1-4/+4
SMEM has been GPL licensed from the start, and there is no reason to use EXPORT_SYMBOL() so switch to the GPL version. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Trilok Soni <quic_tsoni@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526204802.3081168-2-robimarko@gmail.com
2023-05-26soc: qcom: socinfo: move SMEM item struct and defines to a headerRobert Marko2-66/+71
Move SMEM item struct and related defines to a header in order to be able to reuse them in the SMEM driver instead of duplicating them. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526204802.3081168-1-robimarko@gmail.com
2023-05-26soc: qcom: mdt_loader: Fix unconditional call to scm_pas_mem_setupChristian Marangi1-5/+11
Commit ebeb20a9cd3f ("soc: qcom: mdt_loader: Always invoke PAS mem_setup") dropped the relocate check and made pas_mem_setup run unconditionally. The code was later moved with commit f4e526ff7e38 ("soc: qcom: mdt_loader: Extract PAS operations") to qcom_mdt_pas_init() effectively losing track of what was actually done. The assumption that PAS mem_setup can be done anytime was effectively wrong, with no good reason and this caused regression on some SoC that use remoteproc to bringup ath11k. One example is IPQ8074 SoC that effectively broke resulting in remoteproc silently die and ath11k not working. On this SoC FW relocate is not enabled and PAS mem_setup was correctly skipped in previous kernel version resulting in correct bringup and function of remoteproc and ath11k. To fix the regression, reintroduce the relocate check in qcom_mdt_pas_init() and correctly skip PAS mem_setup where relocate is not enabled. Fixes: ebeb20a9cd3f ("soc: qcom: mdt_loader: Always invoke PAS mem_setup") Tested-by: Robert Marko <robimarko@gmail.com> Co-developed-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Cc: stable@vger.kernel.org Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526115511.3328-1-ansuelsmth@gmail.com
2023-05-26arm-cci: add cci_enable_port_for_self prototypeArnd Bergmann1-0/+2
The cci_enable_port_for_self() is called from assembler, so add the prototype only to shut up the W=1 warning: drivers/bus/arm-cci.c:298:25: error: no previous prototype for 'cci_enable_port_for_self' [-Werror=missing-prototypes] Link: https://lore.kernel.org/r/20230516201218.556437-1-arnd@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-24MAINTAINERS: Add Konrad Dybcio as linux-arm-msm co-maintainerKonrad Dybcio1-1/+1
As discussed with Bjorn Andersson in private, step up to co-maintainership. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230522-topic-maintainers-v1-1-2b91eb8e4f65@linaro.org
2023-05-24dt-bindings: sram: qcom,imem: Document MSM8226Matti Lehtimäki1-0/+1
Add compatible for MSM8226 IMEM. Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230520121933.15533-2-matti.lehtimaki@gmail.com
2023-05-24soc: qcom: socinfo: Add Soc ID for IPQ5312 and IPQ5302Kathiravan T1-0/+2
Add the SoC ID for IPQ5312 and IPQ5302, which belong to the family of IPQ5332 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230509033531.21468-3-quic_kathirav@quicinc.com
2023-05-24dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302Kathiravan T1-0/+2
Add the SoC ID for IPQ5312 and IPQ5302, which belong to the family of IPQ5332 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230509033531.21468-2-quic_kathirav@quicinc.com
2023-05-24soc: qcom: socinfo: Add IDs for IPQ5018 familyRobert Marko1-0/+8
Add SOC IDs for the IPQ5018 family. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230429193336.600629-2-robimarko@gmail.com
2023-05-24dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 familyRobert Marko1-0/+8
Add SOC IDs for the IPQ5018 family. Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230429193336.600629-1-robimarko@gmail.com
2023-05-24soc: qcom: Introduce RPM master stats driverKonrad Dybcio3-0/+175
Introduce a driver to query and expose detailed, per-subsystem (as opposed to the existing qcom_stats driver which exposes SoC-wide data) about low power mode states of a given RPM master. That includes the APSS (ARM), MPSS (modem) and other remote cores, depending on the platform configuration. This is a vastly cleaned up and restructured version of a similar driver found in msm-5.4. Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230405-topic-master_stats-v6-2-2277b4433748@linaro.org