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2015-10-16pinctrl: berlin: fix BG2CD field widthsThomas Hebb1-30/+32
The previous register layout was incorrect, many of the fields having fewer bits than were needed to represent all their modes. The new layout is taken from the bootloader source of a BG2CD device. Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: berlin: fix my family name spellingAntoine Ténart5-8/+8
My family name contained an accent when I submitted the Berlin pinctrl series in the first place. There was an encoding issue when the series was applied. Fix this. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> [Je me rendis tous les accents aigus] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: berlin: add explicit dependency on OFAntoine Tenart1-0/+3
Berlin pinctrl drivers depends on CONFIG_OF. This patch adds this dependency explicitly. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: berlin: select the pinctrl driver according to the SoC usedAntoine Tenart1-3/+3
This patch prepares to remove the pinctrl driver selection from the mach-berlin Kconfig. To do so, bool is replaced by def_bool. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: dt-binding: document berlin4ct SoC pinctrlJisheng Zhang1-1/+4
Add berlin4ct to existing berlin pinctrl device tree binding. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: berlin: add the berlin4ct pinctrl driverJisheng Zhang3-0/+509
Add the pin-controller driver for Marvell Berlin BG4CT SoC, with definition of its groups and functions. This uses the core Berlin pinctrl driver. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: berlin: Make berlin pinctrl driver visible if COMPILE_TEST=yJisheng Zhang1-1/+1
It is good to allow berlin pinctrl driver to build with COMPILE_TEST, so make the it menu visible when compile-testing. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-16pinctrl: berlin: introduce berlin_pinctrl_probe_regmap()Jisheng Zhang2-9/+21
This is to prepare for the next berlin4ct support, where we won't use simple-mfd any more. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: pinconf-generic: add "input-schmitt" DT propertyMasahiro Yamada1-0/+1
PIN_CONFIG_INPUT_SCHMITT is defined in enum_pin_config_param, but the corresponding DT property is missing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: pinconf-generic: sort pin configuration params alphabeticallyMasahiro Yamada2-49/+49
Currently, the dt_params array in drivers/pinctrl/pinconf-generic.c is not sorted in the same order as the enum pin_config_param in include/linux/pinctrl/pinconf-generic.h. Sort enum pin_config_param, conf_items, dt_params, alphabetically for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: at91-pio4: irq argument as been removed from irq flow handlersLudovic Desroches1-2/+3
Irq argument as been removed from irq flow handlers so use the irq descriptor to retrieve data we need. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: at91-pio4: use irq_set_handler_lockedLudovic Desroches1-5/+5
Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: freescale: imx: imx7d iomuxc-lpsr devicetree bindingsAdrian Alonso1-1/+62
Add iomuxc-lpsr devicetree bindings documentation Provide documentation context as well an example on pheriperals that could use pad from either iomuxc controller supported by iMX7D SoC Signed-off-by: Adrian Alonso <aalonso@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: freescale: imx7d: support iomux lpsr controllerAdrian Alonso1-0/+30
iMX7D has two iomuxc controllers, iomuxc controller similar as previous iMX SoC generation and iomuxc-lpsr which provides low power state rentetion capabilities on gpios that are part of iomuxc-lpsr Add iomuxc-lpsr gpio group id's Signed-off-by: Adrian Alonso <aalonso@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: freescale: imx: add shared input select reg supportAdrian Alonso1-1/+27
- Add shared input select register support - imx7d has two iomux controllers iomuxc and iomuxc-lpsr which share select_input register for daisy chain settings Signed-off-by: Adrian Alonso <aalonso@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: freescale: imx: allow mux_reg offset zeroAdrian Alonso2-1/+5
Allow mux_reg offset zero to be a valid pin_id, on imx7d mux_conf reg offset is zero for iomuxc-lspr controller Signed-off-by: Adrian Alonso <aalonso@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: freescale: imx: fix system crash if enable two pinctl instancesRobin Gong2-2/+2
Fix system chrash caused by groups whose number is smaller than the number of groups of the last pinctl instance which is not initialized. iMX7D supports two iomux controllers (iomuxc-lpsr and iomuxc) on probing the second instance (iomuxc) the chrash below occurs. Uncompressing Linux... done, booting the kernel. [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.2.0-next-20150901-00006-gebfa43c (aalonso@bluefly) [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7) [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasin instruction cache [ 0.000000] Machine model: Freescale i.MX7 SabreSD Board [ 0.661012] [<802a6cb0>] (strcmp) from [<802cc80c>] (imx_dt_node_to_map+0x58/0x208) [ 0.668879] [<802cc80c>] (imx_dt_node_to_map) from [<802cbe24>] (pinctrl_dt_to_map+0x174/0x2b0) [ 0.677654] [<802cbe24>] (pinctrl_dt_to_map) from [<802c8f18>] (pinctrl_get+0x100/0x424) [ 0.685878] [<802c8f18>] (pinctrl_get) from [<802c9510>] (pinctrl_register+0x26c/0x480) [ 0.694104] [<802c9510>] (pinctrl_register) from [<802ccf3c>] (imx_pinctrl_probe+0x580/0x6e8) [ 0.702706] [<802ccf3c>] (imx_pinctrl_probe) from [<80351b58>] (platform_drv_probe+0x44/0xa4) [ 0.711455] [<80351b58>] (platform_drv_probe) from [<803503ec>] (driver_probe_device+0x174/0x2b4) [ 0.720405] [<803503ec>] (driver_probe_device) from [<803505fc>] (__driver_attach+0x8c/0x90) [ 0.728982] [<803505fc>] (__driver_attach) from [<8034e930>] (bus_for_each_dev+0x6c/0xa0) [ 0.737381] [<8034e930>] (bus_for_each_dev) from [<8034fb88>] (bus_add_driver+0x148/0x1f0) [ 0.745804] [<8034fb88>] (bus_add_driver) from [<80350c00>] (driver_register+0x78/0xf8) [ 0.753880] [<80350c00>] (driver_register) from [<800097d0>] (do_one_initcall+0x8c/0x1d4) [ 0.762282] [<800097d0>] (do_one_initcall) from [<80987dac>] (kernel_init_freeable+0x144/0x1e4) [ 0.771061] [<80987dac>] (kernel_init_freeable) from [<806d9c7c>] (kernel_init+0x8/0xe8) [ 0.779285] [<806d9c7c>] (kernel_init) from [<8000f628>] (ret_from_fork+0x14/0x2c) [ 0.786981] Code: e3520000 e5e32001 1afffffb e12fff1e (e4d03001) Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: at91-pio4: add PM stuffLudovic Desroches1-0/+76
Allow GPIOs to be configured as wakeup sources. When going to suspend, disable all GPIO irqs excepting the one configured as wakeup sources. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sunxi: add allwinner A83T PIO controller supportVishnu Patekar4-0/+609
Allwinner A83T soc port controller has 8 ports. It has 3 IRQ banks namely PB, PG, PH. Pinmuxing are different for some pins as compared to sun8i A23 and A33. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: uniphier: add SD card pinmux settingsMasahiro Yamada6-0/+36
Add SD card pinmux settings for PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5, ProXstream2, and PH1-LD6b SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: samsung: Remove unneded semicolonJavier Martinez Canillas1-1/+1
It's not needed an is just creating a null statement, so remove it. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: mediatek: Remove unneded semicolonJavier Martinez Canillas1-1/+1
It's not needed an is just creating a null statement, so remove it. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sunxi: Remove unneeded semicolonJavier Martinez Canillas1-1/+1
It's not needed an is just creating a null statement, so remove it. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: mxs: Remove unneded semicolonJavier Martinez Canillas1-1/+1
It's not needed an is just creating a null statement, so remove it. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: tz1090-pdc: Remove unneded semicolonsJavier Martinez Canillas1-2/+2
They aren't needed and are just creating null statements so remove it. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: tz1090: Remove unneded semicolonsJavier Martinez Canillas1-2/+2
They aren't needed and are just creating null statements so remove it. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sh-pfc: r8a7795: add EtherAVB supportTakeshi Kihara1-0/+87
This patch adds EthernetAVB Based on a much lager patch by Takeshi Kihara which was originally posted by Kuninori Morimoto. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [horms: extracted from a larger patch; corrected swapped {MATCH,CAPTURE_A} pins] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7795: add Audio SSI pin supportKuninori Morimoto1-0/+231
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7795: add Audio clock pin supportKuninori Morimoto1-0/+160
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7795: add I2C pin supportKuninori Morimoto1-0/+77
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7795: add SCIFx supportGeert Uytterhoeven1-0/+257
This patch adds SCIF0/1/2/3/4/5 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [Morimoto-san: Updated] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sh-pfc: Initial R8A7795 PFC supportTakeshi Kihara6-0/+2019
Add PFC base support for the R8A7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Morimoto-san: updated] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: remove unused PINMUX_IPSR_MODSEL_DATA()Kuninori Morimoto1-2/+0
Now, all PINMUX_IPSR_MODSEL_DATA() are replased to PINMUX_IPSR_MSEL() Let's remove unused PINMUX_IPSR_MODSEL_DATA() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7779: use PINMUX_IPSR_MSEL()Kuninori Morimoto1-210/+210
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7790: use PINMUX_IPSR_MSEL()Kuninori Morimoto1-519/+519
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7791: use PINMUX_IPSR_MSEL()Kuninori Morimoto1-538/+538
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: r8a7794: use PINMUX_IPSR_MSEL()Kuninori Morimoto1-414/+414
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: sh7734: use PINMUX_IPSR_MSEL()Kuninori Morimoto1-389/+389
Now, PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are same. Current PFC driver is very difficult to read, because macro names are using different length. PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can use PINMUX_IPSR_MSEL() instead of PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: modify PINMUX_IPSR_MSEL() macro orderKuninori Morimoto1-1/+1
The difference between PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() are FN_xxx order, and PINMUX_IPSR_MSEL() is used only from r8a7778. Now it r8a7778 works correctly with PINMUX_IPSR_MODSEL_DATA() order. This means we can merge PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA(). Current PFC driver is very difficult to read, because macro names are using different length. Especially PINMUX_IPSR_MODSEL_DATA() is well used macro PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) PINMUX_IPSR_MODSEL_DATA(ipsr, ...) It can be readable if we can merge PINMUX_IPSR_MSEL() and PINMUX_IPSR_MODSEL_DATA() PINMUX_IPSR_NOGP(ispr, ...) PINMUX_IPSR_DATA(ipsr, ...) PINMUX_IPSR_NOGM(ispr, ...) PINMUX_IPSR_NOFN(ipsr, ...) PINMUX_IPSR_MSEL(ipsr, ...) Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: Remove hardcoded IRQ numbersLaurent Pinchart5-134/+125
Now that all ARM-based Renesas SoCs use multiplatform kernels only the hardcoded IRQ numbers can be dropped as they're dynamically allocated. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02pinctrl: sh-pfc: Get rid of CONFIG_ARCH_SHMOBILE_LEGACYGeert Uytterhoeven1-22/+19
Shmobile is all multiplatform these days, so get rid of the reference to CONFIG_ARCH_SHMOBILE_LEGACY. Move the legacy code to do the non-DT mapping between GPIOs and pins inside the existing #ifdef CONFIG_SUPERH section. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sh-pfc: r8a7791/r8a7793: Correct SCIFB1_B SCK MOD_SEL valueGeert Uytterhoeven1-1/+1
When using serial port SCIFB1_B, transmit works, but nothing is received. Receive fails because the SCIFB1_SCK_B settings configure the wrong value for the sel_scifb1 field in the Module Select Register (MOD_SEL), due to an ambiguity in the R-Car M2-W and M2-N datasheets. Tested on r8a7791/koelsch using pins 53 (TXD) and 72 (RXD) on EXIO Connector A. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sh-pfc: r8a7794: Remove bogus SCIF0 SCK pin dataGeert Uytterhoeven1-18/+0
SCIF0 on R-Car E2 does not have an SCK pin. "SCIF_CLK" is the (H)SCIF baud rate generation clock pin, which is not yet supported. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sh-pfc: Confine legacy function GPIOs to SHGeert Uytterhoeven3-1/+10
Legacy function GPIOs are no longer used on ARM since commit a27c5cd1a08cc95c ("sh-pfc: sh73a0: Remove function GPIOs"). Extract its setup code into a separate function, and make all function GPIO related code and data depend on CONFIG_SUPERH. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-10-02pinctrl: sh-pfc: Remove empty gpio_function_free()Geert Uytterhoeven1-5/+0
gpio_chip.free() is optional, and can just be left unimplemented. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02pinctrl: sh-pfc: Stop calling gpiochip_add_pin_range() on DT platformsGeert Uytterhoeven1-15/+22
On platforms where the PFC/GPIO controller is instantiated from DT, the mapping between GPIOs and pins is set up using the "gpio-ranges" property in DT. Hence stop setting up the mapping from C code on DT platforms. This code is still used for SH or ARM-legacy platforms. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-09-25pinctrl: mediatek: Consistently use the BIT() macroJavier Martinez Canillas1-1/+1
The mediatek pinctrl driver uses the BIT() macro instead of open coding 1 << n in all but one place. Replace this occurrence with the BIT() macro for consistency. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-25pinctrl: rockchip: add support for the rk3036Xing Zheng1-0/+17
Many parts of pinctrl rk3036 are similar to rk2928's. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-21ARM: at91/dt: sama5d2: add pio controller nodeLudovic Desroches1-0/+14
Add pio4 controller node to enable pinmux and gpio. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-21MAINTAINERS: Add an entry for pinctrl-at91-pio4Ludovic Desroches1-0/+7
Add an entry for the Atmel PIO4 controller driver. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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