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2021-05-26drm/i915: Drop redundant has_hdmi_sink checkVille Syrjälä1-13/+11
2021-05-26drm/i915: Move the TMDS clock division into intel_hdmi_mode_clock_valid()Ville Syrjälä1-3/+3
2021-05-26drm/i915: Check sink deep color capabilitis during HDMI .mode_valid()Ville Syrjälä1-7/+9
2021-05-26drm/i915: Move platform checks into intel_hdmi_bpc_possible()Ville Syrjälä1-6/+7
2021-05-26drm/i915: Move has_hdmi_sink check into intel_hdmi_bpc_possible()Ville Syrjälä1-3/+6
2021-05-26drm/i915: Extract intel_hdmi_bpc_possible()Ville Syrjälä1-19/+27
2021-05-26drm/i915/display: Remove a redundant function argument from intel_psr_enable_source()Gwan-gyeong Mun1-4/+3
2021-05-26drm/i915/xelpd: Add VRR guardband for VRR CTLManasi Navare5-20/+53
2021-05-26drm/i915/xelpd: Enhanced pipe underrun reportingMatt Roper4-9/+77
2021-05-26drm/i915/adl_p: enable MSO on pipe BJani Nikula1-2/+5
2021-05-26drm/i915: Remove the repeated declarationShaokun Zhang1-2/+0
2021-05-25drm/i915/display/adl_p: Disable PSR2José Roberto de Souza1-0/+9
2021-05-25drm/i915/display/adl_p: Allow DC3CO in pipe and port BJosé Roberto de Souza1-4/+16
2021-05-25drm/i915: WA for zero memory channelJosé Roberto de Souza1-1/+1
2021-05-25drm/i915/adl_p: Handle TC coldJosé Roberto de Souza3-8/+14
2021-05-25drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia()José Roberto de Souza1-4/+2
2021-05-25drm/i915/debugfs: Print remap info for DPT VMAs as wellImre Deak2-3/+19
2021-05-25drm/i915/adlp: Fix GEM VM asserts for DPT VMsImre Deak3-3/+4
2021-05-25drm/i915/adlp: Require DPT FB CCS color planes to be 2MB alignedImre Deak1-2/+11
2021-05-24drm/i915/display: fix typo when returning tableLucas De Marchi1-1/+1
2021-05-24drm/i915/gvt: Add missing macro name changesAnusha Srivatsa1-4/+4
2021-05-21drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4Imre Deak1-38/+33
2021-05-19drm/i915/adl_p: Update memory bandwidth parametersAnusha Srivatsa1-1/+1
2021-05-19drm/i915/adlp: Add PIPE_MISC2 programmingAnusha Srivatsa2-0/+28
2021-05-19drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTLImre Deak2-3/+34
2021-05-19drm/i915/adl_p: Add PLL SupportAnusha Srivatsa2-17/+60
2021-05-19drm/i915/adl_p: Define and use ADL-P specific DP translation tablesMika Kahola3-1/+63
2021-05-19drm/i915/display: Add PSR interrupt error check functionGwan-gyeong Mun1-18/+29
2021-05-19drm/i915/display: Replace dc3co_enabled with dc3co_exitline on intel_psr structGwan-gyeong Mun2-6/+6
2021-05-19drm/i915/adl_p: Tx escape clock with DSIMika Kahola2-2/+25
2021-05-19drm/i915/adl_p: MBUS programmingVandita Kulkarni6-9/+120
2021-05-19drm/i915: Introduce MBUS relative dbuf offsetsVille Syrjälä1-6/+34
2021-05-19drm/i915/adl_p: Add ddb allocation supportVandita Kulkarni2-5/+138
2021-05-19drm/i915/adl_p: Don't config MBUS and DBUF during display initializationJosé Roberto de Souza1-0/+6
2021-05-19drm/i915/adl_p: Implement TC sequencesJosé Roberto de Souza3-11/+137
2021-05-19drm/i915/adl_p: Setup ports/physAnusha Srivatsa1-2/+11
2021-05-19drm/i915/adl_p: Add dedicated SAGV watermarksMatt Roper4-21/+126
2021-05-19drm/i915/xelpd: Add rc_qp_table for rcparams calculationVandita Kulkarni4-1/+333
2021-05-19drm/i915/xelpd: Calculate VDSC RC parametersVandita Kulkarni1-10/+87
2021-05-19drm/amdgpu: stop touching sched.ready in the backendChristian König4-16/+1
2021-05-19drm/amd/amdgpu: fix a potential deadlock in gpu resetLang Yu1-1/+0
2021-05-19drm/amdgpu: modify system reference clock source for navi+ (V2)Aaron Liu1-0/+15
2021-05-19drm/amdgpu: update sdma golden setting for Navi12Guchun Chen1-0/+4
2021-05-19drm/amdgpu: update gc golden setting for Navi12Guchun Chen1-2/+4
2021-05-19drm/amdgpu: Fix a use-after-freexinhui pan1-0/+1
2021-05-19drm/amdgpu/display: restore the backlight on modeset (v2)Alex Deucher1-0/+6
2021-05-19drm/amdgpu/display: add helper functions to get/set backlight (v2)Alex Deucher2-11/+38
2021-05-19drm/amdgpu: Query correct register for DF hashing on AldebaranMukul Joshi2-4/+8
2021-05-19drm/amdgpu: add video_codecs query support for aldebaranJames Zhu1-0/+1
2021-05-19drm/amdkfd: fix a resource leakage issueDennis Li1-0/+2
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