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2017-06-19drm/amdgpu: Optimization of AMDGPU_BO_LIST_OP_CREATE (v2)Alex Xie1-23/+30
v2: Remove duplication of zeroing of bo list (Christian König) Move idr_alloc function to end of ioctl (Christian König) Call kfree bo_list when amdgpu_bo_list_set return error. Combine the previous two patches into this patch. Add amdgpu_bo_list_set function prototype. Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2017-06-16amdgpu: use drm sync objects for shared semaphores (v6)Dave Airlie4-2/+97
This creates a new command submission chunk for amdgpu to add in and out sync objects around the submission. Sync objects are managed via the drm syncobj ioctls. The command submission interface is enhanced with two new chunks, one for syncobj pre submission dependencies, and one for post submission sync obj signalling, and just takes a list of handles for each. This is based on work originally done by David Zhou at AMD, with input from Christian Konig on what things should look like. In theory VkFences could be backed with sync objects and just get passed into the cs as syncobj handles as well. NOTE: this interface addition needs a version bump to expose it to userspace. TODO: update to dep_sync when rebasing onto amdgpu master. (with this - r-b from Christian) v1.1: keep file reference on import. v2: move to using syncobjs v2.1: change some APIs to just use p pointer. v3: make more robust against CS failures, we now add the wait sems but only remove them once the CS job has been submitted. v4: rewrite names of API and base on new syncobj code. v5: move post deps earlier, rename some apis v6: lookup post deps earlier, and just replace fences in post deps stage (Christian) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-16amdgpu/cs: split out fence dependency checking (v2)Dave Airlie1-42/+51
This just splits out the fence depenency checking into it's own function to make it easier to add semaphore dependencies. v2: rebase onto other changes. v1-Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-16drm/amdgpu: don't check the default value for vm sizeAlex Deucher1-0/+4
Avoids printing spurious messages like this: [ 3.102059] amdgpu 0000:01:00.0: VM size (-1) must be a power of 2 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm: Reduce scope of 'state' variableDawid Kurek1-1/+2
Smaller scope reduces visibility of variable and makes usage of uninitialized variable less possible. Changes in v2: - separate declaration and initialization Changes in v3: - add missing signed-off-by tag Signed-off-by: Dawid Kurek <dawikur@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170615174556.GA8872@gmail.com
2017-06-15drm: mxsfb_crtc: Reset the eLCDIF controllerFabio Estevam1-0/+42
According to the eLCDIF initialization steps listed in the MX6SX Reference Manual the eLCDIF block reset is mandatory. Without performing the eLCDIF reset the display shows garbage content when the kernel boots. In earlier tests this issue has not been observed because the bootloader was previously showing a splash screen and the bootloader display driver does properly implement the eLCDIF reset. Add the eLCDIF reset to the driver, so that it can operate correctly independently of the bootloader. Tested on a imx6sx-sdb board. Cc: <stable@vger.kernel.org> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1494007301-14535-1-git-send-email-fabio.estevam@nxp.com
2017-06-15drm/amdgpu: Fix compiler warningsHarish Kasiviswanathan1-4/+4
Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu: vm_update_ptes remove code duplicationHarish Kasiviswanathan1-57/+16
CPU and GPU paths were mostly the same. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port VCN over to new SOC15 macrosTom St Denis1-82/+82
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macrosTom St Denis1-7/+7
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port PSP v3.1 over to new SOC15 macrosTom St Denis1-16/+16
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port NBIO v7.0 driver over to new SOC15 macrosTom St Denis1-25/+17
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port NBIO v6.1 driver over to new SOC15 macrosTom St Denis1-31/+23
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macrosTom St Denis1-87/+87
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port MMHUB over to new SOC15 macrosTom St Denis1-14/+11
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Cleanup gfxhub read-modify-write patternsTom St Denis1-8/+3
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Port GFXHUB over to new SOC15 macrosTom St Denis1-14/+12
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Add offset variant to SOC15 macrosTom St Denis1-0/+14
Allows reading/writing via SOC15 macros with offset for various register banks. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/powerplay: add avfs control for Vega10Eric Huang1-0/+1
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu: add virtual display support for ravenAlex Deucher1-0/+2
Same as other asics. If enabled, exposes a user selectable number of virtual displays. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu/gfx9: fix compute ring doorbell indexAlex Deucher1-1/+1
This got lost when the code was revamped. Copy/paste bug from gfx8. Reported-by: Evan Quan <evan.quan@amd.com> Fixes: 78c168342 (drm/amdgpu: allow split of queues with kfd at queue granularity v4) Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: Rename KIQ ring to avoid spacesTom St Denis1-1/+1
Swap space for underscore in ring name. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/amdgpu: gfx9 tidy ups (v2)Tom St Denis1-19/+7
A couple of simple tidy ups to register programming. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v2): Avoid using 'data' uninitialized Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu: add contiguous flag in ucode bo createhorchen1-1/+2
Under VF environment, the ucode would be settled to the visible VRAM, As it would be pinned to the visible VRAM, it's better to add contiguous flag,otherwise it need to move gpu address during the pin process. This movement is not necessary. Signed-off-by: horchen <horace.chen@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu: fix missed gpu info firmware when cache firmware during S3Huang Rui2-8/+13
gpu_info firmware is released after data is used. But when system enters into suspend, upper class driver will cache all firmware names. At that time, gpu_info will be failing to load. It seems an upper class issue, that we should not release gpu_info firmware until device finished. [ 903.236589] cache_firmware: amdgpu/vega10_sdma1.bin [ 903.236590] fw_set_page_data: fw-amdgpu/vega10_sdma1.bin buf=ffff88041eee10c0 data=ffffc90002561000 size=17408 [ 903.236591] cache_firmware: amdgpu/vega10_sdma1.bin ret=0 [ 903.464160] __allocate_fw_buf: fw-amdgpu/vega10_gpu_info.bin buf=ffff88041eee2c00 [ 903.471815] (NULL device *): loading /lib/firmware/updates/4.11.0-custom/amdgpu/vega10_gpu_info.bin failed with error -2 [ 903.482870] (NULL device *): loading /lib/firmware/updates/amdgpu/vega10_gpu_info.bin failed with error -2 [ 903.492716] (NULL device *): loading /lib/firmware/4.11.0-custom/amdgpu/vega10_gpu_info.bin failed with error -2 [ 903.503156] (NULL device *): direct-loading amdgpu/vega10_gpu_info.bin Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu: export test ib debugfs interfaceHuang Rui1-0/+54
As Christian and David's suggestion, submit the test ib ring debug interfaces. It's useful for debugging with the command submission without VM case. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/powerplay: add GPU power display for vega10Eric Huang1-0/+20
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amd/powerplay: update vega10_ppsmc.hEric Huang1-1/+2
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu: avoid to reset wave_front_size to 0Hawking Zhang1-2/+0
No need to clear it. The values are set explicitly. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-15drm/amdgpu: add new member in gpu_info fwHawking Zhang3-0/+11
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-14drm: Remove duplicate forward declarationDawid Kurek1-2/+0
Forward declarations in C are great but I'm pretty sure one is enough. Signed-off-by: Dawid Kurek <dawikur@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170614213518.GA3554@gmail.com
2017-06-14drm/panel: s6e3ha2: Add support for s6e3hf2 panel on TM2e boardHoegeun Kwon1-7/+57
This patch supports TM2e panel and the panel has 1600x2560 resolution in 5.65" physical. This identify panel type with compatibility string, also invoke display mode that matches the type. So add the check code for s6e3ha2 compatibility and s6e3hf2 type and select the drm_display_mode of default and edge type. Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Inki Dae <inki.dae@samsung.com> [treding@nvidia.com: fixup checkpatch warnings] Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/1492504836-19225-3-git-send-email-hoegeun.kwon@samsung.com
2017-06-14dt-bindings: Add support for samsung s6e3hf2 panelHoegeun Kwon1-1/+4
The samsung s6e3hf2 panel is a 5.65" 1600x2560 AMOLED panel connected using MIPI-DSI interfaces. The s6e3hf2 is add to samsung,s6e3ha2.txt binding because it is a panel similar to the s6e3ha2. So add the compatible string and comments. Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/1492504836-19225-2-git-send-email-hoegeun.kwon@samsung.com
2017-06-14drm/panel: add backlight dependency for sitronix-st7789vArnd Bergmann1-0/+1
Without the dependency, we run into a link error: drivers/gpu/drm/panel/panel-sitronix-st7789v.o: In function `st7789v_probe': panel-sitronix-st7789v.c:(.text.st7789v_probe+0xc0): undefined reference to `of_find_backlight_by_node' Fixes: 7142afb3a186 ("drm/panel: Add driver for sitronix ST7789V LCD controller") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170419180326.303994-1-arnd@arndb.de
2017-06-14drm/panel: S6E3HA2 needs backlight codeArnd Bergmann1-0/+1
The new S6E3HA2 driver fails to link when backlight is disabled: ERROR: "backlight_device_register" [drivers/gpu/drm/panel/panel-samsung-s6e3ha2.ko] undefined! ERROR: "backlight_device_unregister" [drivers/gpu/drm/panel/panel-samsung-s6e3ha2.ko] undefined! This adds a Kconfig dependency like we have it for some other panel drivers. Fixes: ed29f9426d9b ("drm/panel: Add support for S6E3HA2 panel driver on TM2 board") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170419175939.189098-2-arnd@arndb.de
2017-06-14drm/panel: simple: add support for AUO P320HVN03Lucas Stach2-0/+39
This adds support for the AU Optronics Corporation 31.5" FHD (1920x1080) LVDS TFT LCD panel, which can be supported by the simple panel driver Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-4-l.stach@pengutronix.de
2017-06-14drm/panel: simple: add support for NLT NL192108AC18-02DLucas Stach2-0/+37
This adds support for the NLT Technologies NL192108AC18-02D 15.6" LVDS FullHD TFT LCD panel, which can be supported by the simple panel driver. Timings are taken from the preliminary datasheet, as a final one is not yet available. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-3-l.stach@pengutronix.de
2017-06-14dt-bindings: add vendor prefix for NLT Technologies, Ltd.Lucas Stach1-0/+1
NLT technologies is the former NEC display business, but changed its name to NLT Technologies when forming a joint venture with Shenzhen AVIC OPTOELECTRONICS, Ltd. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-2-l.stach@pengutronix.de
2017-06-14drm/panel: simple: add support for NEC NL12880B20-05Lucas Stach2-0/+38
This adds support for the NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel, which can be supported by the simple panel driver. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-1-l.stach@pengutronix.de
2017-06-14drm/panel: add Innolux P079ZCA panel driverChris Zhong3-0/+352
Support Innolux P079ZCA 7.85" 768x1024 TFT LCD panel, it is a MIPI DSI panel. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: http://patchwork.freedesktop.org/patch/msgid/1490316692-20506-2-git-send-email-zyw@rock-chips.com