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The firmware leaves the pins in GPIO mode. Until we have a proper pinmux
driver hooked on we just need to bitbang SPI. No big deal, this is just
used for the power button and performance is not important.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-12-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds support for the power button attached to the Embedded Controller
on a Dell Wyse 3020 "Ariel" board.
However, while the EC itself is controlled via I2C, the input capability
for the power button acts as a separate device attached to the SPI, hence
it has a separate device node.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-11-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add the device node for the computer's embedded controller, responsible
for controlling the LEDs and system power.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-10-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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These are slighly easier to read.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-9-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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These are slighly easier to read.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-8-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-7-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Drop the linux,usable-memory properties; the schema is unhappy about
them.
They've been cargo-culted from Open Firmware and I don't know what
purpose they serve. Perhaps they are meant to provide the OFW runtime.
In that case it's still okay to drop them from here; OFW is welcome to add
it upon boot.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-6-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Drop the linux,usable-memory properties; the schema is unhappy about
them:
mmp2-olpc-xo-1-75.dt.yaml: /: memory: False schema does not allow
{'linux,usable-memory': [[0, 528482304]],
'available': [[847872, 519245824, 4096, 782336]],
'reg': [[0, 536870912]], 'device_type': ['memory']}
They've been cargo-culted from Open Firmware and I don't know what
purpose they serve. Perhaps they are meant to provide the OFW runtime.
In that case it's still okay to drop them from here; OFW is welcome to add
it upon boot.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-5-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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It contains a reg property. Add its base to the node name.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-4-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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On MMP3 the camera interface is on a separate power island. This
property tells the driver to enable it when appropriate.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-3-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The property specifies a list of GPIO-capable pins. Don't limit it to a
single element as there's presumably more than one GPIO pin.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-2-lkundrak@v3.sk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds the Richtek RT8515 Flash LED to the Golden,
Skomer and Janice device trees.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210201091308.284465-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to
the DisplayPort connector.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com
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Add a DT node for the DisplayPort subsystem, a hard IP present in the
Zynq Ultrascale+ MPSoC.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4d978aef852cacdfb35aa8e50d648a787e73b90c.1611232558.git.michal.simek@xilinx.com
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Add a DT node for the DisplayPort DMA engine (DPDMA).
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3d11015512a085592f2aca76eeddc04178d38bbe.1611232558.git.michal.simek@xilinx.com
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Trivial fix.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/13d064fc4850f96904a04e330cea5295d3751e46.1611226560.git.michal.simek@xilinx.com
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Xilinx ZynqMP zcu104 revC and newer board revisions have different i2c
structure compare to revA. The rest of the board is the same from software
perspective.
Also enable DMAs and QSPI.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/17f68c235ea1ce96c3293ca0cf3178951d6663f7.1611224800.git.michal.simek@xilinx.com
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Add missing iommu IDs to all IPs which have IDs assigned.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/78afdafdc60c3182318894f2808f7f337a798278.1611224800.git.michal.simek@xilinx.com
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Xilinx ZynqMP SoC has FPD (Full Power Domain) and LPD (Low Power Domain)
watchdogs. There are cases where also LPD WDT should be used by Arm cores
that's why list it with disabled status.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0489a1d5528614f1d570ea153d38b813f0c1eb9f.1611224800.git.michal.simek@xilinx.com
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Add missing ZynqMP qspi IP. It works in single mode only.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5cebbc59a452f282c4ce0f0e1dffecadac8f126a.1611224800.git.michal.simek@xilinx.com
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Add missing arasan controller with clocks. Disable it by default. Every
board can enable it with specifying others properties.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/05cc1ce7973ac5200aeca428c137b422c827c5e8.1611224800.git.michal.simek@xilinx.com
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Add missing xlnx,mio-bank property to sdhci nodes. Also add properties with
0 value to have it listed in case that files are copied to different
projects where default case doesn't need to be handled in the same way.
That's why explicitly list them too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/dbdfcc1b25af8b28fc658a37ce18902978cb410d.1611224800.git.michal.simek@xilinx.com
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Add label which is used by bootloader for adding bootloader specific flag.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3dc8416abdd3498e61edcd83830a12af295c5c6d.1611224800.git.michal.simek@xilinx.com
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Enable psgtr driver and write clocks property to get sata to work.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/80b52ef97501968ee97fc152363bc4b9b7bb2cff.1611224800.git.michal.simek@xilinx.com
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Enable reset controller to be prepared for use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4fb62952f61e5046d750fff0e3e469c7abd1d0d0.1611224800.git.michal.simek@xilinx.com
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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Enable si5341 driver is the main chip for providing preprogrammed clocks
for the whole platform.
# cat /sys/kernel/debug/clk/clk_summary
...
refhdmi 1 1 0 114285000 0 0 50000
xtal_0 0 0 0 114285000 0 0 50000
pll_0 0 0 0 40731174000000 0 0 50000
clk1_0 0 0 0 27000000 0 0 50000
clk0_0 0 0 0 27000000 0 0 50000
ref48M 1 2 0 48000000 0 0 50000
si5341 0 4 0 14000000 0 0 50000
clock-generator.N4 0 0 0 0 0 0 50000
clock-generator.N3 0 1 0 733260000 0 0 50000
clock-generator.9 0 1 0 33330000 0 0 50000
clock-generator.N2 0 1 0 104000000 0 0 50000
clock-generator.2 0 1 0 26000000 0 0 50000
clock-generator.N1 0 2 0 594000000 0 0 50000
clock-generator.7 0 1 0 74250000 0 0 50000
clock-generator.0 0 1 0 27000000 0 0 50000
clock-generator.N0 0 4 0 1000000000 0 0 50000
clock-generator.8 0 0 0 0 0 0 50000
clock-generator.6 0 1 0 125000000 0 0 50000
clock-generator.5 0 1 0 100000000 0 0 50000
clock-generator.4 0 1 0 100000000 0 0 50000
clock-generator.3 0 1 0 125000000 0 0 50000
clock-generator.1 0 0 0 0 0 0 50000
...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/b93f13297684704a60e8d7274009a20aa98d14f7.1611224800.git.michal.simek@xilinx.com
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Origin DT binding just specify driver but wasn't aligned with DT binding
which came later. Extend description for zcu102 and zcu106 to cover latest
binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/82b2b13006307f108ace81c50c213c3857078b57.1611224800.git.michal.simek@xilinx.com
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u48 chip on zcu111 is si5382 not si5328.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cefda1a894fb54059aa1b018e4ecad0eb36fdc9d.1611224800.git.michal.simek@xilinx.com
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The header file of GCE should be for MT8183 SoC instead of MT8173.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183")
Reported-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210131101726.804-1-matthias.bgg@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The R_INTC block controls more than just the NMI, and it is a different
hardware block than the NMI INTC found in some other Allwinner SoCs, so
the label "nmi_intc" is inaccurate. Name it "r_intc" to match the
compatible and to match the few references in the vendor documentation.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210118055040.21910-6-samuel@sholland.org
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Bluetooth module on BananaPi M2 Zero can also be used for streaming
audio. However, for that case higher UART speed is required.
Add a max-speed property.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210116103710.245617-1-jernej.skrabec@siol.net
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Bluetooth module on BananaPi M2 Plus can also be used for streaming
audio. However, for that case higher UART speed is required.
Add a max-speed property.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210116105228.847073-1-jernej.skrabec@siol.net
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The commit 53441b8ef7de ("arm64: dts: allwinner: h6: PineH64 model B:
Add bluetooth") introduced the Bluetooth chip for the PineH64 model B,
but the GPIOs property didn't conform to the binding of the bluetooth
chip. Let's fix this.
Fixes: 53441b8ef7de ("arm64: dts: allwinner: h6: PineH64 model B: Add bluetooth")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-19-maxime@cerno.tech
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The commit 7fa40ca7ef61 ("arm64: allwinner: dts: a64: add DT for Early
Adopter's PineTab") introduced an ili9881-based panel device node but
didn't conform to the binding. Fix this.
Fixes: 7fa40ca7ef61 ("arm64: allwinner: dts: a64: add DT for Early Adopter's PineTab")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-18-maxime@cerno.tech
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The stk3311 binding don't expect a vdd or leda power supplies. Remove
them.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-17-maxime@cerno.tech
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DTC and the dt-validate tools report warnings for opp with the format
opp@$frequency: dtc for a missing reg property, and dt-validate since
the binding requires child nodes to have the format opp-$frequency.
Change this to the latter format.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-16-maxime@cerno.tech
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The SinA33 panel is missing its power-supply property, even though the
binding mandates it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-15-maxime@cerno.tech
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The empty CSI port triggers a dt-validate warning. Let's align with the
other DTSI and remove it entirely, expecting the DTS to fill it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-14-maxime@cerno.tech
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Our CSI endpoint trigger some DTC warnings due to the fact that we're
having a single endpoint that doesn't need any reg property, and since
we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-13-maxime@cerno.tech
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While the USB PHY Device Tree mandates that the name of the ID detect pin
should be usb0_id_det-gpios, a significant number of device tree use
usb0_id_det-gpio instead.
This was functional because the GPIO framework falls back to the gpio
suffix that is legacy, but we should fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-12-maxime@cerno.tech
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Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each voltage state,
which in turns create a validation warning.
Let's fix this.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-11-maxime@cerno.tech
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The mma8452 binding doesn't expect an io-channel-cells property, let's
remove it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://lore.kernel.org/r/20210114113538.1233933-10-maxime@cerno.tech
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Fix extreme slow speed (200MB takes ~20 min) on writing sdcard on
bananapi-r64 by adding reset-control for mmc1 like it's done for mmc0/emmc.
Fixes: 2c002a3049f7 ("arm64: dts: mt7622: add mmc related device nodes")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20210113180919.49523-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Krane-sku0 is similar to krane-sku176 but using a different panel
source.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210113110400.616319-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Similar to krane-sku176 but using a different panel source.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210113110400.616319-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Config dsi node for mt8183 kukui. Set panel and ports.
Several kukui boards share the same panel property and only compatible
is different. So compatible will be set in board dts for comparison
convenience.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/20210113110400.616319-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Support pwrap on Mediatek MT6779 platform by adding pwrap node in dts file.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Link: https://lore.kernel.org/r/1609747703-27207-2-git-send-email-argus.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Support DEVAPC on MT6779 platforms by adding device node.
Signed-off-by: Neal Liu <neal.liu@mediatek.com>
Reviewed-by: Hanks Chen <hanks.chen@mediatek.com>
Link: https://lore.kernel.org/r/1608713092-26952-2-git-send-email-neal.liu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add idle states for cpu-off and cluster-off.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Link: https://lore.kernel.org/r/20201222045820.26355-1-jamesjj.liao@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add domain supply node.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210129101208.2625249-4-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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