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2019-11-05dt-bindings: bus: sunxi: Add H3 MBUS compatibleJernej Skrabec1-0/+1
Allwinner H3 SoC also contains MBUS controller. Add compatible for it. Acked-by: Maxime Ripard <mripard@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-02dt-bindings: arm: sunxi: add FriendlyARM NanoPi Duo2Karl Palsson1-0/+5
Adds bindings for the newly added NanoPi Duo2 board. Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-02ARM: dts: sun8i: add FriendlyARM NanoPi Duo2Karl Palsson2-0/+175
This is an Allwinner H3 based board, with 512MB ram, a USB OTG port, microsd slot, an onboard AP6212A wifi/bluetooth module, and a CSI connector. Full details and schematic available from vendor: http://wiki.friendlyarm.com/wiki/index.php/NanoPi_Duo2 Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-02arm64: allwinner: h6: Enable GPU node for Tanix TX6Clément Péron1-0/+4
Unlike other H6 boards, Tanix TX6 doesn't have a PMIC so we can enable the GPU without providing a specific power supply. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: bluetooth for Emlid Neutis N5Georgii Staroselskii1-0/+13
The Emlid Neutis N5 board has AP6212 BT+WiFi chip. This patch is in line with 8558c6e21ceb ("ARM: dts: sun8i: h3: bluetooth for Banana Pi M2 Zero board") and other commits that add Bluetooth support for similar boards. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pinsKarl Palsson1-0/+5
uart1 and uart3 had existing pin definitions for the rts/cts pairs. Add definitions for uart2 as well. Signed-off-by: Karl Palsson <karlp@tweak.net.au> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun9i: a80: Add Security System nodeCorentin Labbe1-0/+9
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms. It could be found on Allwinner SoC A80 and A83T This patch adds it on the Allwinner A80 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: a83t: Add Security System nodeCorentin Labbe1-0/+9
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms. It could be found on Allwinner SoC A80 and A83T This patch adds it on the Allwinner A83T SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add Crypto Engine node on H6Corentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. This patch enables the Crypto Engine on the Allwinner H6 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add crypto engine node on H5Corentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner H5 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add Crypto Engine node on A64Corentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner A64 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: H3: Add Crypto Engine nodeCorentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner H3 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: R40: add crypto engine nodeCorentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic offloader that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner R40 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>