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2018-04-23usb: core: hcd: mark expected switch fall-throughGustavo A. R. Silva1-0/+1
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1468266 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-23usb: phy: Add Kconfig entry for Tegra PHY driverDmitry Osipenko3-4/+11
Tegra's EHCI driver has a build dependency on Tegra's PHY driver and currently Tegra's PHY driver is built only when Tegra's EHCI driver is built. Add own Kconfig entry for the Tegra's PHY driver so that drivers other than ehci-tegra (like ChipIdea UDC) could work with ehci-tegra driver being disabled in kernels config by allowing user to manually select the PHY driver. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-23usb: tegra: Move utmi-pads reset from ehci-tegra to tegra-phyDmitry Osipenko3-53/+115
UTMI pads are shared by USB controllers and reset of UTMI pads is shared with the reset of USB1 controller. Currently reset of UTMI pads is done by the EHCI driver and ChipIdea UDC works because EHCI driver always happen to be probed first. Move reset controls from ehci-tegra to tegra-phy in order to resolve the problem. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-23usb: phy: tegra: Cleanup error messagesDmitry Osipenko1-28/+41
Tegra's PHY driver has a mix of pr_err() and dev_err(), let's switch to dev_err() and use common errors message formatting across the driver for consistency. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-22Documentation sysfs-bus-usb: Add rx_lanes and tx_lanes introduced in USB 3.2Mathias Nyman1-0/+18
rx_lanes and tx_lanes sysfs entries show the number of lanes in use by a device. USB 3.2 adds support for Dual-lane (symmetrical), using 2 rx lanes and 2 tx lanes for normal non Inter-Chip SSIC devices. USB 3.1 and older are all single lane. SSIC devices can have up to 4 lanes per direction in use, with different number of rx and tx lanes. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-22USB: USB 3.2 Add sysfs entries for a usb device rx_lanes and tx_lanesMathias Nyman1-0/+22
Add rx_lanes and tx_lanes lane count sysfs entries for a usb device struct usb_devuce rx_lanes and tx_lanes variables. Shows number of lanes used by the usb device Data rate of a device is the lane speed * lane count, for example USB 3.2 Gen 2x2 device uses 10Gbps signaling per lane, and has dual-lane support 10Gbps * 2 = 20Gbps Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-22USB: show USB 3.2 Dual-lane devices as Gen Xx2 during device enumerationMathias Nyman1-2/+5
USB 3.2 specification adds a Gen XxY notion for USB3 devices where X is the signaling rate on the wire. Gen 1xY is 5Gbps Superspeed and Gen 2xY is 10Gbps SuperSpeedPlus. Y is the lane count. For normal, non inter-chip (SSIC) devies the rx and tx lane count is symmetric, and the maximum lane count for USB 3.2 devices is 2 (dual-lane). SSIC devices may have asymmetric lane counts, with up to four lanes per direction. The USB 3.2 specification doesn't point out how to use the Gen XxY notion for these devices, so we limit the Gen Xx2 notion to symmertic Dual lane devies. For other devices just show Gen1 or Gen2 Gen 1 5Gbps Gen 2 10Gbps Gen 1x2 10Gbps Dual-lane (USB 3.2) Gen 2x2 20Gbps Dual-lane (USB 3.2) Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-22usb: set root hub lane countsMathias Nyman1-0/+5
Set the the rx_lane and tx_lane count to "2" for USB 3.2 hosts. For all other older hosts set the default lane counts to 1 Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-22USB: Add support to store lane count used by USB 3.2Mathias Nyman3-0/+17
USB 3.2 specification adds Dual-lane support, doubling the maximum SuperSpeedPlus data rate from 10Gbps to 20Gbps. Dual-lane takes into use a second set of rx and tx wires/pins in the Type-C cable and connector. Add "rx_lanes" and "tx_lanes" variables to struct usb_device to store the numer of lanes in use. Number of lanes can be read using the extended port status hub request that was introduced in USB 3.1. Extended port status rx and tx lane count are zero based, maximum lanes supported by non inter-chip (SSIC) USB 3.2 is 2 (dual lane) with rx and tx lane count symmetric. SSIC devices support asymmetric lanes up to 4 lanes per direction. If extended port status is not available then default to one lane. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-22usb: define HCD_USB32 speed option for hosts that support USB 3.2 dual-laneMathias Nyman2-0/+4
Hosts that support USB 3.2 Enhaned SuperSpeed can set their hcd speed to HCD_USB32 to let usb core and host drivers know that the controller supports new USB 3.2 dual-lane features. make sure usb core handle HCD_USB32 hosts correctly, for now similar to HCD_USB32. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>