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2018-03-19drm/msm/mdp5: don't pre-reserve LM's if no dual-dsiRob Clark1-1/+5
If there is only a single DSI interface, don't reserve the first two layer-mixers for the dual-DSI use-case. This was causing problems for WB, not being able to assign a LM, on 8x16, which has only two LM's and a single DSI. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm/mdp5: add missing LM flush bitsRob Clark1-0/+2
For some reason, layer-mixer 3 and 4 were missing. LM3 is used for writeback on 8x16. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm/mdp5: print a bit more of the atomic stateRob Clark1-0/+5
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm/mdp5: rework CTL START signal handlingRob Clark7-44/+35
For DSI cmd-mode and writeback, we need to write the CTL's START register to kick things off, but we only want to do that once both the encoder and the crtc have a chance to write their corresponding flush bits. The difficulty is that when there is a full modeset (ie. encoder state has changed) we want to defer the start until encoder->enable(). But if only plane's have changed, we want to do this from crtc->commit(). The start_mask was a previous attempt to handle this, but it didn't really do the right thing since atomic conversion. Instead track in the crtc state that the start should be deferred, set to try from encoder's (or in future writeback's) atomic_check(). This way the state is part of the atomic state, and rollback can work properly if an atomic test fails. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm: Trigger fence completion from GPUBjorn Andersson3-16/+4
Interrupt commands causes the CP to trigger an interrupt as the command is processed, regardless of the GPU being done processing previous commands. This is seen by the interrupt being delivered before the fence is written on 8974 and is likely the cause of the additional CP_WAIT_FOR_IDLE workaround found for a306, which would cause the CP to wait for the GPU to go idle before triggering the interrupt. Instead we can set the (undocumented) BIT(31) of the CACHE_FLUSH_TS which will cause a special CACHE_FLUSH_TS interrupt to be triggered from the GPU as the write event is processed. Add CACHE_FLUSH_TS to the IRQ masks of A3xx and A4xx and remove the workaround for A306. Suggested-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm/dsi: fix direct caller of msm_gem_free_object()Rob Clark2-3/+2
This should be using drm_gem_object_put(). Also since this is done only in driver unload path, we don't need to synchronize setting tx_gem_obj to NULL, so juse use the _unlocked() variant. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm: strip out msm_fence_cbRob Clark2-3/+0
Remnants of pre-dma_fence fencing which got left behind by mistake. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm: rename mdp->dispRob Clark35-25/+25
Since new display controller is called "dpu" instead of "mdp". Lets make the name of the toplevel directory for the display controllers a bit more generic. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Sean Paul <seanpaul@chromium.org>
2018-03-19drm/msm/dsi: Fix potential NULL pointer dereference in msm_dsi_modeset_initGustavo A. R. Silva1-1/+2
_dev_ is being dereferenced before it is null checked, hence there is a potential null pointer dereference. Fix this by moving the pointer dereference after _dev_ has been null checked. Fixes: d4e7f38d70ef ("drm/msm/dsi: check msm_dsi and dsi pointers before use") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm/adreno/a5xx_debugfs: fix potential NULL pointer dereferenceGustavo A. R. Silva1-1/+3
_minor_ is being dereferenced before it is null checked, hence there is a potential null pointer dereference. Fix this by moving the pointer dereference after _minor_ has been null checked. Fixes: 024ad8df763f ("drm/msm: add a5xx specific debugfs") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-17drm/tegra: prime: Implement ->{begin,end}_cpu_access()Thierry Reding1-0/+30
These callbacks allow the exporter to swap in and pin the backing storage for buffers as well as invalidate the cache in preparation for accessing the buffer from the CPU, and flush the cache and unpin the backing storage when the CPU is done modifying the buffer. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-17drm/tegra: gem: Map pages via the DMA APIThierry Reding1-16/+16
When allocating pages, map them with the DMA API in order to invalidate caches. This is the correct usage of the API and works just as well as faking up the SG table and using the dma_sync_sg_for_device() function. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-17drm/tegra: hub: Use private object for global stateThierry Reding5-80/+123
Rather than subclass the global atomic state to store the hub display clock and rate, create a private object and store this data in its state. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-16amdgpu/dm: Default PRE_VEGA ASIC support to 'y'Harry Wentland1-1/+1
Even though we default PRE_VEGA support to 'n' upstream in amd-staging we want to keep it enabled by default. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-16drm/amd/pp: Remove the cgs wrapper for notify smu version on APURex Zhu3-12/+5
Refine commit f49e9bac191b ("drm/amd/pp: Get and save Rv smu version") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-16drm/amd/display: fix dereferencing possible ERR_PTR()Shirish S1-0/+3
This patch fixes static checker warning caused by "36cc549d5986: "drm/amd/display: disable CRTCs with NULL FB on their primary plane (V2)" Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-16drm/amd/display: Refine disable VGAClark Zheng2-6/+22
bad case won't follow normal sense, it will not enable vga1 as usual, but vga2,3,4 is on. Signed-off-by: Clark Zheng <clark.zheng@amd.com> Reviewed-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernelAndrey Grodzovsky1-2/+6
and amdgpu_bo_create_reserved. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/tegra: fb: Properly support linear modifierThierry Reding1-3/+6
Instead of relying on the tiling attached to a buffer object, make sure to set the proper tiling for linear buffers. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-15drm/tegra: plane: Support format modifiersThierry Reding4-2/+56
Pass the list of valid format modifiers to planes upon initialization and implement the ->format_mod_supported() callback so that userspace can query for the valid combinations of formats and modifiers. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-15drm/radeon: Don't turn off DP sink when disconnectedMichel Dänzer1-19/+12
Turning off the sink in this case causes various issues, because userspace expects it to stay on until it turns it off explicitly. Instead, turn the sink off and back on when a display is connected again. This dance seems necessary for link training to work correctly. Bugzilla: https://bugs.freedesktop.org/105308 Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Rename file name cz_* to smu8_*Rex Zhu6-4/+4
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Replace function/struct name cz_* with smu8_*Rex Zhu5-807/+806
hw ip smu8 was used on CZ/ST, so use smu8 as the prefix of the function/struct name in powerplay. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Remove unneeded void * casts in cz_hwmgr.c/cz_smumgr.cRex Zhu2-60/+60
Removes unneeded void * casts for the following pointers: hwmgr->backend hwmgr->smu_backend Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Mv cz uvd/vce pg/dpm functions to cz_hwmgr.cRex Zhu5-209/+140
1. delete cz_clockpowergating.c/.h files 2. mark uvd/vce dpm/pg functions static Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Remove dead header file pp_asicblocks.hRex Zhu2-48/+0
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Delete dead code on cz_clockpowergating.cRex Zhu2-81/+0
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Call amdgpu_ucode_fini_bo in amd_powerplay.cRex Zhu2-4/+7
make it symmetric with amdgpu_ucode_init_bo in amd_powerplay.c refine the "commit b22558bb4ff8fc9fe925222f90297d7a03a5fb20" Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Remove wrapper layer of smu ip functionsRex Zhu19-804/+336
1. delete amdgpu_powerplay.c used for wrapping smu ip functions 2. delete struct pp_instance, 3. make struct hwmgr as the smu hw handle. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Don't compared ip_block_type with ip_block_indexRex Zhu1-1/+1
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Plus NULL function pointer checkRex Zhu1-3/+6
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Move helper functions to smu_help.cRex Zhu5-663/+723
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Replace rv_* with smu10_*Rex Zhu9-371/+371
Powerplay is for the hw ip smu, for RV, smu10 is used, so use smu10 as the prefix of the files name/function name. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Fix function parameter not correctRex Zhu1-2/+2
caused by "commit dcefb7668e5b4fb56099b16d1790cd3056322b03" Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Add rv_copy_table_from/to_smc to smu backend function tableRex Zhu4-36/+44
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Add new smu backend function smc_table_managerRex Zhu3-0/+11
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Mark internal functions as static in rv_smumgr.cRex Zhu1-3/+3
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Add rv_read_arg_from_smc to smu backend function tableRex Zhu3-14/+11
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Remove meanless return value check in RVRex Zhu2-117/+53
In send_message_to_smu helper functions, Print out the error code for debug if smu failed to response. The helper functions always return true, so no need to check their return value. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Delete is_smc_ram_running function on RVRex Zhu2-28/+0
1. There is a race condition when another ip also use same register pairs 2. check once at boot up by GetDriverIfVersion message is sufficient to check SMU health. so delete is_smc_ram_running check. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Clean up header file includeRex Zhu3-7/+3
smu7_smumgr.h should not be included in rv and vega, The common functions for all smu7 asics are put in smu_smumgr.c. Not include cgs interface in smumgr.c. the code used cgs interface has been deleted. Not include smu_ucode_xfer_vi.h in rv/vega Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Fix memory leak in error path in smumgrRex Zhu6-23/+43
Free the backend structure if we fail to allocate device memory. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/pp: Simplified the avfs btc state on smu7Rex Zhu7-150/+51
AVFS feature support/not support is enough to driver. so remove the complex define of the avfs btc state. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amd/powerplay: Fix KASAN user after free on driver unload.Andrey Grodzovsky2-48/+23
Reusing local handle to initialize BO without resetting it to NULL is wrong since it causes amdgpu_bo_create_reserved to skip new BO creation and just reuse the given pointer for pinning. Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/tegra: dc: Dedicate overlay plane to cursor on older Tegra'sDmitry Osipenko1-5/+25
Older Tegra's do not support RGBA format for the cursor, but instead overlay plane could be used for it. Since there is no much use for the overlays on a regular desktop and HW-accelerated cursor is much better than a SW cursor, let's dedicate one overlay plane to the mouse cursor. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-15drm/tegra: plane: Make tegra_plane_get_overlap_index() staticDmitry Osipenko1-2/+2
This function is not used outside of the file and can be static. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-14drm/amdgpu/sdma4: Remove unused header file from sdma_v4_0.cFeifei Xu1-2/+0
Remove mmhub header files inclusion which not used. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu/sdma4: use num_instances for clock/powergating configAlex Deucher1-4/+4
Rather then relying on the asic type for the second instance. Makes it more consistent with the rest of the code. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-14drm/amdgpu: remove trailing whitespace from soc15ip.hAlex Deucher1-143/+143
no intended functional change. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu/powerplay/vega10: fix memory leak in error pathAlex Deucher1-2/+4
Free the backend structure if we fail to allocate device memory. Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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