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2020-03-26arm: dts: calxeda: Fix interrupt groupingAndre Przywara3-5/+5
Currently multiple interrupts for some devices are written as one array instead of using the DT grouping notation (<0 42 4>, <0 23 4>). This ends up in the same binary representation in the .dtb, but is semantically not equivalent. The yaml schema checks will stumble over this, so lets fix that first. I refrained from using the symbolic names for GIC_SPI/GIC_PPI and IRQ_TYPE_LEVEL_HIGH, mostly because it increases the delta between the original DTS files and the mainline versions, so it's just additional churn. Link: https://lore.kernel.org/r/20200228135106.220620-4-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-26arm: dts: calxeda: Provide UART clockAndre Przywara1-2/+2
The PL011 UART binding requires two clocks to be named in a node. Add the second clock, which is the bus gate, that just gets enabled. Since this is a fixed clock anyway, it doesn't make any difference. Link: https://lore.kernel.org/r/20200228135106.220620-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-26arm: dts: calxeda: Basic DT file fixesAndre Przywara2-8/+3
The .dts files for the Calxeda machines are quite old, so carry some sloppy mistakes that the DT schema checker will complain about. Fix those issues, they should not have any effect on functionality. Link: https://lore.kernel.org/r/20200228135106.220620-2-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25arm64: dts: specify console via command lineChunyan Zhang1-1/+1
The SPRD serial driver need to know which serial port would be used as console in an early period during initialization, otherwise console init would fail since we added this feature[1]. So this patch add console to command line via devicetree. [1] https://lore.kernel.org/lkml/20190826072929.7696-4-zhang.lyra@gmail.com/ Link: https://lore.kernel.org/r/20200311112120.30890-1-zhang.lyra@gmail.com Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-20ARM: dts: at91: sama5d27_wlsom1_ek: add USB device nodeCristian Birsan1-0/+12
Add USB device node for WLSoM1 EK and enable it. Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> [eugen.hristev@microchip.com: ported to 5.4] Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/20200318104236.21114-1-eugen.hristev@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-20ARM: dts: gemini: Add thermal zone to DIR-685Linus Walleij1-3/+45
The DIR-685 can now exploit the thermal zone added by the drive temperature sensor inside the hard drive. We have patched the libata subsystem to assign the device nodes properly to the SCSI devices and this is what the drivetemp driver will use to populate the sensor and the thermal zone, so pick that up into the thermal zone and let this control the fan. The hardware lacks an embedded temperature sensor so the D-Link vendor firmware uses this method to control the temperature of the NAS enclosure using the thermal sensor inside the hard drive. The drive temperature trigger points to be used comes from the vendor firmware. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-20ARM: dts: gemini: Rename IDE nodesLinus Walleij6-9/+13
By renaming the ATA drive nodes to "ide@" we activate the semantic checks to the DT schema for the controller and use the correct notation for PATA drives. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-20ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodesDalon Westergreen1-6/+6
The ptp_ref clock for Arria10 defaults to using the peripheral pll emac ptp clock. Without the ptp_ref clock in the gmac nodes the driver defaults to the gmac main clock resulting in an incorrect period for the ptp counter. Signed-off-by: Dalon Westergreen <dalon.westergreen@linux.intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-03-19arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodesGrygorii Strashko1-0/+14
Add DT node for MCU System Control module DT node and DT node for the TI J721E SoC phy-gmii-sel PHY required for Ethernet ports mode selection. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-19arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel nodeGrygorii Strashko1-0/+6
Add DT node for the TI AM65x SoC phy-gmii-sel PHY required for Ethernet ports mode selection. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-19arm64: dts: ti: k3-am65-mcu: Add DMA entries for ADCVignesh Raghavendra1-0/+6
Add DMA entries for ADC nodes Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-19arm64: dts: ti: k3-am65-main: Add DMA entries for main_spi0Vignesh Raghavendra1-0/+2
Add DMA entry for main_spi0, that has SPI flash connected, for better throughput and reduced CPU load. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-19arm64: dts: ti: k3-j721e-mcu-wakeup: Add DMA entries for ADCVignesh Raghavendra1-0/+6
Add DMA entries for ADC nodes Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-19arm64: dts: ti: k3-am65: Add clocks to dwc3 nodesDave Gerlach1-0/+2
The TI sci-clk driver can scan the DT for all clocks provided by system firmware and does this by checking the clocks property of all nodes, so we must add this to the dwc3 nodes so USB clocks are available. Without this USB does not work with latest system firmware i.e. [ 1.714662] clk: couldn't get parent clock 0 for /interconnect@100000/dwc3@4020000 Fixes: cc54a99464ccd ("arm64: dts: ti: k3-am6: add USB suppor") Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Cc: stable@kernel.org Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-17arm64: dts: meson-g12b-odroid-n2: add SPIFC controller nodeNeil Armstrong1-0/+21
Add disabled SPIFC controller node with instruction on how to enable it while lowering capabilities of the eMMC controller from 8bits bus width to 4bits bus width, it's data pins 4 to 7 being shared with the SPI NOR controller pins. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313090713.15147-5-narmstrong@baylibre.com
2020-03-17arm64: dts: khadas-vim3: add SPIFC controller nodeNeil Armstrong1-0/+20
Add disabled SPIFC controller node with instruction on how to enable it while lowering capabilities of the eMMC controller from 8bits bus width to 4bits bus width, it's data pins 4 to 7 being shared with the SPI NOR controller pins. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313090713.15147-4-narmstrong@baylibre.com
2020-03-17arm64: dts: meson-g12: add the SPIFC nodesNeil Armstrong2-0/+21
Add the controller and pinctrl nodes to enable the SPI Flash Controller on the Amlogic G12A and compatible SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313090713.15147-3-narmstrong@baylibre.com
2020-03-17arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus widthNeil Armstrong8-17/+37
The Khadas VIM3 shares the eMMC pins 4 to 7 with the SPI NOR, in order to enable the eMMC and the SPI NOR interface, we need to omit the 4 last pins from the eMMC pinctrl. As it was done for the Khadas VIM2, split the eMMC pinctrls in ctrl, data and ds pins with either 4bits data or 8bits data, and update the current board accordingly. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313090713.15147-2-narmstrong@baylibre.com
2020-03-17arm64: dts: rockchip: Add Hugsun X99 power ledVivek Unune1-4/+19
Remove pwm0 node as it interferes with power LED gpio. Tested with LibreElec linux-next-20200305 Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Link: https://lore.kernel.org/r/20200313230513.123049-1-npcomplete13@gmail.com [split out led addition into separate patch] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17arm64: dts: rockchip: Add Hugsun X99 IR receiverVivek Unune1-0/+13
Add the IR receiver and its associated pinctrl entry. Tested with LibreElec linux-next-20200305 Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Link: https://lore.kernel.org/r/20200313230513.123049-1-npcomplete13@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17arm64: dts: rockchip: remove clock-names property from 'generic-ohci' nodesJohan Jonker3-6/+0
A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff5d0000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-names' is not a valid property name for usb_host nodes with compatible string 'generic-ohci', so remove them. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ohci.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312171441.21144-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17arm64: dts: rockchip: remove clock-names property from 'generic-ehci' nodesJohan Jonker4-7/+0
A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff5c0000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-names' is not a valid property name for usb_host nodes with compatible string 'generic-ehci', so remove them. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312171441.21144-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17arm64: dts: rockchip: remove properties from spdif node RK3399 ExcavatorJohan Jonker1-2/+0
An expermental test with the command below gives this error: arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dt.yaml: spdif@ff870000: 'i2c-scl-falling-time-ns', 'i2c-scl-rising-time-ns', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+' 'i2c-scl-falling-time-ns', 'i2c-scl-rising-time-ns' are not valid properties for 'spdif' nodes, so remove them. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312172240.21362-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: remove #address-cells and #size-cells from i2s nodesJohan Jonker5-18/+0
An experimental test with the command below gives for example this error: arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9]+' '#address-cells' and '#size-cells' are not a valid property for i2s nodes, so remove them. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: swap clocks and clock-names values for i2s nodesJohan Jonker3-10/+10
Current dts files with 'i2s' nodes are manually verified. In order to automate this process rockchip-i2s.txt has to be converted to yaml. In the new setup dtbs_check with rockchip-i2s.yaml expect clocks and clock-names values in the same order. Fix this for some older Rockchip models. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200311162524.19748-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: remove clock-names property from 'generic-ohci' nodesJohan Jonker2-4/+0
A test with the command below gives for example this error: arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30160000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-names' is not a valid property name for usb_host nodes with compatible string 'generic-ohci', so remove them. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ohci.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312171441.21144-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: remove clock-names property from 'generic-ehci' nodesJohan Jonker3-6/+0
A test with the command below gives for example this error: arch/arm/boot/dts/rv1108-evb.dt.yaml: usb@30140000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-names' is not a valid property name for usb_host nodes with compatible string 'generic-ehci', so remove them. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312171441.21144-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: swap clocks and clock-names values for spdif nodesJohan Jonker2-4/+4
Current dts files with 'spdif' nodes are manually verified. In order to automate this process rockchip-spdif.txt has to be converted to yaml. In the new setup dtbs_check with rockchip-spdif.yaml expect clocks and clock-names values in the same order. Fix this for some older Rockchip models. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312172240.21362-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: Keep rk3288-tinker SD card IO powered during rebootJoshua Watt1-0/+1
IO voltage regulator for the SD card must be kept on all the time, otherwise when the board reboots the SD card can't be read by the bootloader. Signed-off-by: Joshua Watt <JPEWhacker@gmail.com> Link: https://lore.kernel.org/r/20200219204224.34154-1-JPEWhacker@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: remove clock-frequency from saradc node rv1108Johan Jonker1-1/+0
An experimental test with the command below gives these errors: arch/arm/boot/dts/rv1108-elgin-r1.dt.yaml: adc@1038c000: 'clock-frequency' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm/boot/dts/rv1108-evb.dt.yaml: adc@1038c000: 'clock-frequency' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-frequency' is not a valid property for a saradc node, so remove it. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/ rockchip-saradc.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200313132646.10317-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: fix vref-supply for &saradc node rk3288 firefly reloadJohan Jonker1-0/+1
A test with the command below gives this error: arch/arm/boot/dts/rk3288-firefly-reload.dt.yaml: saradc@ff100000: 'vref-supply' is a required property PMIC Channel OUT11 with powername 'vcc_18' (connected through R155 bridge with 'vccio_wl') is used for the recovery key and ADC_AVDD_1V8. Fix error by adding 'vcc_18' as vref for the saradc. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/iio/adc/ rockchip-saradc.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200314140755.4877-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: use DMA channels for UARTs for RK3288Katsuhiro Suzuki1-0/+8
This patch enables to use DMAC for all UARTs that are connected to dmac_peri core for Rochchip RK3288. Only uart2 is connected different DMAC (dmac_bus_s) so keep current settings on this patch. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Link: https://lore.kernel.org/r/20200315095115.10106-1-katsuhiro@katsuster.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: rk3xxx: fix L2 cache-controller nodenameJohan Jonker1-1/+1
A test with the command below gives for example this error: arch/arm/boot/dts/rk3066a-bqcurie2.dt.yaml: l2-cache-controller@10138000: $nodename:0: 'l2-cache-controller@10138000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Fix error by changing nodename to 'cache-controller'. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/l2c2x0.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200316165453.3022-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: fix lvds-encoder ports subnode for rk3188-bqedison2qcJohan Jonker1-11/+16
A test with the command below gives this error: arch/arm/boot/dts/rk3188-bqedison2qc.dt.yaml: lvds-encoder: 'ports' is a required property Fix error by adding a ports wrapper for port@0 and port@1 inside the 'lvds-encoder' node for rk3188-bqedison2qc. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/ bridge/lvds-codec.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200316174647.5598-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-16arm64: dts: meson-g12-common: add spicc controller nodesNeil Armstrong1-0/+75
This adds the controller and pinctrl nodes for the Amlogic G12A SPICC controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313091401.15888-1-narmstrong@baylibre.com
2020-03-16arm64: dts: meson: add thermal zones to meson gx devicesChristian Hewitt3-72/+95
Adapt and update current VIM2 thermal zones support so that zones are available on all meson GXBB/GXL/GXM devices - similar to changes made for G12A/G12B/SM1 devices. Suggested-by: Nick Xie <nick@khadas.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/1584328854-28575-1-git-send-email-christianshewitt@gmail.com
2020-03-16arm64: dts: meson: khadas-vim3: move model to g12b-khadas-vim3 dtsiChristian Hewitt2-2/+2
The common meson-khadas-vim3.dtsi is now shared with VIM3L so move the VIM3 model name to meson-g12b-khadas-vim3.dtsi. meson-sm1-khadas-vim3l.dts contains the VIM3L model name. changes in v2 - fix typo in commit message Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/1583378508-14312-1-git-send-email-christianshewitt@gmail.com
2020-03-17arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channelKunihiko Hayashi3-10/+10
Currently common clock and reset IDs were used, however, each clock and reset ID should be used for each channel. Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-17ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channelKunihiko Hayashi2-4/+4
Currently common clock and reset IDs were used, however, each clock and reset ID should be used for each channel. Pro5 and PXs2 are affected by this fix, but the SCSSI clock gate of Pro5 is common to all channels. Fixes: 92fa4f4cc2cd ("ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone for PXs3Kunihiko Hayashi1-0/+43
Add nodes of thermal monitor and thermal zone for UniPhier PXs3 SoC. The thermal monitor node is included in sysctrl. This patch gives the default value for PXs3 in the same way as LD20. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16arm64: dts: uniphier: Enable spi node for PXs3 reference boardKunihiko Hayashi1-0/+10
PXs3 reference board has 2 spi connectors. This enables spi0 and spi1, and adds aliases properties for each spi to determine device name assignments. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16ARM: dts: uniphier: Add USB3 controller nodes for Pro5Kunihiko Hayashi1-0/+148
Add USB3 controller nodes for Pro5 SoC and the boards. Pro5 SoC has 2 controllers. USB0 includes 1 SS-PHY and 1 HS-PHY, and USB1 includes 1 SS-PHY and 2 HS-PHY. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16arm64: dts: ls1028a: disable the felix switch by defaultMichael Walle4-1/+14
Disable the felix switch by default and enable it per board which are actually using it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: imx8mp: Add snvs clock to powerkeyAnson Huang1-0/+2
SNVS powerkey driver needs snvs clock for proper clock management, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: imx8mn: Add snvs clock to powerkeyAnson Huang1-0/+2
SNVS powerkey driver needs snvs clock for proper clock management, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: Add PCIe controller DT nodesXiaowei Bao1-0/+54
LS1028a implements 2 PCIe 3.0 controllers. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: sl28: add support for variant 2Michael Walle2-0/+69
Now that there is support for the Felix switch this variant can also be added. It features two external ports ethernet ports which are connected to the internal switch core. No direct connection to any of the enetc's is supported. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: sl28: expose switch ports in KBox A-230-LSMichael Walle1-0/+60
The KBox A-230-LS supports four external ports which are connected to the internal switch of the LS1028A via QSGMII. Now that the Felix switch is supported, add these ports in the device tree. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: sl28: fix on-board EEPROMSMichael Walle3-9/+17
The module itself has another EEPROM at 50h on I2C4. The EEPROM on the carriers is located at 57h on I2C3. Fix that in the device trees. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: freescale: sl28: add SPI flashMichael Walle2-0/+15
There is a SPI flash on this carrier connected to the third DSPI controller. Add it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>