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2024-04-29arm64: dts: ti: Enable overlays for the am625-phyboard-lyraNathan Morrisson1-0/+1
Add symbols when building the am625-phyboard-lyra-rdk DTB so overlays can be applied. Fixes: d8280f30a9cd ("arm64: dts: ti: am62-phyboard-lyra: Add overlay to enable a GPIO fan") Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240419193552.3090343-1-nmorrisson@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: am64-phyboard-electra: Add overlay to enable a GPIO fanNathan Morrisson2-0/+54
The phyBOARD-Electra has a GPIO fan header. This overlay enables the fan header and sets the fan to turn on at 65C. Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240419193114.3090084-1-nmorrisson@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62a-main: Add Wave5 Video Encoder/Decoder NodeBrandon Brnich1-0/+7
This patch adds support for the Wave521cl on the AM62A-SK. Signed-off-by: Brandon Brnich <b-brnich@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Link: https://lore.kernel.org/r/20240415204659.798548-1-b-brnich@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am69-sk: Fix UART pin type and macro typeUdit Kumar1-6/+6
Along fixing wkup UART RTS and TX pins as OUTPUT instead of INPUT updating J784S4 macro for pin mux instead of J721S2. Fixes: 45299dd1991b ("arm64: dts: ti: k3-am69-sk: Add mcu and wakeup uarts") Fixes: 08ae12b63750 ("arm64: dts: ti: k3-am69-sk: Enable wakeup_i2c0 and eeprom") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240415095605.3547933-3-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-j784s4-evm: Fix UART pin type and macro typeUdit Kumar1-4/+4
Along fixing wkup UART TX pin as OUTPUT instead of INPUT, updating J784S4 macro for pin mux instead of J721S2. Fixes: 5dfbd1debc8c ("arm64: dts: ti: k3-j784s4-evm: Enable wakeup_i2c0 and eeprom") Fixes: 6fa5d37a2f34 ("arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240415095605.3547933-2-u-kumar1@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62a: Disable USB LPMRoger Quadros1-0/+4
As per AM62A TRM [1] USB Link Power Management (LPM) feature is not supported. Disable it else it may cause enumeration failure on some devices. > 4.9.2.1 USB2SS Unsupported Features > The following features are not supported on this family of devices: > ... > - USB 2.0 ECN: Link Power Management (LPM) > ... [1] - https://www.ti.com/lit/pdf/spruj16 Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-3-93b827adf97e@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62p: add the USB sub-systemRoger Quadros3-0/+129
There are two USB instances available on the am62p5 starter kit. Include and enable them for use on the board. USB LPM feature is kept disabled as it is not supported. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-2-93b827adf97e@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62/a: use sub-node for USB_PHY_CTRL registersRoger Quadros4-4/+24
Exposing the entire CTRL_MMR space to syscon is not a good idea. Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them in the USB0/USB1 nodes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-1-93b827adf97e@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am62*: Add PHY2 region to USB wrapper nodeRoger Quadros2-4/+8
Add PHY2 register space to USB wrapper node. This is required to deal with Errata i2409. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240412-for-v6-9-am62-usb-errata-dt-v1-1-ef0d79920f75@kernel.org Closes: https://lore.kernel.org/all/20240408095200.GA14655@francesco-nb/ Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: iot2050: Add icssg-prueth nodes for PG1 devicesJan Kiszka1-4/+28
Add the required nodes to enable ICSSG SR1.0 based prueth networking. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com> Link: https://lore.kernel.org/r/20240409164314.157602-1-diogo.ivo@siemens.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Add Audio CodecGarrett Giordano1-0/+99
The Audio Codec runs over the MCASP (Multichannel Audio Serial Port). Add pinmux for the Audio Reference Clock and MCASP2. Add DT nodes for Audio Codec, MCASP2, VCC 1v8 and VCC 3v3 regulators. Additionally, create a sound node that connects our sound card and the MCASP2. Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240404184250.3772829-1-ggiordano@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-25arm64: dts: ti: k3-j784s4: Use exact ranges for FSS nodeAndrew Davis1-2/+5
The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326205920.40147-4-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-25arm64: dts: ti: k3-j721e: Use exact ranges for FSS nodeAndrew Davis1-2/+6
The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326205920.40147-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-25arm64: dts: ti: k3-j7200: Use exact ranges for FSS nodeAndrew Davis1-2/+4
The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326205920.40147-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-25arm64: dts: ti: k3-am65: Use exact ranges for FSS nodeAndrew Davis1-1/+5
The FSS bus contains several register ranges. Using an empty ranges property works but causes a DT warning when we give this node an address. Fix this by explicitly defining the memory ranges in use. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326205920.40147-1-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-25arm64: dts: ti: k3-am65: Move SerDes mux nodes under the control nodeAndrew Davis1-8/+13
These SerDes lane select muxes use bits from the same register as the SerDes clock select mux. Make the lane select mux a child of the SerDes control node. This removes one more requirement on scm-conf being a syscon node which will later be converted to fix a couple DTS check warnings. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185627.29852-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-25arm64: dts: ti: k3-am65: Add full compatible to SerDes control nodesAndrew Davis1-4/+4
This matches the binding for this register region which fixes a couple DTS check warnings. While here trim the leading 0s from the "reg" definition. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185627.29852-1-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-j722s-evm: Enable eMMC supportMichael Walle1-0/+7
The J722S EVM has an on-board eMMC. Enable the SDHC interface for it. There is no pinmuxing required because the interface has dedicated pins. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20240403102302.3934932-1-mwalle@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-{am62p,j722s}: Disable ethernet by defaultMichael Walle3-4/+7
Device tree best practice is to disable any external interface in the dtsi and just enable them if needed in the device tree. Thus, disable the ethernet switch and its ports by default and just enable the ones used by the EVMs in their device trees. There is no functional change. Signed-off-by: Michael Walle <mwalle@kernel.org> Acked-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240403101545.3932437-1-mwalle@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am642-phyboard-electra-rdk: Increase CAN max bitrateNathan Morrisson1-2/+2
The phyBOARD-Electra has two TCAN1044VDD CAN transceivers which support CAN FD at 8 Mbps. Increase the maximum bitrate to 8 Mbps. Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240402160825.1516036-3-nmorrisson@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Increase CAN max bitrateNathan Morrisson1-1/+1
The phyBOARD-Lyra has one TCAN1044VDD CAN transceiver which supports CAN FD at 8 Mbps. Increase the maximum bitrate to 8 Mbps. Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240402160825.1516036-2-nmorrisson@phytec.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am625-verdin: add PCIe reset gpio hogFrancesco Dolcini5-4/+37
Add a GPIO hog to release PCIe reset on the carrier board, this is required to use M.2 or mPCIe cards. Verdin AM62 does not have any PCIe interface, however the Verdin family has PCIe and normally an M.2 or mPCIe slot is available in the carrier board that can be used with cards that use only the USB interface toward the host CPU, for example cellular network modem. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240327182801.5997-3-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: verdin-am62: mallow: fix GPIOs pinctrlFrancesco Dolcini1-4/+12
Generic GPIOs pinctrl nodes are not correct, gpio[1-4] are into the MCU domain and should be into &mcu_gpio0, gpio[5-8] were missing and are added in this commit. Fixes: 7698622fbcf4 ("arm64: dts: ti: Add verdin am62 mallow board") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240327182801.5997-2-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-j784s4: Remove UART baud rate selectionAndrew Davis2-12/+0
As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185441.29656-6-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-j721s2: Remove UART baud rate selectionAndrew Davis2-12/+0
As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185441.29656-5-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-j721e: Remove UART baud rate selectionAndrew Davis2-12/+0
As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185441.29656-4-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-j7200: Remove UART baud rate selectionAndrew Davis2-12/+0
As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185441.29656-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am64: Remove UART baud rate selectionAndrew Davis3-4/+0
As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185441.29656-2-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am65: Remove UART baud rate selectionAndrew Davis3-3/+0
As described in the binding document for the "current-speed" property: "This should only be present in case a driver has no chance to know the baud rate of the slave device." This is not the case for the UART used in K3 devices, the current baud-rate can be calculated from the registers. Having this property has the effect of actually skipping the baud-rate setup in some drivers as it assumes it will already be set to this rate, which may not always be the case. It seems this property's purpose was mistaken as selecting the desired baud-rate, which it does not. It would have been wrong to select that here anyway as DT is not the place for configuration, especially when there are already more standard ways to set serial baud-rates. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326185441.29656-1-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am62-lp-sk: Remove tps65219 power-buttonMarkus Schneider-Pargmann1-1/+0
On am62-lp-sk the PMIC is not wired up to a power button. Remove this property. This fixes issues observed when entering a very deep sleep state that is not yet available upstream. Fixes: e6a51ffabfc1 ("arm64: ti: dts: Add support for AM62x LP SK") Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Link: https://lore.kernel.org/r/20240325152029.2933445-1-msp@baylibre.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am625-beagleplay: Use mmc-pwrseq for wl18xx enableSukrut Bellary1-15/+12
BeaglePlay SBC[1] has Texas Instrument's WL18xx WiFi chipset[2]. Currently, WLAN_EN is configured as regulator and regulator-always-on. However, the timing and wlan_en sequencing is not correctly modelled. This causes the sdio access to fail during runtime-pm power operations saving or during system suspend/resume/hibernation/freeze operations. This is because the WLAN_EN line is not deasserted to low '0' to power down the WiFi. So during restore, the WiFi driver tries to load the FW without following correct power sequence. WLAN_EN => '1'/assert (high) to power-up the chipset. Use mmc-pwrseq-simple to drive TI's WiFi (WL18xx) chipset enable 'WLAN_EN'. mmc-pwrseq-simple provides power sequence flexibility with support for post power-on and power-off delays. Typical log signature that indicates this bug is: wl1271_sdio mmc2:0001:2: sdio write failed (-110) Followed by possibly a kernel warning (depending on firmware present): WARNING: CPU: 1 PID: 45 at drivers/net/wireless/ti/wlcore/sdio.c:123 wl12xx_sdio_raw_write+0xe4/0x168 [wlcore_sdio] [1] https://www.beagleboard.org/boards/beagleplay [2] https://www.ti.com/lit/ds/symlink/wl1807mod.pdf Fixes: f5a731f0787f ("arm64: dts: ti: Add k3-am625-beagleplay") Suggested-by: Shengyu Qu <wiagn233@outlook.com> Signed-off-by: Sukrut Bellary <sukrut.bellary@linux.com> Tested-by: Robert Nelson <robertcnelson@gmail.com> Link: https://lore.kernel.org/r/20240325143511.2144768-1-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: verdin-am62: use SD1 CD as GPIOFrancesco Dolcini1-2/+10
TI SDHCI instance has a hardware debounce timer of 1 second as described in commit 7ca0f166f5b2 ("mmc: sdhci_am654: Add workaround for card detect debounce timer"), because of this the boot time increases of up to 1 second. Workaround the issue the same way that is done on arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts, using the SD1 CD as GPIO. Suggested-by: Nishanth Menon <nm@ti.com> Reported-by: João Paulo Silva Gonçalves <joao.goncalves@toradex.com> Closes: https://lore.kernel.org/all/0e81af80de3d55e72f79af83fa5db87f5c9938f8.camel@toradex.com/ Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240325083340.89568-1-francesco@dolcini.it Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: verdin-am62: Set memory size to 2gbMax Krummenacher1-1/+1
The maximum DDR RAM size stuffed on the Verdin AM62 is 2GB, correct the memory node accordingly. Fixes: 316b80246b16 ("arm64: dts: ti: add verdin am62") Cc: <stable@vger.kernel.org> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240320142937.2028707-1-max.oss.09@gmail.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: verdin-am62: dahlia: fix audio clockAndrejs Cainikovs1-1/+1
In current configuration, wm8904 codec on Dahlia carrier board provides distorted audio output. This happens due to reference clock is fixed to 25MHz and no FLL is enabled. During playback following parameters are set: 44100Hz: [ 310.276924] wm8904 1-001a: Target BCLK is 1411200Hz [ 310.276990] wm8904 1-001a: Using 25000000Hz MCLK [ 310.277001] wm8904 1-001a: CLK_SYS is 12500000Hz [ 310.277018] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 310.277026] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz [ 310.277034] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK [ 310.277044] wm8904 1-001a: LRCLK_RATE is 35 Deviation = 1411200 vs 1562500 = 10.721% Also, LRCLK_RATE is 35, should be 32. 48000Hz: [ 302.449970] wm8904 1-001a: Target BCLK is 1536000Hz [ 302.450037] wm8904 1-001a: Using 25000000Hz MCLK [ 302.450049] wm8904 1-001a: CLK_SYS is 12500000Hz [ 302.450065] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 302.450074] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz [ 302.450083] wm8904 1-001a: Selected BCLK_DIV of 80 for 1562500Hz BCLK [ 302.450092] wm8904 1-001a: LRCLK_RATE is 32 Deviation = 1536000 vs 1562500 = 1.725% Enabling wm8904 FLL via providing mclk-fs property to simple-audio-card configures clocks properly, but also adjusts audio reference clock (mclk), which in case of TI AM62 should be avoided, as it only supports 25MHz output [1][2]. This change enables FLL on wm8904 by providing mclk-fs, and drops audio reference clock out of DAI configuration, which prevents simple-audio-card to adjust it before every playback [3]. 41000Hz: [ 111.820533] wm8904 1-001a: FLL configured for 25000000Hz->11289600Hz [ 111.820597] wm8904 1-001a: Clock source is 0 at 11289600Hz [ 111.820651] wm8904 1-001a: Using 11289600Hz FLL clock [ 111.820703] wm8904 1-001a: CLK_SYS is 11289600Hz [ 111.820798] wm8904 1-001a: Target BCLK is 1411200Hz [ 111.820847] wm8904 1-001a: Using 11289600Hz FLL clock [ 111.820894] wm8904 1-001a: CLK_SYS is 11289600Hz [ 111.820933] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 111.820971] wm8904 1-001a: Selected SAMPLE_RATE of 44100Hz [ 111.821009] wm8904 1-001a: Selected BCLK_DIV of 80 for 1411200Hz BCLK [ 111.821051] wm8904 1-001a: LRCLK_RATE is 32 48000Hz: [ 144.119254] wm8904 1-001a: FLL configured for 25000000Hz->12288000Hz [ 144.119309] wm8904 1-001a: Clock source is 0 at 12288000Hz [ 144.119364] wm8904 1-001a: Using 12288000Hz FLL clock [ 144.119413] wm8904 1-001a: CLK_SYS is 12288000Hz [ 144.119512] wm8904 1-001a: Target BCLK is 1536000Hz [ 144.119561] wm8904 1-001a: Using 12288000Hz FLL clock [ 144.119608] wm8904 1-001a: CLK_SYS is 12288000Hz [ 144.119646] wm8904 1-001a: Selected CLK_SYS_RATIO of 256 [ 144.119685] wm8904 1-001a: Selected SAMPLE_RATE of 48000Hz [ 144.119723] wm8904 1-001a: Selected BCLK_DIV of 80 for 1536000Hz BCLK [ 144.119764] wm8904 1-001a: LRCLK_RATE is 32 [1]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1175479/processor-sdk-am62x-output-audio_ext_refclk0-as-mclk-for-codec-and-mcbsp/4444986#4444986 [2]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322 [3]: sound/soc/generic/simple-card-utils.c#L441 Fixes: f5bf894c865b ("arm64: dts: ti: verdin-am62: dahlia: add sound card") Suggested-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240315102500.18492-1-andrejs.cainikovs@gmail.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09arm64: dts: ti: k3-am62p5-sk: minor whitespace cleanupKrzysztof Kozlowski1-1/+1
The DTS code coding style expects exactly one space before '{' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240208105146.128645-1-krzysztof.kozlowski@linaro.org Signed-off-by: Nishanth Menon <nm@ti.com>
2024-03-24Linux 6.9-rc1Linus Torvalds1-2/+2
2024-03-24efi: fix panic in kdump kernelOleksandr Tymoshenko1-0/+2
Check if get_next_variable() is actually valid pointer before calling it. In kdump kernel this method is set to NULL that causes panic during the kexec-ed kernel boot. Tested with QEMU and OVMF firmware. Fixes: bad267f9e18f ("efi: verify that variable services are supported") Signed-off-by: Oleksandr Tymoshenko <ovt@google.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-03-24x86/efistub: Don't clear BSS twice in mixed modeArd Biesheuvel1-1/+2
Clearing BSS should only be done once, at the very beginning. efi_pe_entry() is the entrypoint from the firmware, which may not clear BSS and so it is done explicitly. However, efi_pe_entry() is also used as an entrypoint by the mixed mode startup code, in which case BSS will already have been cleared, and doing it again at this point will corrupt global variables holding the firmware's GDT/IDT and segment selectors. So make the memset() conditional on whether the EFI stub is running in native mode. Fixes: b3810c5a2cc4a666 ("x86/efistub: Clear decompressor BSS in native EFI entrypoint") Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-03-24x86/efistub: Call mixed mode boot services on the firmware's stackArd Biesheuvel1-0/+9
Normally, the EFI stub calls into the EFI boot services using the stack that was live when the stub was entered. According to the UEFI spec, this stack needs to be at least 128k in size - this might seem large but all asynchronous processing and event handling in EFI runs from the same stack and so quite a lot of space may be used in practice. In mixed mode, the situation is a bit different: the bootloader calls the 32-bit EFI stub entry point, which calls the decompressor's 32-bit entry point, where the boot stack is set up, using a fixed allocation of 16k. This stack is still in use when the EFI stub is started in 64-bit mode, and so all calls back into the EFI firmware will be using the decompressor's limited boot stack. Due to the placement of the boot stack right after the boot heap, any stack overruns have gone unnoticed. However, commit 5c4feadb0011983b ("x86/decompressor: Move global symbol references to C code") moved the definition of the boot heap into C code, and now the boot stack is placed right at the base of BSS, where any overruns will corrupt the end of the .data section. While it would be possible to work around this by increasing the size of the boot stack, doing so would affect all x86 systems, and mixed mode systems are a tiny (and shrinking) fraction of the x86 installed base. So instead, record the firmware stack pointer value when entering from the 32-bit firmware, and switch to this stack every time a EFI boot service call is made. Cc: <stable@kernel.org> # v6.1+ Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-03-24x86/boot/64: Move 5-level paging global variable assignments backTom Lendacky1-9/+7
Commit 63bed9660420 ("x86/startup_64: Defer assignment of 5-level paging global variables") moved assignment of 5-level global variables to later in the boot in order to avoid having to use RIP relative addressing in order to set them. However, when running with 5-level paging and SME active (mem_encrypt=on), the variables are needed as part of the page table setup needed to encrypt the kernel (using pgd_none(), p4d_offset(), etc.). Since the variables haven't been set, the page table manipulation is done as if 4-level paging is active, causing the system to crash on boot. While only a subset of the assignments that were moved need to be set early, move all of the assignments back into check_la57_support() so that these assignments aren't spread between two locations. Instead of just reverting the fix, this uses the new RIP_REL_REF() macro when assigning the variables. Fixes: 63bed9660420 ("x86/startup_64: Defer assignment of 5-level paging global variables") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/2ca419f4d0de719926fd82353f6751f717590a86.1711122067.git.thomas.lendacky@amd.com
2024-03-24x86/boot/64: Apply encryption mask to 5-level pagetable updateTom Lendacky1-1/+1
When running with 5-level page tables, the kernel mapping PGD entry is updated to point to the P4D table. The assignment uses _PAGE_TABLE_NOENC, which, when SME is active (mem_encrypt=on), results in a page table entry without the encryption mask set, causing the system to crash on boot. Change the assignment to use _PAGE_TABLE instead of _PAGE_TABLE_NOENC so that the encryption mask is set for the PGD entry. Fixes: 533568e06b15 ("x86/boot/64: Use RIP_REL_REF() to access early_top_pgt[]") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/8f20345cda7dbba2cf748b286e1bc00816fe649a.1711122067.git.thomas.lendacky@amd.com
2024-03-24x86/cpu: Add model number for another Intel Arrow Lake mobile processorTony Luck1-0/+1
This one is the regular laptop CPU. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322161725.195614-1-tony.luck@intel.com
2024-03-24x86/fpu: Keep xfd_state in sync with MSR_IA32_XFDAdamos Ttofari2-6/+13
Commit 672365477ae8 ("x86/fpu: Update XFD state where required") and commit 8bf26758ca96 ("x86/fpu: Add XFD state to fpstate") introduced a per CPU variable xfd_state to keep the MSR_IA32_XFD value cached, in order to avoid unnecessary writes to the MSR. On CPU hotplug MSR_IA32_XFD is reset to the init_fpstate.xfd, which wipes out any stale state. But the per CPU cached xfd value is not reset, which brings them out of sync. As a consequence a subsequent xfd_update_state() might fail to update the MSR which in turn can result in XRSTOR raising a #NM in kernel space, which crashes the kernel. To fix this, introduce xfd_set_state() to write xfd_state together with MSR_IA32_XFD, and use it in all places that set MSR_IA32_XFD. Fixes: 672365477ae8 ("x86/fpu: Update XFD state where required") Signed-off-by: Adamos Ttofari <attofari@amazon.de> Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240322230439.456571-1-chang.seok.bae@intel.com Closes: https://lore.kernel.org/lkml/20230511152818.13839-1-attofari@amazon.de
2024-03-24Documentation/x86: Document that resctrl bandwidth control units are MiBTony Luck1-4/+4
The memory bandwidth software controller uses 2^20 units rather than 10^6. See mbm_bw_count() which computes bandwidth using the "SZ_1M" Linux define for 0x00100000. Update the documentation to use MiB when describing this feature. It's too late to fix the mount option "mba_MBps" as that is now an established user interface. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240322182016.196544-1-tony.luck@intel.com
2024-03-23x86/mpparse: Register APIC address only onceThomas Gleixner1-5/+5
The APIC address is registered twice. First during the early detection and afterwards when actually scanning the table for APIC IDs. The APIC and topology core warn about the second attempt. Restrict it to the early detection call. Fixes: 81287ad65da5 ("x86/apic: Sanitize APIC address setup") Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.297774848@linutronix.de
2024-03-23x86/topology: Handle the !APIC case gracefullyThomas Gleixner1-0/+11
If there is no local APIC enumerated and registered then the topology bitmaps are empty. Therefore, topology_init_possible_cpus() will die with a division by zero exception. Prevent this by registering a fake APIC id to populate the topology bitmap. This also allows to use all topology query interfaces unconditionally. It does not affect the actual APIC code because either the local APIC address was not registered or no local APIC could be detected. Fixes: f1f758a80516 ("x86/topology: Add a mechanism to track topology via APIC IDs") Reported-by: Guenter Roeck <linux@roeck-us.net> Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.242709302@linutronix.de
2024-03-23x86/topology: Don't evaluate logical IDs during early bootThomas Gleixner1-5/+7
The local APICs have not yet been enumerated so the logical ID evaluation from the topology bitmaps does not work and would return an error code. Skip the evaluation during the early boot CPUID evaluation and only apply it on the final run. Fixes: 380414be78bf ("x86/cpu/topology: Use topology logical mapping mechanism") Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.186943142@linutronix.de
2024-03-23x86/cpu: Ensure that CPU info updates are propagated on UPThomas Gleixner3-37/+14
The boot sequence evaluates CPUID information twice: 1) During early boot 2) When finalizing the early setup right before mitigations are selected and alternatives are patched. In both cases the evaluation is stored in boot_cpu_data, but on UP the copying of boot_cpu_data to the per CPU info of the boot CPU happens between #1 and #2. So any update which happens in #2 is never propagated to the per CPU info instance. Consolidate the whole logic and copy boot_cpu_data right before applying alternatives as that's the point where boot_cpu_data is in it's final state and not supposed to change anymore. This also removes the voodoo mb() from smp_prepare_cpus_common() which had absolutely no purpose. Fixes: 71eb4893cfaf ("x86/percpu: Cure per CPU madness on UP") Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20240322185305.127642785@linutronix.de
2024-03-22lkdtm/bugs: Improve warning message for compilers without counted_by supportNathan Chancellor1-1/+1
The current message for telling the user that their compiler does not support the counted_by attribute in the FAM_BOUNDS test does not make much sense either grammatically or semantically. Fix it to make it correct in both aspects. Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20240321-lkdtm-improve-lack-of-counted_by-msg-v1-1-0fbf7481a29c@kernel.org Signed-off-by: Kees Cook <keescook@chromium.org>
2024-03-22overflow: Change DEFINE_FLEX to take __counted_by memberKees Cook8-22/+58
The norm should be flexible array structures with __counted_by annotations, so DEFINE_FLEX() is updated to expect that. Rename the non-annotated version to DEFINE_RAW_FLEX(), and update the few existing users. Additionally add selftests for the macros. Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20240306235128.it.933-kees@kernel.org Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by: Kees Cook <keescook@chromium.org>