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2020-09-15arm64: dts: qcom: apq8016-sbc: Remove properties that are already defaultStephan Gerhold1-18/+0
apq8016-sbc.dtsi overrides several properties that are already the default in msm8916.dtsi. Remove these to simplify the device tree a bit. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200720085406.6716-2-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-15arch64: dts: qcom: sm8250: add uart nodesDmitry Baryshkov1-0/+74
Currently sm8250.dtsi only defines default debug uart. Port rest uart nodes from the downstream dtsi file. Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200909103238.149761-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-15arm64: dts: qcom: sc7180-trogdor: Add wakeup support for BT UARTsatya priya1-0/+54
Add the necessary pinctrl, interrupt property and a suitable sleep config to support Bluetooth wakeup feature. GPIO mode is configured in sleep state to drive the RTS/RFR line low. If QUP function is selected in sleep state, UART RTS/RFR is pulled high during suspend and BT SoC not able to send wakeup bytes. Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: satya priya <skakit@codeaurora.org> Link: https://lore.kernel.org/r/1600091917-7464-4-git-send-email-skakit@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-15arm64: dts: qcom: sc7180: Add wakeup support for BT UART on sc7180-idpsatya priya1-0/+55
Add the necessary pinctrl, interrupt property and a suitable sleep config to support Bluetooth wakeup feature. GPIO mode is configured in sleep state to drive the RTS/RFR line low. If QUP function is selected in sleep state, UART RTS/RFR is pulled high during suspend and BT SoC not able to send wakeup bytes. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: satya priya <skakit@codeaurora.org> Link: https://lore.kernel.org/r/1600091917-7464-3-git-send-email-skakit@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-15arm64: dts: qcom: sc7180: Improve the uart3 pin config for sc7180-idpsatya priya1-6/+4
Remove output-high from CTS and TX as this is not really required. During bringup to fix transfer failures this was added to match with console uart settings. Probably some boot loader config was missing then. As it is working fine now, remove it. Signed-off-by: satya priya <skakit@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1600091917-7464-2-git-send-email-skakit@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-14arm64: dts: qcom: trogdor: Add labels for type-c portsStephen Boyd1-2/+2
Some trogdor board variants only have one USB port, so add a couple labels to these ports so we can modify them later. Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200914232218.658664-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-14arm64: dts: qcom: pm660: Fix missing pound sign in interrupt-cellsŁukasz Patron1-1/+1
Also add a space after '=' while at it. Tested-by: Konrad Dybcio <konradybcio@gmail.com> Signed-off-by: Łukasz Patron <priv.luk@gmail.com> Link: https://lore.kernel.org/r/20200725082417.8507-1-priv.luk@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-14arm64: dts: qcom: sc7180: Drop flags on mdss irqsStephen Boyd1-2/+2
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two where the second cell is the irq flags. Drop the second cell to match the binding. Cc: Kalyan Thota <kalyan_t@codeaurora.org> Cc: Harigovindan P <harigovi@codeaurora.org Fixes: a3db7ad1af49 ("arm64: dts: sc7180: add display dt nodes") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200811192503.1811462-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13dt-bindings: qcom: Add ipq8074 bindingsGokul Sriram Palanisamy1-0/+4
Document the new device-tree bindings for boards HK10-C1 and HK10-C2 based on ipq8074 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> Link: https://lore.kernel.org/r/1596706332-12957-2-git-send-email-gokulsri@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: ipq8074: Use the A53 PMU compatibleKathiravan T1-1/+1
IPQ8074 has A53 cores, so lets use the corresponding PMU compatible. Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1597642116-15902-1-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: ipq6018: enable DVFS supportKathiravan T1-3/+93
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table, SMPA2 regulator to enable the cpu frequency on IPQ6018. Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1597648720-13649-3-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13dt-bindings: mailbox: add compatible for the IPQ6018 SoCKathiravan T1-0/+1
Add the mailbox compatible for the IPQ6018 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1597648720-13649-2-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: qcom: replace status value "ok" by "okay"Adrian Schmutzler6-30/+30
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200830200845.1771-1-freifunk@adrianschmutzler.de Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: ipq8074: enable watchdog supportKathiravan T1-0/+8
Enable watchdog support for the IPQ8074 SoCs. Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1598862428-13996-1-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: qcom: sm8250: use the right clock-freqency for sleep-clkJonathan Marek1-1/+1
Downstream has this clock as 32000 rate, but testing shows it is close to 32768. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200903215923.14314-1-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: qcom: Add sc7180-lazor sku2Douglas Anderson2-0/+18
Add a new SKU variant. This is a pick from the downstream tree that is the current source of truth for this platform. Link: https://crrev.com/c/2386997 Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200908133037.1.Ia98a6b938453254e360c4a9fa253d2d6807dff3f@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: qcom: sc7180: Remove clock for bluetooth on SC7180 IDP boardVenkata Lakshmi Narayana Gubba1-1/+0
Removed voting for RPMH_RF_CLK2 which is not required as it is getting managed by BT SoC through SW_CTRL line. Signed-off-by: Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org> Link: https://lore.kernel.org/r/1599734980-22580-1-git-send-email-gubbaven@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: qcom: sm8250-mtp: add i2c device tree nodesDmitry Baryshkov1-0/+28
Add device tree nodes describing used i2c busses according to the dts found in msm-4.19 tree. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200913224738.30046-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: qcom: sm8250: add bi_tcxo_ao to gcc clocksDmitry Baryshkov1-2/+6
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200913225135.30366-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-12arm64: dts: qcom: Add support for Xiaomi Poco F1 (Beryllium)Amit Pundir2-0/+381
Add initial dts support for Xiaomi Poco F1 (Beryllium). This initial support is based on upstream Dragonboard 845c (sdm845) device. With this dts, Beryllium boots AOSP up to ADB shell over USB-C. Supported functionality includes UFS, USB-C (peripheral), microSD card and Vol+/Vol-/power keys. Bluetooth should work too but couldn't be verified from adb command line, it is verified when enabled from UI with few WIP display patches. Just like initial db845c support, initializing the SMMU is clearing the mapping used for the splash screen framebuffer, which causes the device to hang during boot and recovery needs a hard power reset. This can be worked around using: fastboot oem select-display-panel none To switch ON the display back run: fastboot oem select-display-panel But this only works on Beryllium devices running bootloader version BOOT.XF.2.0-00369-SDM845LZB-1 that shipped with Android-9 based release. Newer bootloader version do not support switching OFF the display panel at all. Reviewed-by: Konrad Dybcio <konradybcio@gmail.com> Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Link: https://lore.kernel.org/r/1599840940-18144-1-git-send-email-amit.pundir@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: sc7180: add bus clock to mdp node for sc7180 targetKrishna Manikandan1-4/+4
Move the bus clock to mdp device node,in order to facilitate bus band width scaling on sc7180 target. The parent device MDSS will not vote for bus bw, instead the vote will be triggered by mdp device node. Since a minimum vote is required to turn on bus clock, move the clock node to mdp device from where the votes are requested. This patch has dependency on the below series https://patchwork.kernel.org/patch/11468783/ Reviewed-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> Link: https://lore.kernel.org/r/1594899334-19772-2-git-send-email-kalyan_t@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: sc7180: Add bandwidth votes for eMMC and SDcardPradeep P V K1-0/+15
Add the bandwidth domain supporting performance state and the corresponding OPP tables for the sdhc device on sc7180. Signed-off-by: Pradeep P V K <ppvk@codeaurora.org> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org> Link: https://lore.kernel.org/r/1597646464-1863-1-git-send-email-sbhanu@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: sc7180: Add 'sustainable_power' for CPU thermal zonesMatthias Kaehlcke1-0/+10
The 'sustainable_power' attribute provides an estimate of the sustained power that can be dissipated at the desired control temperature. One could argue that this value is not necessarily the same for all devices with the same SoC, which may have different form factors or thermal designs. However there are reasons to specify a (default) value at SoC level for SC7180: most importantly, if no value is specified at all the power_allocator thermal governor (aka 'IPA') estimates a value, using the minimum power of all cooling devices of the zone, which can result in overly aggressive thermal throttling. For most devices an approximate conservative value should be more useful than the minimum guesstimate of power_allocator. Devices that need a different value can overwrite it in their <device>.dts. Also the thermal zones for SC7180 have a high level of granularity (essentially one for each function block), which makes it more likely that the default value just works for many devices. The values correspond to 1901 MHz for the big cores, and 1804 MHz for the small cores. The values were determined by limiting the CPU frequencies to different max values and launching a bunch of processes that cause high CPU load ('while true; do true; done &' is simple and does a good job). A frequency is deemed sustainable if the CPU temperatures don't rise (consistently) above the second trip point ('control temperature', 95 degC in this case). Once the highest sustainable frequency is found, the sustainable power can be calculated by multiplying the energy consumption per core at this frequency (which can be found in /sys/kernel/debug/energy_model/) with the number of cores that are specified as cooling devices. The sustainable frequencies were determined at room temperature on a device without heat sink or other passive cooling elements. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20200813113030.1.I89c33c4119eaffb986b1e8c1bc6f0e30267089cd@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: sc7180: Add OPP tables and power-domains for venusRajendra Nayak1-2/+33
Add the OPP tables in order to be able to vote on the performance state of a power-domain Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1598970026-7199-6-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: sdm845: Add OPP tables and power-domains for venusRajendra Nayak1-2/+38
Add the OPP tables in order to be able to vote on the performance state of a power-domain. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1598970026-7199-5-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: sc7180: add interconnect bindings for displayKrishna Manikandan1-0/+3
This change adds the interconnect bindings to the MDSS node. This will establish Display to DDR path for bus bandwidth voting. Reviewed-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> Link: https://lore.kernel.org/r/1594899334-19772-1-git-send-email-kalyan_t@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: sc7180: Add LPASS clock controller nodesTaniya Das1-0/+24
Update the clock controller nodes for Low power audio subsystem functionality. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1596305615-5894-2-git-send-email-tdas@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: qrb5165-rb5: Add gpio-line-names for PM8150(B&L)Manivannan Sadhasivam1-0/+47
Add gpio-line-names for the GPIO pins exposed by PM8150, PM8150B and PM8150L PMIC nodes. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200904063637.28632-7-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: qrb5165-rb5: Add gpio-line-names for TLMM blockManivannan Sadhasivam1-0/+181
Add gpio-line-names property for QRB5165 RB5 board for naming all GPIOs exposed by TLMM block. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200904063637.28632-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: qrb5165-rb5: Add onboard LED supportManivannan Sadhasivam1-0/+26
Only User4, WLAN and BT LEDs are added for now. These GPIOs are coming from PM8150. Rest are coming from LPG block which is not supported yet! Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200904063637.28632-5-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: Add basic devicetree support for QRB5165 RB5Manivannan Sadhasivam2-0/+433
Add basic devicetree support for Qualcomm Technologies, Inc. Robotics RB5 platform. This board is one of the 96Boards CE platform targeted for Robotics usecases from Qualcomm. This basic devicetree support includes regulators, onboard debug UART, I2C, SPI, and UFS support. Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200904063637.28632-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10arm64: dts: qcom: sm8250: Rename UART2 node to UART12Manivannan Sadhasivam2-3/+12
The UART12 node has been mistakenly mentioned as UART2. Let's fix that for both SM8250 SoC and MTP board and also add pinctrl definition for it. Fixes: 60378f1a171e ("arm64: dts: qcom: sm8250: Add sm8250 dts file") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200904063637.28632-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-10dt-bindings: arm: qcom: Document SM8250 SoC and boardsManivannan Sadhasivam1-0/+7
Document the SM8250 SoC binding and also the boards using it. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200904063637.28632-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-31arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dtRob Clark9-0/+1822
This is essentialy a squash of a bunch of history of trogdor and lazor dt updates from the chromium kernel tree. I don't claim any credit other than wanting to more easily boot upstream kernel on these devices. I've tried to add cc tags for all the original authors. Cc: Stephen Boyd <swboyd@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Atul Dhudase <adhudase@codeaurora.org> Cc: Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org> Cc: Evan Green <evgreen@chromium.org> Cc: Cheng-Yi Chiang <cychiang@chromium.org> Cc: Ajit Pandey <ajitp@codeaurora.org> Cc: Alexandru Stan <amstan@chromium.org> Cc: Sujit Kautkar <sujitka@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200828204052.2085508-1-robdclark@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-30arm64: dts: qcom: sc7180: Fix the LLCC base register sizeSai Prakash Ranjan1-1/+1
There is one LLCC logical bank(LLCC0) on SC7180 SoC and the size of the LLCC0 base is 0x50000(320KB) not 2MB, so correct the size and fix copy paste mistake carried over from SDM845. Reviewed-by: Douglas Anderson <dianders@chromium.org> Fixes: 7cee5c742899 ("arm64: dts: qcom: sc7180: Fix node order") Fixes: c831fa299996 ("arm64: dts: qcom: sc7180: Add Last level cache controller node") Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/20200818145514.16262-1-saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-30arm64: dts: qcom: use sm8250 gpucc dt-bindingsJonathan Marek1-7/+8
Constants were used to allow merging separately from the dt-bindings, switch to symbolic names now that dt-bindings have landed. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200818160445.14008-3-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-30arm64: dts: qcom: use sm8150 gpucc dt-bindingsJonathan Marek1-7/+8
Constants were used to allow merging separately from the dt-bindings, switch to symbolic names now that dt-bindings have landed. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200818160445.14008-2-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-30arm64: dts: qcom: sm8150: fix up primary USB nodesJonathan Marek1-2/+2
The compatible for hsphy has out of place indentation, and the assigned clock rate for GCC_USB30_PRIM_MASTER_CLK is incorrect, the clock doesn't support a rate of 150000000. Use a rate of 200000000 to match downstream. Fixes: b33d2868e8d3 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes") Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200818160445.14008-1-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-30arm64: dts: qcom: sc7180: Add DisplayPort HPD pin dt nodeTanmay Shah1-0/+13
This node defines alternate DP HPD functionality of GPIO. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Tanmay Shah <tanmay@codeaurora.org> Link: https://lore.kernel.org/r/20200818033657.16074-1-tanmay@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-30arm64: dts: qcom: sdm845-db845c: Fix hdmi nodesVinod Koul1-6/+6
As per binding documentation, we should have dsi as node 0 and hdmi audio as node 1, so fix it Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: aef9a119dfb9 ("arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodes") Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200828074347.3788518-1-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-30arm64: dts: qcom: msm8992: Fix UART interrupt propertyKrzysztof Kozlowski1-1/+1
"interrupt" is not a valid property. Fixes: 7f8bcc0c4cfe ("arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200829111209.32685-1-krzk@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-08-16Linux 5.9-rc1Linus Torvalds1-2/+2
2020-08-16parisc: fix PMD pages allocation by restoring pmd_alloc_one()Mike Rapoport1-0/+6
Commit 1355c31eeb7e ("asm-generic: pgalloc: provide generic pmd_alloc_one() and pmd_free_one()") converted parisc to use generic version of pmd_alloc_one() but it missed the fact that parisc uses order-1 pages for PMD. Restore the original version of pmd_alloc_one() for parisc, just use GFP_PGTABLE_KERNEL that implies __GFP_ZERO instead of GFP_KERNEL and memset. Fixes: 1355c31eeb7e ("asm-generic: pgalloc: provide generic pmd_alloc_one() and pmd_free_one()") Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Tested-by: Meelis Roos <mroos@linux.ee> Reviewed-by: Matthew Wilcox (Oracle) <willy@infradead.org> Link: https://lkml.kernel.org/r/9f2b5ebd-e4a4-0fa1-6cd3-4b9f6892d1ad@linux.ee Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-15io_uring: short circuit -EAGAIN for blocking read attemptJens Axboe1-1/+4
One case was missed in the short IO retry handling, and that's hitting -EAGAIN on a blocking attempt read (eg from io-wq context). This is a problem on sockets that are marked as non-blocking when created, they don't carry any REQ_F_NOWAIT information to help us terminate them instead of perpetually retrying. Fixes: 227c0c9673d8 ("io_uring: internally retry short reads") Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-08-15io_uring: sanitize double poll handlingJens Axboe1-9/+25
There's a bit of confusion on the matching pairs of poll vs double poll, depending on if the request is a pure poll (IORING_OP_POLL_ADD) or poll driven retry. Add io_poll_get_double() that returns the double poll waitqueue, if any, and io_poll_get_single() that returns the original poll waitqueue. With that, remove the argument to io_poll_remove_double(). Finally ensure that wait->private is cleared once the double poll handler has run, so that remove knows it's already been seen. Cc: stable@vger.kernel.org # v5.8 Reported-by: syzbot+7f617d4a9369028b8a2c@syzkaller.appspotmail.com Fixes: 18bceab101ad ("io_uring: allow POLL_ADD with double poll_wait() users") Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-08-14virtio: pci: constify ioreadX() iomem argument (as in generic implementation)Krzysztof Kozlowski1-3/+3
The ioreadX() helpers have inconsistent interface. On some architectures void *__iomem address argument is a pointer to const, on some not. Implementations of ioreadX() do not modify the memory under the address so they can be converted to a "const" version for const-safety and consistency among architectures. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Allen Hubbe <allenbh@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Dave Jiang <dave.jiang@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Helge Deller <deller@gmx.de> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Jakub Kicinski <kuba@kernel.org> Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Jon Mason <jdmason@kudzu.us> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: Matt Turner <mattst88@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Rich Felker <dalias@libc.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: http://lkml.kernel.org/r/20200709072837.5869-5-krzk@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-14ntb: intel: constify ioreadX() iomem argument (as in generic implementation)Krzysztof Kozlowski3-3/+3
The ioreadX() helpers have inconsistent interface. On some architectures void *__iomem address argument is a pointer to const, on some not. Implementations of ioreadX() do not modify the memory under the address so they can be converted to a "const" version for const-safety and consistency among architectures. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dave Jiang <dave.jiang@intel.com> Cc: Allen Hubbe <allenbh@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Helge Deller <deller@gmx.de> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Jakub Kicinski <kuba@kernel.org> Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Jon Mason <jdmason@kudzu.us> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: Matt Turner <mattst88@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Rich Felker <dalias@libc.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: http://lkml.kernel.org/r/20200709072837.5869-4-krzk@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-14rtl818x: constify ioreadX() iomem argument (as in generic implementation)Krzysztof Kozlowski1-3/+3
The ioreadX() helpers have inconsistent interface. On some architectures void *__iomem address argument is a pointer to const, on some not. Implementations of ioreadX() do not modify the memory under the address so they can be converted to a "const" version for const-safety and consistency among architectures. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kalle Valo <kvalo@codeaurora.org> Cc: Allen Hubbe <allenbh@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Dave Jiang <dave.jiang@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Helge Deller <deller@gmx.de> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Jakub Kicinski <kuba@kernel.org> Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Jon Mason <jdmason@kudzu.us> Cc: Matt Turner <mattst88@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Rich Felker <dalias@libc.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: http://lkml.kernel.org/r/20200709072837.5869-3-krzk@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-14iomap: constify ioreadX() iomem argument (as in generic implementation)Krzysztof Kozlowski22-138/+138
Patch series "iomap: Constify ioreadX() iomem argument", v3. The ioread8/16/32() and others have inconsistent interface among the architectures: some taking address as const, some not. It seems there is nothing really stopping all of them to take pointer to const. This patch (of 4): The ioreadX() and ioreadX_rep() helpers have inconsistent interface. On some architectures void *__iomem address argument is a pointer to const, on some not. Implementations of ioreadX() do not modify the memory under the address so they can be converted to a "const" version for const-safety and consistency among architectures. [krzk@kernel.org: sh: clk: fix assignment from incompatible pointer type for ioreadX()] Link: http://lkml.kernel.org/r/20200723082017.24053-1-krzk@kernel.org [akpm@linux-foundation.org: fix drivers/mailbox/bcm-pdc-mailbox.c] Link: http://lkml.kernel.org/r/202007132209.Rxmv4QyS%25lkp@intel.com Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Matt Turner <mattst88@gmail.com> Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> Cc: Helge Deller <deller@gmx.de> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Jon Mason <jdmason@kudzu.us> Cc: Allen Hubbe <allenbh@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Jason Wang <jasowang@redhat.com> Link: http://lkml.kernel.org/r/20200709072837.5869-1-krzk@kernel.org Link: http://lkml.kernel.org/r/20200709072837.5869-2-krzk@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-14sh: use generic strncpy()Kuninori Morimoto1-26/+0
Current SH will get below warning at strncpy() In file included from ${LINUX}/arch/sh/include/asm/string.h:3, from ${LINUX}/include/linux/string.h:20, from ${LINUX}/include/linux/bitmap.h:9, from ${LINUX}/include/linux/nodemask.h:95, from ${LINUX}/include/linux/mmzone.h:17, from ${LINUX}/include/linux/gfp.h:6, from ${LINUX}/innclude/linux/slab.h:15, from ${LINUX}/linux/drivers/mmc/host/vub300.c:38: ${LINUX}/drivers/mmc/host/vub300.c: In function 'new_system_port_status': ${LINUX}/arch/sh/include/asm/string_32.h:51:42: warning: array subscript\ 80 is above array bounds of 'char[26]' [-Warray-bounds] : "0" (__dest), "1" (__src), "r" (__src+__n) ~~~~~^~~~ In general, strncpy() should behave like below. char dest[10]; char *src = "12345"; strncpy(dest, src, 10); // dest = {'1', '2', '3', '4', '5', '\0','\0','\0','\0','\0'} But, current SH strnpy() has 2 issues. 1st is it will access to out-of-memory (= src + 10). 2nd is it needs big fixup for it, and maintenance __asm__ code is difficult. To solve these issues, this patch simply uses generic strncpy() instead of architecture specific one. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Cc: Alan Modra <amodra@gmail.com> Cc: Bin Meng <bin.meng@windriver.com> Cc: Chen Zhou <chenzhou10@huawei.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Rich Felker <dalias@libc.org> Cc: Romain Naour <romain.naour@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: https://marc.info/?l=linux-renesas-soc&m=157664657013309 Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>