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2015-08-12ARM: shmobile: r7s72100 dtsi: Add CPG/MSTP Clock DomainGeert Uytterhoeven1-0/+19
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12clk: shmobile: rz: Add CPG/MSTP Clock Domain supportGeert Uytterhoeven3-2/+31
Add Clock Domain support to the RZ Clock Pulse Generator (CPG) driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain supportGeert Uytterhoeven2-2/+26
Add Clock Domain support to the R-Car Gen2 Clock Pulse Generator (CPG) driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain supportGeert Uytterhoeven2-4/+28
Add Clock Domain support to the R-Car H1 Clock Pulse Generator (CPG) driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. Also update the reg property in the DT binding doc example to match the actual dtsi, which uses #address-cells and #size-cells == 1, not 2. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain supportGeert Uytterhoeven3-3/+29
Add Clock Domain support to the R-Car M1A Clock Pulse Generator (CPG) driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12clk: shmobile: Add CPG/MSTP Clock Domain supportGeert Uytterhoeven2-0/+99
Add Clock Domain support to the Clock Pulse Generator (CPG) Module Stop (MSTP) Clocks driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. The CPG/MSTP Clock Domain code will scan such devices for clocks that are suitable for power-managing the device, by looking for a clock that is compatible with "renesas,cpg-mstp-clocks". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-05ARM: shmobile: sh73a0 dtsi: Add missing "gpio-ranges" to gpio nodeGeert Uytterhoeven1-0/+3
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO led1-high (chip sh73a0_pfc, offset 20) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the ranges are added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-05ARM: shmobile: r8a7740 dtsi: Add missing "gpio-ranges" to gpio nodeGeert Uytterhoeven1-0/+1
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO lcd0 (chip r8a7740_pfc, offset 176) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the range is added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-05ARM: shmobile: r8a73a4 dtsi: Add missing "gpio-ranges" to gpio nodeGeert Uytterhoeven1-0/+7
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO led1-high (chip r8a73a4_pfc, offset 28) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the ranges are added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-03ARM: shmobile: silk: add eMMC DT supportSergei Shtylyov1-0/+25
Define the SILK board dependent part of the MMCIF device node (the board has eMMC chip) along with the necessary voltage regulator (note that the Vcc/Vccq regulator is dummy -- it's required by the MMCIF driver but doesn't actually exist on the board). Based on the original patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-03ARM: shmobile: r8a7794: add MMCIF DT supportSergei Shtylyov1-0/+11
Define the generic R8A7794 part of the MMCIF0 device node. Based on the orginal patch by Shinobu Uehara <shinobu.uehara.xc@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-30ARM: shmobile: silk: add Ether DT supportSergei Shtylyov1-1/+27
Define the SILK board dependent part of the Ether device node. Enable DHCP and NFS root for the kernel booting. Based on the original patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-30ARM: shmobile: silk: initial device treeSergei Shtylyov2-0/+52
Add the initial device tree for the R8A7794 SoC based SILK low cost board. SCIF2 serial port support is included, so that the serial console can work. Based on the original patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-29ARM: shmobile: r8a7794: add PFC DT supportSergei Shtylyov1-0/+6
Define the generic R8A7794 part of the PFC device node. Based on original patch by Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-28ARM: shmobile: r8a7791: Add JPU device node.Mikhail Ulyanov1-0/+7
This patch contains device tree node definition for JPEG codec peripheral found in the Renesas R-Car r8a7791 SoC. Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-28ARM: shmobile: r8a7790: Add JPU device node.Mikhail Ulyanov1-0/+7
This patch contains device tree node definition for JPEG codec peripheral found in the Renesas R-Car r8a7790 SoC. Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-22ARM: shmobile: r8a7791: Add Audio MIX support on DTSIKuninori Morimoto1-0/+7
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-22ARM: shmobile: r8a7791: Add Audio CTU support on DTSIKuninori Morimoto2-0/+18
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-22ARM: shmobile: r8a7790: Add Audio MIX support on DTSIKuninori Morimoto1-0/+7
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-22ARM: shmobile: r8a7790: Add Audio CTU support on DTSIKuninori Morimoto2-0/+18
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-22ARM: shmobile: lager: Fix adv7511 IRQ sensingLaurent Pinchart1-1/+1
The adv7511 IRQ is low level triggered, not falling edge triggered. The wrong sense configuration results in no interrupt being triggered at all, breaking hotplug detection. Fix it. Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-15ARM: shmobile: koelsch: add sound label on DTSKuninori Morimoto1-1/+1
It is easy to modify settings for Test or other purpose if sound has label Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-15ARM: shmobile: lager: add sound label on DTSKuninori Morimoto1-1/+1
It is easy to modify settings for Test or other purpose if sound has label Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-15ARM: shmobile: emev2: kzm9d: enable IIC bussesWolfram Sang1-0/+8
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-15ARM: shmobile: emev2: add IIC cores to dtsiWolfram Sang1-0/+48
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7779: Configure IRLM mode via DTMagnus Damm1-2/+3
Adjust the r8a7779 SoC DTS and the Marzen Reference C board code to use DTS only for INTC-IRQPIN IRLM setup. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7794 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven1-1/+1
Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the R-Car Gen2 GIC is assumed to be a GIC-400. This has been confirmed by reading the GICD_IIDR register (on r8a7791), which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7793 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven1-1/+1
Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the R-Car Gen2 GIC is assumed to be a GIC-400. This has been confirmed by reading the GICD_IIDR register (on r8a7791), which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7791 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven1-1/+1
Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the R-Car Gen2 GIC is assumed to be a GIC-400. This has been confirmed by reading the GICD_IIDR register, which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7790 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven1-1/+1
Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the R-Car Gen2 GIC is assumed to be a GIC-400. This has been confirmed by reading the GICD_IIDR register (on r8a7791), which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a73a4 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven1-1/+1
Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the documentation states it's a GIC-400. This has been confirmed by reading the GICD_IIDR register, which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: armadillo800eva dts: Add pinctrl and gpio-hog for lcdc0Geert Uytterhoeven1-0/+13
Configure pinctrl and a GPIO-controller board mux for LCD use. This allows the armadillo800eva board staging code to enable lcdc0. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7790: add EtherAVB DT supportSergei Shtylyov1-0/+10
Define the generic R8A7790 part of the EtherAVB device node. Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7790: add EtherAVB clocksSergei Shtylyov2-4/+7
Add the EtherAVB clock to the R8A7790 device tree. Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7793: add minimal Gose board device treeUlrich Hecht2-0/+64
Minimal DT description and Makefile entry for the Gose eval board. Support for console, timer, and Ethernet. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: add r8a7793 minimal SoC device treeUlrich Hecht2-0/+531
Minimal r8a7793 device tree including one CPU core, interrupt controllers, timers, two serial ports, and the Ethernet controller, plus the required clock descriptions. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-05Linux 4.2-rc1Linus Torvalds1-2/+2
2015-07-04bluetooth: fix list handlingLinus Torvalds2-2/+3
Commit 835a6a2f8603 ("Bluetooth: Stop sabotaging list poisoning") thought that the code was sabotaging the list poisoning when NULL'ing out the list pointers and removed it. But what was going on was that the bluetooth code was using NULL pointers for the list as a way to mark it empty, and that commit just broke it (and replaced the test with NULL with a "list_empty()" test on a uninitialized list instead, breaking things even further). So fix it all up to use the regular and real list_empty() handling (which does not use NULL, but a pointer to itself), also making sure to initialize the list properly (the previous NULL case was initialized implicitly by the session being allocated with kzalloc()) This is a combination of patches by Marcel Holtmann and Tedd Ho-Jeong An. [ I would normally expect to get this through the bt tree, but I'm going to release -rc1, so I'm just committing this directly - Linus ] Reported-and-tested-by: Jörg Otte <jrg.otte@gmail.com> Cc: Alexey Dobriyan <adobriyan@gmail.com> Original-by: Tedd Ho-Jeong An <tedd.an@intel.com> Original-by: Marcel Holtmann <marcel@holtmann.org>: Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-07-049p: cope with bogus responses from server in p9_client_{read,write}Al Viro1-0/+8
if server claims to have written/read more than we'd told it to, warn and cap the claimed byte count to avoid advancing more than we are ready to.
2015-07-04p9_client_write(): avoid double p9_free_req()Al Viro1-0/+1
Braino in "9p: switch p9_client_write() to passing it struct iov_iter *"; if response is impossible to parse and we discard the request, get the out of the loop right there. Cc: stable@vger.kernel.org Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-07-049p: forgetting to cancel request on interrupted zero-copy RPCAl Viro1-1/+2
If we'd already sent a request and decide to abort it, we *must* issue TFLUSH properly and not just blindly reuse the tag, or we'll get seriously screwed when response eventually arrives and we confuse it for response to later request that had reused the same tag. Cc: stable@vger.kernel.org # v3.2 and later Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-07-04dax: bdev_direct_access() may sleepMatthew Wilcox1-0/+6
The brd driver is the only in-tree driver that may sleep currently. After some discussion on linux-fsdevel, we decided that any driver may choose to sleep in its ->direct_access method. To ensure that all callers of bdev_direct_access() are prepared for this, add a call to might_sleep(). Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-07-04block: Add support for DAX reads/writes to block devicesMatthew Wilcox2-2/+8
If a block device supports the ->direct_access methods, bypass the normal DIO path and use DAX to go straight to memcpy() instead of allocating a DIO and a BIO. Includes support for the DIO_SKIP_DIO_COUNT flag in DAX, as is done in do_blockdev_direct_IO(). Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-07-04dax: Use copy_from_iter_nocacheMatthew Wilcox1-1/+1
When userspace does a write, there's no need for the written data to pollute the CPU cache. This matches the original XIP code. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-07-04dax: Add block size note to documentationMatthew Wilcox1-2/+4
For block devices which are small enough, mkfs will default to creating a filesystem with block sizes smaller than page size. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2015-07-04NTB: Add split BAR output for debugfs statsDave Jiang1-15/+68
When split BAR is enabled, the driver needs to dump out the split BAR registers rather than the original 64bit BAR registers. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Change WARN_ON_ONCE to pr_warn_once on unsafeDave Jiang1-8/+16
The unsafe doorbell and scratchpad access should display reason when WARN is called. Otherwise we get a stack dump without any explanation. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Print driver name and version in module initDave Jiang2-0/+6
Printouts driver name and version to indicate what is being loaded. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Increase transport MTU to 64k from 16kDave Jiang1-1/+1
Benchmarking showed a significant performance increase with the MTU size to 64k instead of 16k. Change the driver default to 64k. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Rename Intel code names to platform namesDave Jiang3-465/+465
Instead of using the platform code names, use the correct platform names to identify the respective Intel NTB hardware. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
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