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2025-04-22arm64: dts: renesas: rzg3e-smarc-som: Enable Mali-G52Tommaso Merciai1-0/+15
Enable the Mali-G52 (GPU) node on the RZ/G3E SMARC SoM board. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250402131142.1270701-5-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-22arm64: dts: renesas: r9a09g047: Add Mali-G52 GPU nodeTommaso Merciai1-0/+49
Add the Mali-G52 GPU node to the SoC DTSI. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250402131142.1270701-4-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-22arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic supportJohn Madieu1-0/+25
Enable RAA215300 PMIC and built-in RTC support on the RZ/G3E SoM module. Also add related clock and interrupt signals. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250329121258.172099-3-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-22arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrolJohn Madieu1-0/+13
Add a device node for I2C2 pincontrol. Also enable the I2C2 device node with 1MHz clock frequency as it is connected to the RAA215300 PMIC on the RZ/G3E SoM. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250329121258.172099-2-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-14ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe SD card portWolfram Sang1-0/+22
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250410071406.9669-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-14ARM: dts: renesas: r9a06g032: Describe SDHCI controllersWolfram Sang1-0/+24
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250410071406.9669-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-14arm64: dts: renesas: Add initial device tree for RZ/V2N EVKLad Prabhakar2-0/+116
Add the initial device tree for the Renesas RZ/V2N EVK board, based on the R9A09G056N48 SoC. Enable basic board functionality, including: - Memory mapping (reserve the first 128MB for the secure area) - Clock inputs (QEXTAL, RTXIN, AUDIO_EXTAL) - PINCTRL configurations for peripherals - Serial console (SCIF) - SDHI1 with power control and UHS modes Update the Makefile to include the new DTB. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-13-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>