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2016-03-08drm/amdgpu: Clear HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_CACHEChunming Zhou2-2/+2
So that we can invalidate and flush the HDP independently Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: add hdp invalidation for sdma v3_0Chunming Zhou1-0/+9
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: add hdp invalidation for sdma v2_4Chunming Zhou1-0/+8
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: add hdp invalidation for cik sdmaChunming Zhou1-0/+8
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: add hdp invalidation for gfx8Chunming Zhou1-0/+14
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: add hdp invalidation for gfx7Chunming Zhou1-0/+21
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: add hdp_invalidate functionChunming Zhou2-0/+7
It's called after emitting ibs. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: wait engine idle before vm flush for sdmaChunming Zhou3-0/+44
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: Switch to drm_vblank_on/off (v2)Daniel Vetter3-6/+6
Equivalent change to the radeon driver. Note that with radeon this caught a bug in the dri3 DDX implementation, which asked for vblank interrupts when the pipe is off. That bug needs to be fixed before we can merge this patch (if amdgpu is affected too). Michel discovered this one. v2: agd: switch dce8 as well. Acked-by: Michel Dänzer <michel.daenzer@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/radeon: Switch to drm_vblank_on/offDaniel Vetter2-4/+4
These should be functionally equivalent to the older per/post modeset functions, except that they block out drm_vblank_get right away. There's only the clock adjusting code (outside of pageflips) in readone which uses drm_vblank_get. But that code doesn't synchronize against concurrent modesets and instead handles any such races by waiting for the right vblank to arrive with a short timetout. The longer-term plan here is to switch all kms drivers to drm_vblank_on/off so that common code like pending event cleanup can be done there, while drm_vblank_pre/post_modeset will be purely drm internal for the old UMS ioctl. Note that with this patch Michel uncovered a bug in the dri3 implementation of the DDX (it does vblank waits when the pipe is off), which had to be fixed first. Cc: Michel Dänzer <michel.daenzer@amd.com> Acked-and-tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu: delete set-but-not-read member has_uvd from amdgpu_deviceNils Wallménius3-7/+0
Clean up leftover from radeon code. Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu/ci: sync up with dpm changes from radeonAlex Deucher1-2/+3
Looks like radeon commit: d3052b8ce8a308d2086519fa5f7c4966257ea184 was missed. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu/ci: remove redundant pcie setupAlex Deucher1-20/+0
Looks like this got leftover by accident. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08drm/amdgpu/ci: drop some old thermal setupAlex Deucher1-24/+0
This was leftover from a long time ago and is not longer needed since the thermal controller setup code was added. Additional mucking with the thermal interrupts can cause spurious thermal events which can lead to unnecessary state changes. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-05drm/amd/powerplay: refine the dmesg info.Rex Zhu2-3/+9
this do not mean driver error. Change-Id: If2080eb4b79fc6389280b7c75cb7998d77090739 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-03drm/amdgpu: fix rb bitmap & cu bitmap calculationFlora Cui4-16/+13
Fix some copy paste typos. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-29drm/amdgpu: trace the pd_addr in vm_grab_id as wellChristian König2-10/+14
Makes matching it to the flushes much easier. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-29drm/amdgpu: fix VM faults caused by vm_grab_id() v4Christian König9-80/+91
The owner must be per ring as long as we don't support sharing VMIDs per process. Also move the assigned VMID and page directory address into the IB structure. v3: assign the VMID to all IBs, not just the first one. v4: use correct pointer for owner Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-26drm/amdgpu: update radeon acpi headerAlex Deucher1-0/+2
Add some new defs for ATPX. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-26drm/radeon: update radeon acpi headerAlex Deucher1-0/+2
Add some new defs for ATPX. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-26drm/amd: cleanup get_mfd_cell_dev()Dan Carpenter1-4/+2
It's simpler to just use snprintf() to print this to one buffer instead of using strcpy() and strcat(). Also using snprintf() is slightly safer than using sprintf(). Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-26drm/amdgpu: fix error handling in amdgpu_bo_list_setChristian König1-0/+3
Don't leak BOs in case of some error. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-26drm/amd/powerplay: fix code style warning.Rex Zhu1-2/+2
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-25drm/amd: Do not make DRM_AMD_ACP default to yGeert Uytterhoeven1-1/+0
By default, not only this driver is enabled on all platforms, but also generic PM Domains and Multi-Function Devices. Drop the "default y" to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-25drm/amdgpu/gfx: fix off by one in rb rework (v2)Alex Deucher2-10/+4
When I reworked this code, I messed up num rb count. v2: use hweight32 Reviewed-by: Ken Wang <Qingquing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>