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2024-06-17pinctrl: scmi: add blocklistPeng Fan1-0/+9
i.MX95 will have its own pinctrl scmi driver, so need block pinctrl-scmi driver for i.MX95, otherwise there will be two pinctrl devices for a single scmi protocol@19. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Link: https://lore.kernel.org/r/20240521-pinctrl-scmi-imx95-v1-2-9a1175d735fd@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17dt-bindings: firmware: arm,scmi: Add properties for i.MX95 Pinctrl OEM extensionsPeng Fan2-1/+56
i.MX95 Pinctrl is managed by System Control Management Interface(SCMI) firmware using OEM extensions. No functions, no groups are provided by the firmware. So add i.MX95 specific properties. To keep aligned with current i.MX pinctrl bindings, still use "fsl,pins" for i.MX95. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Link: https://lore.kernel.org/r/20240521-pinctrl-scmi-imx95-v1-1-9a1175d735fd@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: qcom: sdm670: add pdc wakeirq mapRichard Acayan1-0/+19
The PDC was hooked up as a wakeup parent in the DTS in commit 71f080633d1e ("arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM"), but the wakeirq mapping was not defined so it had no effect. Add the mapping for wakeup interrupts on the PDC to their corresponding pins. Configuring a pin IRQ as dual-edge would break it unless the wakeirq_dual_edge_errata flag is set. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20240523230619.256882-2-mailingradian@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: cy8c95x0: Use REGCACHE_MAPLEPatrick Rudolph1-1/+1
Use REGCACHE_MAPLE instead of REGCACHE_FLAT. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/r/20240521152602.1097764-3-patrick.rudolph@9elements.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: cy8c95x0: Use regmap rangesPatrick Rudolph1-126/+53
Instead of implementing a custom register paging mechanism in the driver use the existing regmap ranges feature. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/r/20240521152602.1097764-2-patrick.rudolph@9elements.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: cy8c95x0: Use single I2C lockPatrick Rudolph1-15/+17
Currently there are 3 locks being used when accessing the chip, one in the driver and one in each regmap. Reduce that to one driver only lock that protects all regmap and regcache accesses. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://lore.kernel.org/r/20240521152602.1097764-1-patrick.rudolph@9elements.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: pinmux: Remove unused members from struct function_descAndy Shevchenko1-9/+0
All drivers are converted to use embedded struct pinfunction. Remove unused members from struct function_desc. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-12-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: mediatek: moore: Convert to use func memberAndy Shevchenko2-8/+6
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-11-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: keembay: Convert to use func memberAndy Shevchenko1-11/+11
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-10-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: ingenic: Convert to use func memberAndy Shevchenko1-9/+7
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-9-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: imx: Convert to use func memberAndy Shevchenko1-7/+7
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-8-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: pinmux: Embed struct pinfunction into struct function_descAndy Shevchenko2-6/+9
struct function_desc is a particular version of the struct pinfunction with associated opaque data. Start switching pin control core and drivers to use it explicitly. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-7-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: pinmux: Add a convenient define PINCTRL_FUNCTION_DESC()Andy Shevchenko3-8/+14
Add PINCTRL_FUNCTION_DESC() macro for inline use. While at it, fix adjective form in the comment of PINCTRL_GROUP_DESC(). Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-6-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: mediatek: moore: Provide a helper macro PINCTRL_PIN_FUNCTION()Andy Shevchenko6-76/+84
Provide a helper macro to assign the struct function_desc entries. This helps further refactoring. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-5-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: ingenic: Provide a helper macro INGENIC_PIN_FUNCTION()Andy Shevchenko1-345/+352
Provide a helper macro to assign the struct function_desc entries. This helps further refactoring. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-4-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: equilibrium: Make use of struct pinfunctionAndy Shevchenko2-23/+13
Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-3-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: berlin: Make use of struct pinfunctionAndy Shevchenko2-18/+9
Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-2-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: rockchip: update rk3308 iomux routesDmitry Yashin1-15/+2
Some of the rk3308 iomux routes in rk3308_mux_route_data belong to the rk3308b SoC. Remove them and correct i2c3 routes. Fixes: 7825aeb7b208 ("pinctrl: rockchip: add rk3308 SoC support") Signed-off-by: Dmitry Yashin <dmt.yashin@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240515121634.23945-2-dmt.yashin@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: pinctrl-zynqmp: Use pin numbers stored in pin descriptorSwati Agarwal1-1/+1
Use pin numbers stored in the pin descriptors instead of index value while creating the pin groups. Pin Id's are not same as Index values for Xilinx Versal platform, so use the pin values from descriptor which works for both ZynqMP and Versal platforms. Signed-off-by: Swati Agarwal <swati.agarwal@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2413a1f99278d70313960f13daecda9ef54172d8.1716807432.git.michal.simek@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: ralink: mt76x8: fix pinmux functionWeihao Li1-61/+27
The current version of the pinctrl driver has some issues: 1. Duplicated "gpio" pmx function The common code will add a "gpio" pmx functon to every pin group, so it's not necessary to define a separate "gpio" pmx function in pin groups. 2. Duplicated pmx function name There are some same function name in different pin groups, which will cause some problems. For example, when we want to use PAD_GPIO0 as refclk output function, the common clk framework code will search the entire pin function lists, then return the first one matched, in this case the matched function list only include the PAD_CO_CLKO pin group because there are three "refclk" pin function, which is added by refclk_grp, spi_cs1_grp and gpio_grp. To solve this problem, a simple way is just add a pingrp refix to function name like mt7620 pinctrl driver does. 3. Useless "-" or "rsvd" functon It's really unnecessary to add a reserved pin mux function to the function lists, because we never use it. Signed-off-by: Weihao Li <cn.liweihao@gmail.com> Link: https://lore.kernel.org/r/20240527022036.31985-1-user@blabla Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: pinctrl-tps6594: make tps65224_muxval_remap and tps6594_muxval_remap as static to fix sparse warningNirmala Devi Mal Nadar1-2/+2
pinctrl: tps6594: Fix sparse warning. warning: symbol 'tps65224_muxval_remap' was not declared. Should it be static? warning: symbol 'tps6594_muxval_remap' was not declared. Should it be static? Signed-off-by: Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202405111523.9yt759uX-lkp@intel.com/ Link: https://lore.kernel.org/r/0109018f85002ae1-6fb831b2-74c2-4559-98f1-a3ef25e72558-000000@ap-south-1.amazonses.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: qcom: spmi: Add PMC8380Konrad Dybcio1-0/+1
PMC8380 is a new chip, featuring 10 GPIOs. Describe it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240525-topic-pmc8380_gpio-v2-2-2de50cb28ac1@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17dt-bindings: pinctrl: qcom,pmic-gpio: Document PMC8380Konrad Dybcio1-0/+2
PMC8380 is a new PMIC used with X1 SoCs. Document it Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240525-topic-pmc8380_gpio-v2-1-2de50cb28ac1@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: core: reset gpio_device in loop in pinctrl_pins_show()Léo DUBOIN1-0/+1
We were not resetting the pointer to the associated gpio_device once we are done displaying a pin's information. This meant that once we reached the end of a gpio-range, if there were pins right after it that did not belong to any known range, they would be associated with the previous range's gpio device. This resulted in those pins appearing as <4294966783:old_gdev> instead of the expected <0:?> (due to gpio_num being -1). Signed-off-by: Léo DUBOIN <lduboin@freebox.fr> Link: https://lore.kernel.org/r/c40d0634abefa19e689ffd450e0f48a8d63c4fc4.1714049455.git.lduboin@freebox.fr Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: core: take into account the pins array in pinctrl_pins_show()Léo DUBOIN1-4/+13
We previously only looked at the 'pin_base' of the pinctrl_gpio_ranges struct for determining if a pin matched a GPIO number. This value is present only if the 'pins' array is not NULL, and is 0 otherwise. This means that GPIO ranges declared using gpiochip_add_pingroup_range(), thus making use of pins, were always matched by the pins in the range [0-npins] even if they contained pins in a completely separate range. Signed-off-by: Léo DUBOIN <lduboin@freebox.fr> Link: https://lore.kernel.org/r/6df39bd47942156be5713f8f4e317d2ad3e0ddeb.1714049455.git.lduboin@freebox.fr Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driverJacky Huang5-0/+3059
Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and add support for ma35d1 pinctrl. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>