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2022-03-16arm64: dts: fsd: Add the MCT supportAlim Akhtar1-0/+23
Add node relevant to support MCT, which is used as one of the system timer on this SoC. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220223171858.11384-1-alim.akhtar@samsung.com Link: https://lore.kernel.org/r/20220316154309.436028-2-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-07arm64: dts: stingray: Fix spi clock nameKuldeep Singh1-2/+2
SPI clock name for pl022 is "sspclk" and not "spiclk". Also fix below dtc warning: clock-names:0: 'spiclk' is not one of ['SSPCLK', 'sspclk'] Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-03-07arm64: dts: ns2: Fix spi clock nameKuldeep Singh1-2/+2
SPI clock name for pl022 is "sspclk" and not "spiclk". Also fix below dtc warning: clock-names:0: 'spiclk' is not one of ['SSPCLK', 'sspclk'] Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-03-05ARM: dts: rockchip: Update regulator name for PX3Chris Morgan1-1/+1
The regulator name of SWITCH_REG1 does not match any other board with a rk818 PMIC, nor does it correspond to a regulator in the rk808-regulator driver. Changing name to SWITCH_REG which is consistent with other boards and is in the driver. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20220303203958.4904-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-03-05ARM: dts: rockchip: Add #clock-cells value for rk805Chris Morgan2-0/+2
Based on a brief discussion on the mailing list it was determined that clock-cells should be a required parameter in the event that a consumer of the clock gets added in an overlay. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20220303203958.4904-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-03-05arm64: dts: rockchip: Add #clock-cells value for rk805Chris Morgan1-0/+1
Based on a brief discussion on the mailing list it was determined that clock-cells should be a required parameter in the event that a consumer of the clock gets added in an overlay. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20220303203958.4904-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-03-05arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808Chris Morgan2-4/+0
The Rockchip rk808 Power Management IC does not have a vcc13 or a vcc14. The schematics for at least the Pinebook Pro suggest this is actually vcc1 and vcc2, and may be an artifact from the reference design schematic). Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20220303203958.4904-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-03-05arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-fireflyRob Herring1-2/+2
A label reference without brackets is a path string, not a phandle as intended. Add the missing brackets. Fixes: a5002c41c383 ("arm64: dts: rockchip: add WiFi module support for Firefly-RK3399") Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220304202559.317749-1-robh@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-03-04ARM: dts: at91: sama7g5: Add NAND supportTudor Ambarus2-0/+56
Add NAND support. The sama7g5's SMC IP is the same as sama5d2's with a slightly change: it provides a synchronous clock output (SMC clock) that is dedicated to FPGA usage. Since this doesn't interfere with the SMC NAND configuration, thus code will not be added in the current nand driver to address the FPGA usage, use the sama5d2's compatible and choose not to introduce dedicated compatibles for sama7g5. Tested with Micron MT29F4G08ABAEAWP NAND flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> [nicolas.ferre@microchip.com: add the definition of PMC_MCK1 in include/dt-bindings/clock/at91.h from another patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220111130556.905978-1-tudor.ambarus@microchip.com
2022-03-04ARM: dts: at91: sama7g5: add eic nodeClaudiu Beznea1-0/+13
Add EIC node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220228122326.1400954-2-claudiu.beznea@microchip.com
2022-03-04ARM: dts: at91: sama7g5: Remove unused properties in i2c nodesTudor Ambarus1-6/+0
The "atmel,use-dma-rx", "atmel,use-dma-rx" dt properties are not used by the i2c-at91 driver, nor they are defined in the bindings file, thus remove them. Cc: stable@vger.kernel.org Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220302161854.32177-1-tudor.ambarus@microchip.com
2022-03-04ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15Mihai Sain1-4/+4
This regulator is powering the vddcore pins from MPU. Its real value on the board and in the MPU datasheet is 1.15V. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220302160235.28336-1-nicolas.ferre@microchip.com
2022-03-02arm64: dts: lg: align pl330 node name with dtschemaKrzysztof Kozlowski2-2/+2
Fixes dtbs_check warnings like: dma@c1128000: $nodename:0: 'dma@c1128000' does not match '^dma-controller(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Chanho Min <chanho.min@lge.com> Link: https://lore.kernel.org/r/20220129175514.298942-2-krzysztof.kozlowski@canonical.com
2022-03-02arm64: dts: lg: add dma-cells to pl330 nodeKrzysztof Kozlowski2-0/+2
dma-cells property is required for dma-controller. Fixes dtbs_check warnings like: dma@c1128000: '#dma-cells' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Chanho Min <chanho.min@lge.com> Link: https://lore.kernel.org/r/20220129175514.298942-1-krzysztof.kozlowski@canonical.com
2022-03-02arm64: dts: juno: align pl330 node name with dtschemaKrzysztof Kozlowski1-1/+1
Fixes dtbs_check warning: dma@7ff00000: $nodename:0: 'dma@7ff00000' does not match '^dma-controller(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220129175621.299254-1-krzysztof.kozlowski@canonical.com
2022-03-01arm64: dts: broadcom: Fix sata nodenameFrank Wunderlich1-1/+1
After converting ahci-platform txt binding to yaml nodename is reported as not matching the standard: arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dt.yaml: ahci@663f2000: $nodename:0: 'ahci@663f2000' does not match '^sata(@.*)?$' Fix it to match binding. Fixes: ac9aae00f0fc ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2") Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-03-01arm64: dts: n5x: add sdr edac supportDinh Nguyen1-0/+10
The N5X platform has the Synopsys DDR controller the includes an EDAC controller. Add the entry for the controller in the DTS file instead of the base Agilex DTSI because the base Agilex does not have the controller. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-03-01arm64: dts: agilex/stratix10: add clock-names to USB DWC2 nodeKrzysztof Kozlowski2-0/+2
USB DWC2 requires clock-names: arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dt.yaml: usb@ffb00000: 'clock-names' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-03-01dt-bindings: usb: dwc2: add disable-over-currentKrzysztof Kozlowski1-0/+4
The driver parses disable-over-current protection and some implementations use it (e.g. Altera Stratix10), so document it in the bindings. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-03-01dt-bindings: usb: dwc2: add iommusKrzysztof Kozlowski1-0/+3
The DWC2 node might use IOMMU (e.g. Altera Stratix10), so add "iommus" property. This fixes warnings like: arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dt.yaml: usb@ffb40000: 'iommus' does not match any of the regexes: 'pinctrl-[0-9]+' Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-03-01dt-bindings: usb: dwc2: fix compatible of Intel AgilexKrzysztof Kozlowski1-0/+1
Intel Agilex USB DWC2 node is used as compatible with generic snps,dwc2 (just like Altera's Stratix10). Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-03-01ARM: dts: turris-omnia: Set PCIe slot-power-limit-milliwatt propertiesPali Rohár1-0/+3
All 3 miniPCIe slots in Turris Omnia are designed for 10 W. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-03-01arm64: dts: mediatek: update mt7986b memory nodeSam Shih1-1/+2
This patch updates the format of memory node in DT adding the device_type. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20220119123537.9968-3-sam.shih@mediatek.com [mb: fixed commit message] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01arm64: dts: mediatek: update mt7986a memory nodeSam Shih1-1/+2
This patch updates the format of memory node in DT adding the correct device_type. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20220119123537.9968-2-sam.shih@mediatek.com [mb: fixed commit message] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01arm64: dts: mediatek: add clock support for mt7986aSam Shih1-5/+63
Add clock controller nodes, include 40M clock source, topckgen, infracfg, apmixedsys and ethernet subsystem. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20220119123624.10043-2-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01ARM: dts: add GPIO support for Airoha EN7523John Crispin2-0/+29
Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 GPIOs Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Felix Fietkau <nbd@nbd.name> Link: https://lore.kernel.org/r/20220130145116.88406-14-nbd@nbd.name Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01ARM: Add basic support for Airoha EN7523 SoCJohn Crispin7-0/+177
EN7523 is an armv8 based silicon used inside broadband access type devices such as xPON and xDSL. It shares various silicon blocks with MediaTek silicon such as the MT7622. Add basic support for Airoha EN7523, enough for booting to console. The UART is basically 8250-compatible, except for the clock selection. A clock-frequency value is synthesized to get this to run at 115200 bps. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Felix Fietkau <nbd@nbd.name> Link: https://lore.kernel.org/r/20220130145116.88406-4-nbd@nbd.name Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01arm64: dts: mediatek: Add mt8192 power domains controllerChun-Jie Chen1-0/+201
Add power domains controller node for SoC mt8192 Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20210825010426.30303-1-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01arm64: dts: mt6358: add mt6358-keys nodeMattijs Korpershoek1-0/+12
This enables the power,home keys on MediaTek boards with a mt6358 pmic. Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20220121140323.4080640-5-mkorpershoek@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01arm64: dts: mt8183: add jpeg enc node for mt8183Maoguang Meng1-0/+12
Add jpeg encoder device tree node. Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20211206130425.184420-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28arm64: dts: ns2: Fix spi-cpol and spi-cpha propertyKuldeep Singh1-4/+4
Broadcom ns2 platform has spi-cpol and spi-cpho properties set incorrectly. As per spi-slave-peripheral-prop.yaml, these properties are of flag or boolean type and not integer type. Fix the values. Fixes: d69dbd9f41a7c (arm64: dts: Add ARM PL022 SPI DT nodes for NS2) Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> CC: Ray Jui <rjui@broadcom.com> CC: Scott Branden <sbranden@broadcom.com> CC: Florian Fainelli <f.fainelli@gmail.com>
2022-02-28ARM: dts: BCM5301X: Add Ethernet MAC address to Luxul XWR-3150Rafał Miłecki1-0/+8
Luxul XWR-3150 stores MAC as NVRAM variable. Add NVMEM cell for it and reference it in the Ethernet interface node. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-02-28ARM: dts: mvebu: Add Ctera C-200 V2 boardPawel Dembicki2-0/+389
Ctera C200 V2 is armada-370 based 2-Bay NAS. Hardware: - SoC: Marvell 88F6707-A1 ARMv7 Processor 1,2GHz (ARMADA 370 SoC) - Ram: 1GB (2x Nanya NT5CC512M8DN-D1) - NAND Flash: 256MB (ESMT F59L2G81A-25T) - Lan: 1x GBE (Marvell 88E1318-NNB2) - Storage: 2x SATA HDD 3.5" Slot - USB: 2x USB 3.0 port (Renesas uPD720202) - Console: Internal J3 connector (1: Vcc, 2: Rx, 3: Tx, 4: GND) - LEDs: 13x GPIO controlled - Buttons: 2x GPIO controlled Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-02-28ARM: dts: kirkwood: Add Ctera C-200 V1 boardPawel Dembicki2-0/+311
Ctera C200 V1 is kirkwood-based 2-Bay NAS. Hardware: - SoC: Marvell 88F6281-A1 ARMv5TE Processor 1.2GHz - Ram: 512MB (4x Nanya NT5TU128M8GE-AC) - NAND Flash: 256MB (Samsung 216 K9F2G08U0C) - Lan: 1x GBE (Marvell 88E1116R-NNC1) - Storage: 2x SATA HDD 3.5" Slot - USB: 2x USB 2.0 port - Console: Internal J3 connector (1: Vcc, 2: Rx, 3: Tx, 4: GND) - LEDs: 13x GPIO controlled - Buttons: 2x GPIO controlled Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-02-28dt-bindings: vendor-prefixes: Add Ctera NetworksPawel Dembicki1-0/+2
CTERA Networks Intl. is a company based in Israel. They manufacture NASes, network devices and provide software products for cloud storage and IT security. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-02-28ARM: dts: armada-385.dtsi: Add definitions for PCIe legacy INTx interruptsPali Rohár1-8/+44
With this change legacy INTA, INTB, INTC and INTD interrupts are reported separately and not mixed into one Linux virq source anymore. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Luis Mendes <luis.p.mendes@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-02-28arm64: dts: marvell: armada-37xx: Add clock to PCIe nodeMarek Behún1-0/+1
The clock binding documents PCIe clock for a long time already. Add clock phande into the PCIe node. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-02-28arm64: dts: ti: Add support for AM62-SKNishanth Menon2-0/+208
AM62 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM625 SoC. It supports the following interfaces: * 2 GB DDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode * x1 HDMI Port with audio + x1 OLDI/LVDS Display interface for Dual Display * x1 Headphone Jack * x1 USB2.0 Hub with two Type A host and x1 USB Type-C DRP Port * x1 UHS-1 capable µSD card slot * 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837 * 512 Mbit OSPI flash * x4 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin User Expansion Connector * 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO) * 20-pin header for Programmable Realtime Unit (PRU) IO pins * 15-pin CSI header Add basic support for AM62-SK. Schematics: https://www.ti.com/lit/zip/sprr448 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220225120239.1303821-6-vigneshr@ti.com
2022-02-28arm64: dts: ti: Introduce base support for AM62x SoCVignesh Raghavendra5-0/+552
This add bare minimum DT for AM62 describing ARM compute clusters, Main, MCU and Wakeup domain and interconnects, UARTs and I2Cs to enable booting using ramdisk. Hierarchy of dts files: am62.dtsi: base SoC skeleton which is common across am62xx family of SoCs, includes am62-main.dtsi, am62-mcu.dtsi and am62-wakeup.dtsi representing 3 domains and peripherals in each of these domain am625.dtsi: describes CPU cluster (Quad A53s). Since, am625 is a current superset device with all peripherals, am625.dtsi includes am62.dtsi completing SoC definition. Individual EVMs using this SoC will just need to include am625.dtsi thus making things easier for Board and SOM Vendors. Future derivative SoCs will have their own am62{1-9}{1-9}.dtsi overriding cluster / peripheral definitions with their own compatibles. More details about the SoCs can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Co-developed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Co-developed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220225120239.1303821-5-vigneshr@ti.com
2022-02-28dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62Suman Anna1-0/+3
Add pinctrl macros for AM62x SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220225120239.1303821-4-vigneshr@ti.com
2022-02-28dt-bindings: arm: ti: Add bindings for AM625 SoCNishanth Menon1-0/+6
The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC architecture platform, providing ultra-low-power modes, dual display, multi-sensor edge compute, security and other BOM-saving integration. The AM62 SoC targets broad market to enable applications such as Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building Automation, Appliances and more. Some highlights of this SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Pin-to-pin compatible options for single and quad core are available. * Cortex-M4F for general-purpose or safety usage. * Dual display support, providing 24-bit RBG parallel interface and OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display resolution. * Selectable GPUsupport, up to 8GFLOPS, providing better user experience in 3D graphic display case and Android. * PRU(Programmable Realtime Unit) support for customized programmable interfaces/IOs. * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized System Controller for Security, Power, and Resource Management. * Multiple low power modes support, ex: Deep sleep,Standby, MCU-only, enabling battery powered system design. AM625 is the first device of the family. Add DT bindings for the same. More details can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220225120239.1303821-3-vigneshr@ti.com
2022-02-28arm64: dts: mt8192: Add watchdog nodeAllen-KH Cheng1-0/+6
Add watchdog device node to MT8192 SoC. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220207094024.22674-1-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28ARM: dts: aspeed: p10bmc: Enable ftrace in ramoops bufferEddie James2-2/+4
Increase the size of the buffer and set the ftrace-size property in order to collect event tracing during a crash. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20211202224525.29178-1-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28ARM: dts: aspeed: everest: Add RTC battery gpio nameJoel Stanley1-3/+1
This is the documented name used for OpenBMC systems: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#rtc-battery-voltage-read-enable Link: https://lore.kernel.org/r/20220222041559.68651-3-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28ARM: dts: aspeed: rainer: Add RTC battery gpio nameJoel Stanley1-1/+1
This is the documented name used for OpenBMC systems: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#rtc-battery-voltage-read-enable Link: https://lore.kernel.org/r/20220222041559.68651-2-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28ARM: dts: aspeed: Add ASRock ROMED8HM3 BMCZev Weiss2-0/+260
This is a half-width, single-socket Epyc server board with an AST2500 BMC. This device tree is sufficient for basic OpenBMC functionality, but we'll need to add a few more devices (as driver support becomes available) before it's fully usable. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220105101719.7093-1-zev@bewilderbeest.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28ARM: dts: aspeed: rainier: Remove SPI NOR controllersJoel Stanley1-24/+0
Early Rainier builds had SPI NOR as a fallback boot device when eMMC was not programmed. Most systems don't have the NOR populated, so remove it from the device tree as it is not used. Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220120063307.63898-1-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28ARM: dts: aspeed: mtjade: Move all adc sensors into iio-hwmon nodeQuan Nguyen1-11/+2
Move adc14 and adc15 (battery sensor) into single iio-hwmon node to correct label to be read by single application for all adc sensors. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220228000242.1884-6-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28ARM: dts: aspeed: mtjade: Rename GPIO hog nodes to match schema.Quan Nguyen1-1/+1
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to the DT schema. Rename the node to pass dtbs_check. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220228000242.1884-5-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28ARM: dts: aspeed: mtjade: Update host0-ready pinQuan Nguyen1-1/+1
Update the input GPIO that indicates Host ready. Link: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#host-ready Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220228000242.1884-4-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
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