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2020-12-04MIPS: Don't round up kernel sections size for memblock_add()Alexander Sverdlin1-2/+2
Linux doesn't own the memory immediately after the kernel image. On Octeon bootloader places a shared structure right close after the kernel _end, refer to "struct cvmx_bootinfo *octeon_bootinfo" in cavium-octeon/setup.c. If check_kernel_sections_mem() rounds the PFNs up, first memblock_alloc() inside early_init_dt_alloc_memory_arch() <= device_tree_init() returns memory block overlapping with the above octeon_bootinfo structure, which is being overwritten afterwards. Fixes: a94e4f24ec83 ("MIPS: init: Drop boot_mem_map") Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-12-04MIPS: Enable GCOVXingxing Su2-0/+2
Enable gcov profiling of the entire kernel on mips. Required changes include disabling profiling for: * arch/kernel/boot/compressed: not linked to main kernel. Lightly tested on Loongson 3A3000 an 3A4000, seems to work as expected. without "GCOV_PROFILE := n" in compressed Makefile, build errors as follows: ... ld: arch/mips/boot/compressed/string.o:(.data+0x88): undefined reference to `__gcov_merge_add' ld: arch/mips/boot/compressed/string.o: in function `_GLOBAL__sub_I_00100_0_memcpy': string.c:(.text.startup+0x4): undefined reference to `__gcov_init' ld: arch/mips/boot/compressed/string.o: in function `_GLOBAL__sub_D_00100_1_memcpy': string.c:(.text.exit+0x0): undefined reference to `__gcov_exit' ... Signed-off-by: Youling Tang <tangyouling@loongson.cn> Signed-off-by: Xingxing Su <suxingxing@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-12-04MIPS: configs: drop unused BACKLIGHT_GENERIC optionAndrey Zhizhikin6-6/+0
Commit 7ecdea4a0226 ("backlight: generic_bl: Remove this driver as it is unused") removed geenric_bl driver from the tree, together with corresponding config option. Remove BACKLIGHT_GENERIC config item from all MIPS configurations. Fixes: 7ecdea4a0226 ("backlight: generic_bl: Remove this driver as it is unused") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Daniel Thompson <daniel.thompson@linaro.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-27MIPS: Loongson64: Fix up reserving kernel memory rangeJinyang He1-2/+5
Reserve memory from &_text to &_end. Otherwise if kernel address was modified, the memory range of start_pfn to kernel_start_pfn would be reserved. Then we could not use this range. Signed-off-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-27MIPS: mm: Remove unused is_aligned_hugepage_rangeThomas Bogendoerfer1-12/+0
Function is_aligned_hugepage_range is no longer needed. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-27MIPS: No need to check CPU 0 in {loongson3,bmips,octeon}_cpu_disable()Tiezhu Yang3-9/+0
After commit 9cce844abf07 ("MIPS: CPU#0 is not hotpluggable"), c->hotpluggable is 0 for CPU 0 and it will not generate a control file in sysfs for this CPU: [root@linux loongson]# cat /sys/devices/system/cpu/cpu0/online cat: /sys/devices/system/cpu/cpu0/online: No such file or directory [root@linux loongson]# echo 0 > /sys/devices/system/cpu/cpu0/online bash: /sys/devices/system/cpu/cpu0/online: Permission denied So no need to check CPU 0 in {loongson3,bmips,octeon}_cpu_disable(), just remove them. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-27mips: cdmm: fix use-after-free in mips_cdmm_bus_discoverQinglang Miao1-3/+1
kfree(dev) has been called inside put_device so anther kfree would cause a use-after-free bug/ Fixes: 8286ae03308c ("MIPS: Add CDMM bus support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-27MIPS: Loongson64: Add KASLR supportJinyang He2-1/+11
Provide a weak plat_get_fdt() in relocate.c in case some platform enable USE_OF while plat_get_fdt() is useless. 1MB RELOCATION_TABLE_SIZE is small for Loongson64 because too many instructions should be relocated. 2MB is enough in present. Add KASLR support for Loongson64. KASLR(kernel address space layout randomization) To enable KASLR on Loongson64: First, make loongson3_defconfig. Then, enable CONFIG_RELOCATABLE and CONFIG_RANDOMIZE_BASE. Finally, compile the kernel. To test KASLR on Loongson64: Start machine with KASLR kernel. The first time: # cat /proc/iomem 00200000-0effffff : System RAM 02f30000-03895e9f : Kernel code 03895ea0-03bc7fff : Kernel data 03e30000-04f43f7f : Kernel bss The second time: # cat /proc/iomem 00200000-0effffff : System RAM 022f0000-02c55e9f : Kernel code 02c55ea0-02f87fff : Kernel data 031f0000-04303f7f : Kernel bss We see that code, data and bss sections become randomize. Signed-off-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-27MIPS: KASLR: Correct valid bits in apply_r_mips_26_rel()Jinyang He1-2/+2
Apply_r_mips_26_rel() relocates instructions like j, jal and etc. These instructions consist of 6bits function field and 26bits address field. The value of target_addr as follows, ================================================================= | high 4bits | low 28bits | ================================================================= |the high 4bits of this PC | the low 26bits of instructions << 2| ================================================================= Thus, loc_orig and log_new both need high 4bits rather than high 6bits. Signed-off-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-19MIPS: Loongson64: Fix wrong scache size when execute lscpuTiezhu Yang1-6/+4
As the user manual and code comment said, Loongson-3 has 4-scache banks, while Loongson-2K has only 2 banks, so we should multiply the number of scache banks, this multiply operation should be done by c->scache.sets instead of scache_size, otherwise we will get the wrong scache size when execute lscpu. For example, the scache size should be 8192K instead of 2048K on the Loongson 3A3000 and 3A4000 platform, we can see the related info in the following boot message: [loongson@linux ~]$ dmesg | grep "Unified secondary cache" [ 0.000000] Unified secondary cache 8192kB 16-way, linesize 64 bytes. [ 4.061909] Unified secondary cache 8192kB 16-way, linesize 64 bytes. [ 4.125629] Unified secondary cache 8192kB 16-way, linesize 64 bytes. [ 4.188379] Unified secondary cache 8192kB 16-way, linesize 64 bytes. E.g. without this patch: [loongson@linux ~]$ cat /sys/devices/system/cpu/cpu*/cache/index2/size 2048K 2048K 2048K 2048K [loongson@linux ~]$ lscpu | grep "L2 cache" L2 cache: 2048K With this patch: [loongson@linux ~]$ cat /sys/devices/system/cpu/cpu*/cache/index2/size 8192K 8192K 8192K 8192K [loongson@linux ~]$ lscpu | grep "L2 cache" L2 cache: 8192K Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-19MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()Tiezhu Yang2-12/+0
Since commit 02cf2119684e ("Cleanup the mess in cpu_cache_init."), cpu_has_6k_cache and cpu_has_8k_cache have no user, r6k_cache_init() and r8k_cache_init() are not defined for over 15 years, just remove them. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-19MIPS: mm: Clean up setup of protection mapThomas Bogendoerfer2-45/+18
Protection map difference between RIXI and non RIXI cpus is _PAGE_NO_EXEC and _PAGE_NO_READ usage. Both already take care of cpu_has_rixi while setting up the page bits. So we just need one setup of protection map and can drop the now unused (and broken for RIXI) PAGE_* defines. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-19MIPS: mm: shorten lines by using macroThomas Bogendoerfer1-17/+21
Introduce helper macro to make lines shorter. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-19MIPS: kvm: Use vm_get_page_prot to get protection bitsThomas Bogendoerfer1-1/+3
MIPS protection bits are setup during runtime so using defines like PAGE_SHARED ignores this runtime changes. Using vm_get_page_prot to get correct page protection fixes this. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-19MIPS: vdso: Use vma page protection for remappingThomas Bogendoerfer1-2/+2
MIPS protection bits are setup during runtime so using defines like PAGE_READONLY ignores these runtime changes. To fix this we simply use the page protection of the setup vma. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>