| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-03-29 | clk: zynq: trivial warning fix |   Shubhrajyoti Datta | 1 | -0/+1 |
| 2022-03-25 | clk: Drop the rate range on clk_put() |   Maxime Ripard | 2 | -14/+136 |
| 2022-03-25 | clk: test: Test clk_set_rate_range on orphan mux | Maxime Ripard | 1 | -0/+105 |
| 2022-03-25 | clk: Initialize orphan req_rate | Maxime Ripard | 1 | -0/+13 |
| 2022-03-24 | dt-bindings: clock: drop useless consumer example |   Krzysztof Kozlowski | 16 | -143/+0 |
| 2022-03-24 | dt-bindings: clock: renesas: Make example 'clocks' parsable |   Rob Herring | 1 | -0/+12 |
| 2022-03-24 | clk: qcom: gcc-msm8994: Fix gpll4 width |   Konrad Dybcio | 1 | -0/+1 |
| 2022-03-24 | dt-bindings: clock: fix dt_binding_check error for qcom,gcc-other.yaml |   Ansuel Smith | 1 | -1/+1 |
| 2022-03-18 | clk: rs9: Add Renesas 9-series PCIe clock generator driver |   Marek Vasut | 3 | -0/+332 |
| 2022-03-18 | clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index() | Marek Vasut | 2 | -0/+25 |
| 2022-03-17 | clk: visconti: prevent array overflow in visconti_clk_register_gates() |   Dan Carpenter | 3 | -2/+5 |
 |
index : wireguard-linux | |
| WireGuard for the Linux kernel | Jason A. Donenfeld |
| aboutsummaryrefslogtreecommitdiffstatshomepage |