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2023-08-13riscv: dts: allwinner: d1: Add CAN controller nodesJohn Watts1-0/+34
The Allwinner D1, T113 provide two CAN controllers that are variants of the R40 controller. I have tested support for these controllers on two boards: - A Lichee Panel RV 86 Panel running a D1 chip - A Mango Pi MQ Dual running a T113-s3 chip Both of these fully support both CAN controllers. Signed-off-by: John Watts <contact@jookia.org> Link: https://lore.kernel.org/r/20230807191952.2019208-1-contact@jookia.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2023-08-12ARM: dts: marvell: dove: drop incorrect reg in fixed regulatorsKrzysztof Kozlowski4-64/+42
Fixed regulators are not in some bus and bindings do not allow a "reg" property. Move them out of "regulators" node to top-level. dove-cubox.dtb: regulator@1: Unevaluated properties are not allowed ('reg' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-08-12ARM: dts: marvell: armada: drop incorrect reg in fixed regulatorsKrzysztof Kozlowski7-220/+179
Fixed regulators are not in some bus and bindings do not allow a "reg" property. Move them out of "regulators" node to top-level. armada-370-dlink-dns327l.dtb: regulator@1: Unevaluated properties are not allowed ('reg' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-08-12ARM: dts: nuvoton: Fix pca954x i2c-mux node namesGeert Uytterhoeven4-15/+15
"make dtbs_check": arch/arm/boot/dts/nuvoton-npcm730-gbs.dtb: i2c-switch@71: $nodename:0: 'i2c-switch@71' does not match '^(i2c-?)?mux' From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml ... Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus multiplexer/switch DT bindings and the Generic Names Recommendation in the Devicetree Specification. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: aspeed: Fix pca954x i2c-mux node namesGeert Uytterhoeven23-136/+136
"make dtbs_check": arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dtb: i2c-switch@70: $nodename:0: 'i2c-switch@70' does not match '^(i2c-?)?mux' From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml arm/boot/dts/aspeed-bmc-bytedance-g220a.dtb: i2c-switch@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 'i2c@3' were unexpected) From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml ... Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus multiplexer/switch DT bindings and the Generic Names Recommendation in the Devicetree Specification. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: nspire: Remove file name from the files themselvesAndrew Davis5-10/+3
File names inside the file does not add much and just makes it difficult to move the files, often the file name is not updated and becomes wrong. Remove them. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: nspire: Use MATRIX_KEY macro for linux,keymapAndrew Davis3-66/+204
This looks better and allows us to see the row and column numbers more easily. Switch to this macro here. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: nspire: Fix uart node to conform with DT bindingAndrew Davis1-1/+1
This node does not follow the DT binding schema, correct this. The arm,pl011 binding requires the first clock to be named "uartclk". Should result in no functional change. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: nspire: Fix vbus_reg node to conform with DT bindingAndrew Davis1-1/+0
This node does not follow the DT binding schema, correct this. All "regulator-fixed" are voltage type, so drop "regulator-type". Should result in no functional change. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: nspire: Fix sram node to conform with DT bindingAndrew Davis1-2/+9
This node does not follow the DT binding schema, correct this. Should result in no functional change. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: nspire: Fix cpu node to conform with DT bindingAndrew Davis1-0/+5
This node does not follow the DT binding schema, correct this. Should result in no functional change. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: nspire: Use syscon-reboot to handle restartAndrew Davis1-0/+7
Writing this bit can be handled by the syscon-reboot driver. Add this node to DT. Signed-off-by: Andrew Davis <afd@ti.com> Tested-by: Fabian Vogt <fabian@ritter-vogt.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Fabian Vogt <fabian@ritter-vogt.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12arm64: dts: mediatek: Fix "status" valuesRob Herring1-2/+2
The defined value for "status" is "disabled", not "disable". Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230804225813.12493-1-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12ARM: dts: st: spear: split interrupts per cellsKrzysztof Kozlowski2-16/+16
Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20230730111536.98164-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-10ARM: dts: aspeed: Add AST2600 I3C control pinsDylan Hung1-0/+10
Add pinctrl support for the I3C1 and I3C2 pins. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au> Link: https://lore.kernel.org/r/20230809134413.3614535-1-dylan_hung@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: everest: Move common devices upJoel Stanley1-71/+70
Other systems have the SoC devices listed before the FSI description. Move them up in order to make them similar. Link: https://lore.kernel.org/r/20230809074921.116987-6-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: everest: Reorganise FSI descriptionEddie James1-627/+921
Use the P10 quad FSI CFAM description to reduce duplication and add the I2C responders and associated engines. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20230809074921.116987-5-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: rainier: Reorganise FSI descriptionJoel Stanley1-676/+2
Use the P10 quad FSI CFAM description to reduce duplication. Link: https://lore.kernel.org/r/20230809074921.116987-4-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: bonnell: Reorganise FSI descriptionJoel Stanley1-354/+30
Use the P10 dual FSI CFAM description to reduce duplication. Link: https://lore.kernel.org/r/20230809074921.116987-3-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: Add P10 FSI descriptionsEddie James2-0/+1685
These will be used by BMCs attached to a IBM Power10 server CPU. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20230809074921.116987-2-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMCDelphine CC Chiu2-0/+625
Add linux device tree entry for Yosemite 4 devices connected to BMC. The Yosemite 4 is a Meta multi-node server platform, based on AST2600 SoC. Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20230810070032.335161-3-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10dt-bindings: arm: aspeed: add Facebook Yosemite 4 boardDelphine CC Chiu1-0/+1
Document the new compatibles used on Facebook Yosemite 4. Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230810070032.335161-2-Delphine_CC_Chiu@wiwynn.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: wedge400: Set eMMC max frequencyTao Ren1-0/+1
Set eMMC max frequency to 25MHz to prevent intermittent eMMC access failures. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20230803230324.731268-4-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: wedge400: Enable more ADC channelsTao Ren1-1/+2
Enable ASPEED-ADC channels 5-8 to support voltage monitoring of all the Wedge400 hardware revisions. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20230803230324.731268-3-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: Update spi alias in Facebook AST2500 Common dtsiTao Ren1-0/+4
Set FMC controller to "spi0" in ast2500-facebook-netbmc-common.dtsi so the spi bus is consistent with the flash labels defined in flash layout. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20230803230324.731268-2-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: rainier: Remove TPM deviceLakshmi Yadlapati1-5/+0
TPM is disabled in Rainier, remove TPM device. Signed-off-by: Lakshmi Yadlapati <lakshmiy@us.ibm.com> Link: https://lore.kernel.org/r/20230725141606.1641080-2-lakshmiy@us.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: Add AST2600 VUARTsJoel Stanley1-0/+20
The AST2600 has two more vuarts, placed between the existing two in the memory map. Link: https://lore.kernel.org/r/20230620042257.73665-1-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: mtmitchell: Add MCTPChanh Nguyen1-0/+9
Enable MCTP driver on I2C3 bus for MCTP transaction Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20230620092537.20007-4-chanh@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: mtmitchell: Update ADC sensors for Mt.Mitchell DVT systemsChanh Nguyen1-41/+66
Change to use I2C ADC controller (ltc2497) for Mt.Mitchell DVT and later hardware. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20230620092537.20007-3-chanh@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10ARM: dts: aspeed: mtmitchell: Enable the BMC UART8 and UART9Chanh Nguyen1-0/+13
The BMC UART8 and UART9 were connected to the Secpro and Mpro console of socket S1 on the Mt.Mitchell system. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Link: https://lore.kernel.org/r/20230620092537.20007-2-chanh@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-09riscv: dts: starfive - Add hwrng node for JH7110 SoCJia Jie Ho1-0/+10
Add hardware rng controller node for StarFive JH7110 SoC. Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com> Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-08-09riscv: dts: starfive - Add crypto and DMA node for JH7110Jia Jie Ho1-0/+27
Add hardware crypto module and dedicated dma controller node to StarFive JH7110 SoC. Co-developed-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-08-09riscv: dts: starfive: Add mmc nodes on VisionFive 2 boardWilliam Qiu2-0/+128
Add the mmc nodes for the StarFive JH7110 SoC. Set mmc0 node to emmc and set mmc1 node to sd. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-08-09riscv: dts: starfive: enable DCDC1&ALDO4 node in axp15060William Qiu1-0/+16
Enable DCDC1 node for vmmc-supply and enable ALDO4 node for vqmmc-supply. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-08-06arm64: dts: exynos: exynos5433-tm2: drop redundant status=okayKrzysztof Kozlowski1-1/+0
status=okay is by default. Link: https://lore.kernel.org/r/20230731090821.104733-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-08-06arm: dts: Enable device-tree overlay support for sun8i-h3 pi devicesFelix Moessbauer1-0/+19
Add the '-@' DTC option for the sun8i-h3 pi-class devices. This option populates the '__symbols__' node that contains all the necessary symbols for supporting device-tree overlays (for instance from the firmware or the bootloader) on these devices. These devices allow various modules to be connected and this enables users to create out-of-tree device-tree overlays for these modules. Please note that this change does increase the size of the resulting DTB by ~30%. For example, with v6.4 increase in size is as follows: 22909 -> 29564 sun8i-h3-orangepi-lite.dtb 24214 -> 30935 sun8i-h3-bananapi-m2-plus.dtb 23915 -> 30664 sun8i-h3-nanopi-m1-plus.dtb 22969 -> 29537 sun8i-h3-nanopi-m1.dtb 24157 -> 30836 sun8i-h3-nanopi-duo2.dtb 24110 -> 30845 sun8i-h3-orangepi-plus2e.dtb 23472 -> 30037 sun8i-h3-orangepi-one.dtb 24600 -> 31410 sun8i-h3-orangepi-plus.dtb 23618 -> 30230 sun8i-h3-orangepi-2.dtb 22170 -> 28548 sun8i-h3-orangepi-zero-plus2.dtb 23258 -> 29795 sun8i-h3-nanopi-neo-air.dtb 23113 -> 29699 sun8i-h3-zeropi.dtb 22803 -> 29270 sun8i-h3-nanopi-neo.dtb 24674 -> 31318 sun8i-h3-nanopi-r1.dtb 23477 -> 30038 sun8i-h3-orangepi-pc.dtb 24622 -> 31380 sun8i-h3-bananapi-m2-plus-v1.2.dtb 23750 -> 30366 sun8i-h3-orangepi-pc-plus.dtb Signed-off-by: Felix Moessbauer <felix.moessbauer@siemens.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230627133703.355893-1-felix.moessbauer@siemens.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-06arm64: dts: allwinner: h616: Add OrangePi Zero 3 board supportAndre Przywara2-0/+95
The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC, which seems to be just an H616 with more L2 cache. The board itself is a slightly updated version of the Orange Pi Zero 2. It features: - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU - 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2) - AXP313a PMIC (more capable AXP305 on the Zero2) - Raspberry-Pi-1 compatible GPIO header - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports - 1 USB 2.0 host port - 1 USB 2.0 type C port (power supply + OTG) - MicroSD slot - on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2) - 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2) - micro-HDMI port - (yet) unsupported Allwinner WiFi/BT chip Add the devicetree file describing the currently supported features, namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at the moment, though the basic functionality works. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230804170856.1237202-4-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-06dt-bindings: arm: sunxi: document Orange Pi Zero 3 board nameAndre Przywara1-0/+5
The Orange Pi Zero 3 board is an updated version of the Zero 2 board. It uses a SoC called H618, which just seems to be an H616 with more L2 cache. Add the board/SoC compatible string pair to the list of known boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230804170856.1237202-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-06arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DTAndre Przywara2-118/+135
The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some DT nodes with the Zero 2, but comes with a different PMIC. Move the common parts (except the PMIC) into a new shared file, and include that from the existing board .dts file. No functional change, the generated DTB is the same, except for some phandle numbering differences. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230804170856.1237202-2-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-08-05riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoCWilliam Qiu2-0/+55
Add the quad spi controller node for the StarFive JH7110 SoC. Co-developed-by: Ziv Xu <ziv.xu@starfivetech.com> Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com> Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-08-04ARM: dts: at91: remove duplicated entriesClaudiu Beznea1-14/+1
Remove duplicated DTC_FLAGS_<board> := -@ entries which intends to enable the building of device tree overlays. Commit 724ba6751532 ("ARM: dts: Move .dts files to vendor sub-directories") added those entries at the beginning of file w/o removing the already available entries spread though file. Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230721053918.33944-1-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-08-03arm64: dts: hi3798cv200: Fix clocks order of sd0David Yang1-2/+2
"ciu" and "biu" were incorrectly swapped. Fix their order. Signed-off-by: David Yang <mmyangfl@gmail.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2023-08-02ARM: dts: microchip: split interrupts per cellsKrzysztof Kozlowski4-35/+35
Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230730111542.98238-1-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31arm64: dts: amlogic: drop cooling-[min|max]-state from pwm-fanNeil Armstrong2-4/+0
Drop the invalid cooling-min-state & cooling-max-state from the pwm-fan node defined in the bananapi dtsi and odroid-hc4 DT. Link: https://lore.kernel.org/r/20230706-topic-amlogic-upstream-dt-fixes-take3-v1-3-63ed070eeab2@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: meson-g12-common: change aobus-pinctrl node nameNeil Armstrong1-1/+1
Bindings expects name to be "pinctrl", fix it. Link: https://lore.kernel.org/r/20230706-topic-amlogic-upstream-dt-fixes-take3-v1-2-63ed070eeab2@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: meson-g12b-odroid-n2: fix usb hub hog nameNeil Armstrong1-1/+1
This fixes the following dtschema check error: arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dtb: pinctrl@40: bank@40: Unevaluated properties are not allowed ('hog-0' was unexpected) Link: https://lore.kernel.org/r/20230706-topic-amlogic-upstream-dt-fixes-take3-v1-1-63ed070eeab2@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: drop redundant status=okay in sound nodesKrzysztof Kozlowski34-35/+0
status=okay is by default. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230731093615.148949-1-krzysztof.kozlowski@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: amlogic: meson-g12b-bananapi: switch to enable-gpiosKrzysztof Kozlowski1-1/+1
The recommended name for enable GPIOs property in regulator-gpio is enable-gpios. This is also required by bindings: meson-g12b-bananapi-cm4-cm4io.dtb: regulator-vddio-c: Unevaluated properties are not allowed ('enable-gpio' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230725142703.157547-1-krzysztof.kozlowski@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: add support for C3 power domain controllerXianwei Zhao1-0/+9
Enable power domain controller for Amlogic C3 SoC Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230707003710.2667989-5-xianwei.zhao@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-07-31arm64: dts: Add gpio_intc node and pinctrl node for Amlogic C3 SoCsHuqiang Qin1-0/+26
Add gpio interrupt controller device and pinctrl device. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Link: https://lore.kernel.org/r/20230720114639.833436-1-huqiang.qin@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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