aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/tools/perf/scripts/python/export-to-postgresql.py (unfollow)
AgeCommit message (Collapse)AuthorFilesLines
2021-04-19arm64: dts: qcom: sc7180: Update iommu property for simultaneous playbackV Sujith Kumar Reddy1-1/+2
Update iommu property in lpass cpu node for supporting simultaneous playback on headset and speaker. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Link: https://lore.kernel.org/r/20210406163330.11996-1-srivasam@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-19arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound modelDouglas Anderson1-0/+7
Match what's downstream for this board. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Cc: Ajit Pandey <ajitp@codeaurora.org> Cc: Judy Hsiao <judyhsiao@chromium.org> Cc: Cheng-Yi Chiang <cychiang@chromium.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210315133924.v2.2.If218189eff613a6c48ba12d75fad992377d8f181@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-19arm64: dts: qcom: sc7180: coachz: Add "dmic_clk_en"Douglas Anderson2-13/+16
This was present downstream. Add upstream too. NOTE: upstream I managed to get some sort of halfway state and got one pinctrl entry in the coachz-r1 device tree. Remove that as part of this since it's now in the dtsi. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Cc: Ajit Pandey <ajitp@codeaurora.org> Cc: Judy Hsiao <judyhsiao@chromium.org> Cc: Cheng-Yi Chiang <cychiang@chromium.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210315133924.v2.1.I601a051cad7cfd0923e55b69ef7e5748910a6096@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-19ARM: dts: mstar: Add a dts for M5Stack UnitV2Daniel Palmer2-0/+26
M5Stack are releasing a new widget based on the SigmaStar SSD202D. We have some support for the SSD202D so lets add a dts for it. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://m5stack-store.myshopify.com/products/unitv2-ai-camera-gc2145 Link: https://lore.kernel.org/r/20210417011015.2105280-4-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19dt-bindings: arm: mstar: Add compatible for M5Stack UnitV2Daniel Palmer1-0/+1
Add a compatible for the M5Stack UnitV2 that is based on the SigmaStar SSD202D (inifinity2m). Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20210417011015.2105280-3-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19dt-bindings: vendor-prefixes: Add vendor prefix for M5StackDaniel Palmer1-0/+2
M5Stack make various modules for STEM, Makers, IoT. Their UnitV2 is based on a SigmaStar SSD202D SoC which we already have some minimal support for so add a prefix in preparation for UnitV2 board support. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://m5stack.com/ Link: https://lore.kernel.org/r/20210417011015.2105280-2-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19arm64: dts: mt8183: fix dtbs_check warningMatthias Brugger1-3/+3
Fix unit names to make dtbs_check happy. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210414144643.17435-2-matthias.bgg@kernel.org Link: https://lore.kernel.org/r/20210416143923.23406-3-matthias.bgg@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-19arm64: dts: mt8183-pumpkin: fix dtbs_check warningMatthias Brugger1-2/+2
Fix unit names to make dtbs_check happy. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210414144643.17435-1-matthias.bgg@kernel.org Link: https://lore.kernel.org/r/20210416143923.23406-2-matthias.bgg@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-16ARM: dts: aspeed: tiogapass: add hotplug controllerPaul Fertser1-0/+5
The ADM1278 IC is accessible on I2C bus and on both Wiwynn and Quanta Tioga Pass implementations a pair of parallel 0.5 mOhm resistors is used for current measurement. Signed-off-by: Paul Fertser <fercerpav@gmail.com> Link: https://lore.kernel.org/r/20210415140521.11352-1-fercerpav@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: amd-ethanolx: Enable all used I2C bussesKonstantin Aladyshev1-0/+30
Enable all I2C busses that are used in AMD EthanolX CRB: i2c0 - APML P0 i2c1 - APML P1 i2c2 - FPGA i2c3 - 24LC128 EEPROM i2c4 - P0 Power regulators i2c5 - P1 Power regulators i2c6 - P0/P1 Thermal diode i2c7 - Thermal Sensors i2c8 - BMC I2C Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Link: https://lore.kernel.org/r/20210415155300.1135-1-aladyshev22@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier: Update to pass 2 hardwareEddie James1-40/+153
Add the muxes present in pass 2 and remove the eeproms that were removed. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier 1S4U: Fix fan nodesEddie James1-1/+1
The 1S4U system populates fans 0, 1, 2, and 4. Update the dts to reflect this. Fixes: 7f03894a6555 ("ARM: dts: aspeed: Add Rainier 1S4U machine") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier: Fix humidity sensor bus addressEddie James1-2/+2
The si7021 was incorrectly placed at 0x20 on i2c bus 7. It is at 0x40. Fixes: 9c44db7096e0 ("ARM: dts: aspeed: rainier: Add i2c devices") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-16ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8Eddie James1-99/+10
The second presence detection PCA9552 was incorrectly added to bus 9. Fixes: 8be44de6f209 ("ARM: dts: aspeed: Rainier: Add presence GPIOs") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-13ARM: dts: qcom: sdx55: add IPA informationAlex Elder1-0/+41
Add IPA-related nodes and definitions to "sdx55.dtsi". The SMP2P nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210409155251.955632-1-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add basic devicetree support for Thundercomm T55Manivannan Sadhasivam2-0/+282
Thundercomm T55 is the development platform based on the Qualcomm SDX55 chipset. This basic support includes support for debug serial, NAND flash, BAM DMA, USB and regulators support. https://www.thundercomm.com/app_en/product/1593506006365532 Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-14-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13dt-bindings: arm: qcom: Add binding for Thundercomm T55 kitManivannan Sadhasivam1-0/+1
Add devicetree binding for Thundercomm T55 Dev kit based on SDX55. Acked-by: Rob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-13-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add basic devicetree support for Telit FN980 TLBManivannan Sadhasivam2-1/+284
Telit FN980 TLB is the development platform based on the Qualcomm SDX55 chipset. This basic support includes support for debug serial, NAND flash, BAM DMA, USB and regulators support. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-12-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13dt-bindings: arm: qcom: Add binding for Telit FN980 TLB boardManivannan Sadhasivam1-0/+1
Add devicetree binding for Telit FN980 TLB board based on SDX55. Acked-by: Rob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-11-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add Modem remoteproc nodeManivannan Sadhasivam1-0/+33
Add modem support to SDX55 using the PAS remoteproc driver. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-16-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: Fix node name for NAND controller nodeManivannan Sadhasivam2-2/+2
Use the common "nand-controller" node name for NAND controller node to fix the `make dtbs_check` validation for Qcom platforms. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-10-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add interconnect nodesManivannan Sadhasivam1-0/+33
Add interconnect nodes for the providers in SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-9-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add SCM nodeManivannan Sadhasivam1-0/+6
Add SCM node to enable SCM functionality on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-8-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13dt-bindings: firmware: scm: Add compatible for SDX55Manivannan Sadhasivam1-0/+1
Add devicetree compatible for SCM present in SDX55 platform. Acked-by: Rob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-7-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add IMEM and PIL info regionManivannan Sadhasivam1-0/+15
Add a simple-mfd representing IMEM on SDX55 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteproc. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add modem SMP2P nodeManivannan Sadhasivam1-0/+31
Add SMP2P nodes for the SDX55 platform to communicate with the modem. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-5-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add CPUFreq supportManivannan Sadhasivam1-0/+29
Add CPUFreq support to SDX55 platform using the cpufreq-dt driver. There is no dedicated hardware block available on this platform to carry on the CPUFreq duties. Hence, it is accomplished using the CPU clock and regulators tied together by the operating points table. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add support for APCS blockManivannan Sadhasivam1-0/+9
The APCS block on SDX55 acts as a mailbox controller and also provides clock output for the Cortex A7 CPU. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-13ARM: dts: qcom: sdx55: Add support for A7 PLL clockManivannan Sadhasivam1-0/+8
On SDX55 there is a separate A7 PLL which is used to provide high frequency clock to the Cortex A7 CPU via a MUX. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-12ARM: dts: at91: sama5d2/trivial: fix letter case for etm hex addressNicolas Ferre1-2/+2
Fix the etm node hex address to lower case for matching regexp specification and removing the additional warning that looks like: arch/arm/boot/dts/at91-sama5d2_ptc_ek.dt.yaml: /: 'etm@73C000' does not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' Reported-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-11arm64: dts: rockchip: move mmc aliases to board dts on rk3399Heiko Stuebner23-3/+112
As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-7-heiko@sntech.de
2021-04-11arm64: dts: rockchip: move mmc aliases to board dts on rk3368Heiko Stuebner8-3/+31
As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-6-heiko@sntech.de
2021-04-11arm64: dts: rockchip: move mmc aliases to board dts on rk3328Heiko Stuebner8-3/+36
As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-5-heiko@sntech.de
2021-04-11arm64: dts: rockchip: move mmc aliases to board dts on rk3308Heiko Stuebner2-3/+6
As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-4-heiko@sntech.de
2021-04-11arm64: dts: rockchip: move mmc aliases to board dts on px30Heiko Stuebner5-3/+19
As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. For the Engicam-boards this means a split as the core boards contains the emmc while the commit baseboard handles sdmmc and sdio. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-3-heiko@sntech.de
2021-04-11ARM: dts: rockchip: move rv1108 mmcx aliases to board dts filesHeiko Stuebner3-3/+8
As suggested by Arnd Bergmann, mmc-aliases are supposed to be board-specific, so move the newly added general aliases to the board-level on rv1108-based boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-2-heiko@sntech.de
2021-04-11ARM: dts: rockchip: move rk322x mmcx aliases to board dts filesHeiko Stuebner4-3/+14
As suggested by Arnd Bergmann, mmc-aliases are supposed to be board-specific, so move the newly added general aliases to the board-level on rk322x-based boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-1-heiko@sntech.de
2021-04-09ARM: dts: clps711x: fix missing interrupt parentArnd Bergmann1-0/+1
The kernelci.org bot reports a build time regression: arch/arm/boot/dts/ep7209.dtsi:187.17-192.4: Warning (interrupts_property): /keypad: Missing interrupt-parent There is only one interrupt controller in this SoC, so I assume this is the parent. Fixes: 2bd86203acf3 ("ARM: dts: clps711x: Add keypad node") Reported-by: kernelci.org bot <bot@kernelci.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09ARM: dts: mvebu: fix SPI device nodeArnd Bergmann1-1/+1
dtc warns about a mismatched address: arch/arm/boot/dts/armada-385-atl-x530.dts:171.14-199.4: Warning (spi_bus_reg): /soc/spi@10680/spi-flash@0: SPI bus unit address format error, expected "1" I assume the "reg" property is correct here, so adjust the unit address accordingly. Fixes: c6dfc019c239 ("ARM: dts: mvebu: Add device tree for ATL-x530 Board") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: kernelci.org bot <bot@kernelci.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08ARM: dts: owl-s500-roseapplepi: Add ATC2603C PMICCristian Ciocaltea1-6/+126
Add device tree node for ATC2603C PMIC and remove the 'fixed-3.1V' dummy regulator used for the uSD supply. Additionally, add 'SYSPWR' fixed regulator and provide cpu0 supply. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://lore.kernel.org/r/2e0a2931ae3757f016948e7c78e8e54afa325ae0.1615538629.git.cristian.ciocaltea@gmail.com Link: https://lore.kernel.org/r/20210408062232.3575-1-mani@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08arm64: dts: qcom: update usb qmp phy clock-cells propertyJonathan Marek3-5/+6
The top-level node doesn't provide any clocks, the subnode provides a single clock with of_clk_hw_simple_get. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20201123143705.14277-1-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-08arm64: dts: qcom: msm8916: Add GICv2 hypervisor registers/interruptStephan Gerhold1-1/+3
The ARM Cortex-A53 CPU cores and QGIC2 interrupt controller (an implementation of the ARM GIC 2.0 specification) used in MSM8916 support virtualization, e.g. for KVM on Linux. However, so far it was not possible to make use of this functionality, because Qualcomm's proprietary "hyp" firmware blocks the EL2 mode of the CPU and only allows booting Linux in EL1. However, on devices without (firmware) secure boot there is no need to rely on all of Qualcomm's firmware. The "hyp" firmware on MSM8916 seems simple enough that it can be replaced with an open-source alternative created only based on trial and error - with some similar EL2/EL1 initialization code adapted from Linux and U-Boot. qhypstub [1] is such an open-source firmware for MSM8916 that can be used as drop-in replacement for Qualcomm's "hyp" firmware. It does not implement any hypervisor functionality. Instead, it allows booting Linux/KVM (or other hypervisors) in EL2. With Linux booting in EL2, KVM seems to be working just fine on MSM8916. However, so far it is not possible to make use of the virtualization features in the GICv2. To use KVM's VGICv2 code, the QGIC2 device tree node needs additional resources (according to binding documentation): - The CPU interface region (second reg) must be at least 8 KiB large to access the GICC_DIR register (mapped at 0x1000 offset) - Virtual control/CPU interface register base and size - Hypervisor maintenance interrupt Fortunately, the public APQ8016E TRM [2] provides the required information: - The CPU interface region (at 0x0B002000) actually has a size of 8 KiB - Virtual control/CPU interface register is at 0x0B001000/0x0B004000 - Hypervisor maintenance interrupt is "PPI #0" Note: This is a bit strange since almost all other ARM SoCs use GIC_PPI 9 for this. However, I have verified that this is indeed the interrupt that fires when bits are set in GICH_HCR. Add the additional resources to the QGIC2 device tree node in msm8916.dtsi. There is no functional difference when Linux is started in EL1 since the additional resources are ignored in that case. With these changes (and qhypstub), KVM seems to be fully working on the DragonBoard 410c (apq8016-sbc) and BQ Aquaris X5 (longcheer-l8910). [1]: https://github.com/msm8916-mainline/qhypstub [2]: https://developer.qualcomm.com/download/sd410/snapdragon-410e-technical-reference-manual.pdf Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20210407163648.4708-1-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-08ARM: dts: nuvoton: Add Quanta GBS BMC Device TreeGeorge Hung2-0/+1136
Add the device tree for the Quanta GBS BMC based on NPCM730 SoC. Signed-off-by: George Hung <george.hung@quantatw.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210330071336.18370-1-george.hung@quantatw.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08ARM: dts: aspeed: mihawk: Add GPIO line namesNichole Wang1-0/+33
Name the GPIOs to help userspace work with them. The names describe the functionality the lines provide, not the net or ball name. This makes it easier to share userspace code across different systems and makes the use of the lines more obvious. Signed-off-by: Nichole Wang <Nichole_Wang@wistron.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210330020808.830-1-Nichole_Wang@wistron.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08ARM: dts: aspeed: Add Rainier 1S4U machineEddie James3-1/+16
The 1S4U version of the Rainier system has only 4 fans. Create a new tree, include the 4U version, and delete the 2 extra fans. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20210329150020.13632-23-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08ARM: dts: aspeed: everest: Add size/address cellsJoel Stanley1-0/+4
The gpio and fan nodes reg properties cause dtc to emit a noisy warning about relying on default sizes. Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08ARM: dts: aspeed: everest: Enable fan watchdogEddie James1-0/+14
Set watchdog 1 to pulse the fan watchdog circuit that drives the FAULT pin of the MAX31785, resulting in fans running at full speed, if at any point the BMC stops pulsing it, such as a BMC reboot at runtime. Enable watchdog 2 for BMC reboots. Signed-off-by: Matthew Barth <msbarth@linux.ibm.com> Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20210329150020.13632-21-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08ARM: dts: aspeed: everest: Add RTCEddie James1-0/+5
Add the RTC at the appropriate I2C bus and address. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20210329150020.13632-20-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08ARM: dts: aspeed: everest: GPIOs supportAlpana Kumari1-0/+297
This commit adds support for- - Presence GPIOs - I2C control GPIOs - Op-panel GPIOs (ex PHR) Signed-off-by: Alpana Kumari <alpankum@in.ibm.com> Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Brandon Wyman <bjwyman@gmail.com> Link: https://lore.kernel.org/r/20210329150020.13632-19-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08ARM: dts: aspeed: everest: Add UCD90320 power sequencerJim Wright1-0/+5
Add UCD90320 chip to Everest device tree. Signed-off-by: Jim Wright <jlwright@us.ibm.com> Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20210329150020.13632-18-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.