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2020-09-26arm64: dts: apm: drop unused reg-io-width from DW APB GPIO controllerKrzysztof Kozlowski2-2/+0
The Synopsys DesignWare APB GPIO controller driver does not parse reg-io-width and dtschema does not allow it so drop it to fix dtschema warnings like: arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000: 'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+' Link: https://lore.kernel.org/r/20200917165040.22908-1-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26ARM: dts: picoxcell: drop unused reg-io-width from DW APB GPIO controllerKrzysztof Kozlowski2-2/+0
The Synopsys DesignWare APB GPIO controller driver does not parse reg-io-width and dtschema does not allow it so drop it to fix dtschema warnings like: arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dt.yaml: gpio@20000: 'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+' Link: https://lore.kernel.org/r/20200917164909.22490-1-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-26ARM: dts: picoxcell: build DTBs with make dtbsKrzysztof Kozlowski1-0/+3
Add ARCH_PICOXCELL entries to Makefil so the DTBs get built with `make dtbs`. Link: https://lore.kernel.org/r/20200917163957.21895-1-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-18arm64: tegra: Initial Tegra234 VDK supportThierry Reding6-0/+264
The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It supports a subset of the peripherals that will be available in the final chip and serves as a bootstrapping platform. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18dt-bindings: power: supply: Add device-tree binding for Summit SMB3xxDavid Heidelberg2-0/+171
Summit SMB3xx series is a Programmable Switching Li+ Battery Charger. This patch adds device-tree binding for Summit SMB345, SMB347 and SMB358 chargers. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18dt-bindings: tegra: pmc: Add Tegra234 supportThierry Reding1-1/+2
The PMC found on Tegra234 is mostly similar to the one on Tegra194 but supports slightly different I/O pads and wake events. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18dt-bindings: fuse: tegra: Add Tegra234 supportThierry Reding1-0/+1
The Tegra234 FUSE block is very similar to that on prior chips but not completely compatible. Document the new compatible string. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18dt-bindings: tegra: Add Tegra234 VDK compatibleThierry Reding1-0/+4
The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It supports a subset of the peripherals that will be available in the final chip and serves as a bootstrapping platform. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18dt-bindings: misc: tegra186-misc: Add Tegra234 supportThierry Reding1-0/+1
The MISC block found on Tegra234 is mostly similar to the one on Tegra194 but supports slightly different register sets that make it incompatible. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18dt-bindings: misc: tegra186-misc: Add missing compatible stringThierry Reding1-3/+4
Add the missing compatible string for the Tegra194 MISC block. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18dt-bindings: misc: tegra-apbmisc: Add missing compatible stringsThierry Reding1-5/+8
The compatible string for the Tegra210 APBMISC block was missing from the bindings. Add it and while at it, rewrite the description of the compatible string to make it clearer. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-18arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channelsGeert Uytterhoeven1-3/+2
According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be used with SYS-DMAC0 on R-Car E3. Fixes: 62c0056f1c3eb15d ("arm64: dts: renesas: r8a774c0: Add MSIOF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200917132117.8515-3-geert+renesas@glider.be
2020-09-18arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channelsGeert Uytterhoeven1-3/+2
According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be used with SYS-DMAC0 on R-Car E3. Fixes: 8517042060b55a37 ("arm64: dts: renesas: r8a77990: Add DMA properties to MSIOF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200917132117.8515-2-geert+renesas@glider.be
2020-09-17arm64: tegra: Populate EEPROMs for Jetson Xavier NXJon Hunter2-0/+30
Populate the EEPROMs that are present on the Jetson Xavier NX developer platform. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17arm64: tegra: Add label properties for EEPROMsJon Hunter7-0/+8
Populate the label property for the AT24 EEPROMs on the various Jetson platforms. Note that the name 'module' is used to identify the EEPROM on the processor module board and the name 'system' is used to identify the EEPROM on the main base board (which is sometimes referred to as the carrier board). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-16arm64: dts: sparx5: Add spi-nand devicesLars Povlsen5-0/+67
This patch add spi-nand DT nodes to the applicable Sparx5 boards. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-7-lars.povlsen@microchip.com
2020-09-16arm64: dts: sparx5: Add spi-nor supportLars Povlsen3-0/+80
This add spi-nor device nodes to the Sparx5 reference boards. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-6-lars.povlsen@microchip.com
2020-09-16ARM: dts: at91: sama5d2: add missing flexcom spi node propertiesAlexandre Belloni1-0/+10
SPI nodes require #address-cells and #size-cells add those properties in the flexcom spi nodes. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20200831171129.3886857-8-alexandre.belloni@bootlin.com
2020-09-16ARM: dts: at91: add unit-address to memory nodeAlexandre Belloni51-51/+51
The memory node requires a unit-address, add it. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20200831171129.3886857-7-alexandre.belloni@bootlin.com
2020-09-16ARM: dts: at91: move mmc pinctrl-names property to board dtsAlexandre Belloni20-8/+17
Having the pinctrl-names property in the dtsi leads to dtbs_check warnings when the board dts doesn't define pinctrl-0. Instead, move the property to the board dts actually using the mmc node. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20200831171129.3886857-5-alexandre.belloni@bootlin.com
2020-09-16arm64: dts: sparx5: Add SPI controller and associated mmio-muxLars Povlsen1-0/+30
This adds a SPI controller to the Microchip Sparx5 SoC, as well as the mmio-mux that is required to select the right SPI interface for a given SPI device. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-4-lars.povlsen@microchip.com
2020-09-16MAINTAINERS: Add git tree for Sparx5Lars Povlsen1-0/+1
This adds a git tree for maintaining the Sparx5 SoC from. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200914083257.11080-1-lars.povlsen@microchip.com
2020-09-16arm64: dts: sparx5: Add hwmon temperature sensorLars Povlsen1-0/+7
This adds a hwmon temperature node sensor to the Sparx5 SoC. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200618135951.25441-3-lars.povlsen@microchip.com
2020-09-16arm64: dts: sparx5: Add Sparx5 eMMC supportLars Povlsen4-0/+93
This adds eMMC support to the applicable Sparx5 board configuration files. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200825081357.32354-4-lars.povlsen@microchip.com
2020-09-15arm64: dts: renesas: r8a77990: Add DRIF supportFabrizio Castro1-0/+120
Add the DRIF controller nodes for the r8a77990 (a.k.a. R-Car E3). Please note that R-Car E3 has register BITCTR located at offset 0x80 (this register is not available on the r8a77960 and r8a77951, whose support has already been upstreamed), and even though it is not dealt with just yet within the driver, we have to keep that into account with our device tree nodes. Also, please note that while testing it has emerged that the HW User Manual has the wrong DMA details for DRIF2 and DRIF3 on E3, as they are only allowed SYS-DMAC0 rather than SYS-DMAC1 and SYS-DMAC2. An errata addressing this issue will be available soon. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Link: https://lore.kernel.org/r/20200911121259.5669-1-fabrizio.castro.jz@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DBLad Prabhakar1-0/+11
This patch enables CAN0 interface exposed through connector J4 on the camera DB. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200911083615.17377-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15ARM: dts: r8a7742: Add VSP supportLad Prabhakar1-0/+36
Add VSP support to R8A7742 (RZ/G1H) SoC dtsi. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200911080929.15058-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15arm64: dts: renesas: Drop superfluous pin configuration containersGeert Uytterhoeven2-8/+4
As the pin configuration child nodes for EtherAVB on the Draak and Ebisu boards contain only a single configuration, there is no need to wrap them in additional grandchild containers. Hence remove the superfluous level. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819123910.19606-1-geert+renesas@glider.be
2020-09-14ARM: dts: hisilicon: Fix SP805 clocksAndre Przywara1-2/+3
The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14ARM: dts: hisilicon: Fix SP804 usersAndre Przywara2-12/+22
The SP804 binding only specifies one or three clocks, but does not allow just two clocks. The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave one "apb_pclk" clock-name to appease the primecell bus driver. Extend the clocks by duplicating the first clock to the end of the clock list, and add two dummy clock-names to make the primecell driver happy. I don't know what the real APB clock for the IP is, but with the current DT the first timer clock was used for that, so this change keeps the current status. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14arm64: dts: hisilicon: Fix SP805 clocksAndre Przywara2-6/+9
The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14arm64: dts: hisilicon: replace status value "ok" by "okay"Adrian Schmutzler7-36/+36
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-11ARM: dts: alpine: Align GIC nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: gic@fb001000: $nodename:0: 'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11ARM: dts: zx: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@c00000: $nodename:0: 'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jun Nie <jun.nie@linaro.org>
2020-09-11ARM: dts: tango: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@20100000: $nodename:0: 'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Mans Rullgard <mans@mansr.com>
2020-09-11ARM: dts: spear: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-09-11ARM: dts: qcom: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache@2040000: $nodename:0: 'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11ARM: dts: prima: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@80040000: $nodename:0: 'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Barry Song <baohua@kernel.org>
2020-09-11arm64: dts: alpine: Fix GIC unit addressKrzysztof Kozlowski1-1/+1
Node unit address should be the same as first address appearing in "reg" property. Fixes DTC warning: arch/arm64/boot/dts/al/alpine-v2.dtsi:116.38-126.5: Warning (simple_bus_reg): /soc/interrupt-controller@f0100000: simple-bus unit address format error, expected "f0200000" Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11arm64: dts: alpine: Align GIC nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: gic@f0100000: $nodename:0: 'gic@f0100000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Sound supportKuninori Morimoto1-0/+29
This patch enables HDMI Sound on R-Car M3-W+ Salvator-XS board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87a6y1rtun.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-11arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Display supportKuninori Morimoto1-0/+28
This patch enables HDMI Display on R-Car M3-W+ Salvator-XS board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/87blihrtus.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-11arm64: dts: renesas: r8a77961: Add HDMI device nodesKuninori Morimoto1-1/+11
This patch adds HDMI device nodes for R-Car M3-W+ (r8a77961) SoC. This patch was tested on R-Car M3-W+ Salvator-XS board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/87d02xrtux.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-11arm64: dts: renesas: r8a77961: Add DU device nodesKuninori Morimoto1-1/+12
This patch adds DU device nodes for R-Car M3-W+ (r8a77961) SoC. This patch was tested on R-Car M3-W+ Salvator-XS board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/87eendrtv1.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-11arm64: dts: renesas: r8a77961: Add VSP device nodesKuninori Morimoto1-0/+55
This patch adds VSP device nodes for R-Car M3-W+ (r8a77961) SoC. This patch was tested on R-Car M3-W+ Salvator-XS board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/87lfhm70s6.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-11arm64: dts: renesas: r8a77961: Add FCP device nodesKuninori Morimoto1-0/+52
This patch adds FCP device nodes for R-Car M3-W+ (r8a77961) SoC. This patch was tested on R-Car M3-W+ Salvator-XS board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/87h7s9rtvl.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-11arm64: dts: renesas: Fix pin controller node namesGeert Uytterhoeven12-12/+12
According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112433.5652-1-geert+renesas@glider.be
2020-09-11ARM: dts: renesas: Fix pin controller node namesGeert Uytterhoeven19-19/+19
According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
2020-09-11ARM: dts: aspeed: Add Mowgli BMC platformBen Pai2-0/+663
The Mowgli BMC is an ASPEED ast2500 based BMC that is part of an OpenPower Power9 server. Signed-off-by: Ben Pai <Ben_Pai@wistron.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200909090818.24021-1-ben_pai@wistron.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-10ARM: dts: broadcom: Fix SP804 nodeAndre Przywara1-2/+2
The DT binding for SP804 requires to have an "arm,primecell" compatible string. Add this string so that the Linux primecell bus driver picks the device up and activates the clock. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> [florian: added compatible to ccbtimer1] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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