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2024-10-31mmc: sdhci-uhs2: Remove unnecessary variablesVictor Shih1-25/+0
There are unnecessary variables in the sdhci_uhs2_send_command() that will generate a warning when building the kernel. Let's drop them! Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202410252107.y9EgrTbA-lkp@intel.com/ Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241030112216.4057-2-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-31mmc: sdhci-uhs2: Correct incorrect type in argumentVictor Shih1-1/+2
There is a type issue in the argument in the __sdhci_uhs2_send_command() that will generate a warning when building the kernel. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202410260525.ZUuPhMJz-lkp@intel.com/ Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Message-ID: <20241030112216.4057-1-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-30mmc: sdhci: Make MMC_SDHCI_UHS2 config symbol invisibleGeert Uytterhoeven1-1/+1
There is no need to ask the user about enabling UHS-II support, as all drivers that support UHS2-capable devices already select MMC_SDHCI_UHS2. Hence make the symbol invisible, unless when compile-testing. Fixes: 2af7dd8b64f2fd6a ("mmc: sdhci: add UHS-II module and add a kernel configuration") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Message-ID: <079f2b7473d34895843ad278d79930c681385b2e.1730282633.git.geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-30mmc: sdhci-uhs2: Remove unnecessary NULL checkBen Chuang1-1/+1
The host->ops pointer can't be NULL in sdhci_uhs2_do_detect_init(). Let's drop the redundant check. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202410271835.tqz9s9JV-lkp@intel.com/ Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241030015326.2289070-1-benchuanggli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-30mmc: core: Fix error paths for UHS-II card init and re-initUlf Hansson1-30/+25
The error path didn't manage the removal of the allocated mmc_card correctly. Let's fix this to avoid potential memory leaks. While at it, move the assignment of host->card to slightly later in the init process and drop also a somewhat silly dev_warn() when CMD8 fails. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241029131752.226764-4-ulf.hansson@linaro.org>
2024-10-30mmc: core: Add error handling of sd_uhs2_power_up()Ulf Hansson1-1/+3
In sd_uhs2_reinit() the call to sd_uhs2_power_up() lacks error handling, so let's add it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241029131752.226764-3-ulf.hansson@linaro.org>
2024-10-30mmc: core: Simplify sd_uhs2_power_up()Ulf Hansson1-5/+1
Drop the redundant err-parameter and just return the result from host->ops->uhs2_control() instead. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241029131752.226764-2-ulf.hansson@linaro.org>
2024-10-28mmc: bcm2835: Introduce proper clock handlingStefan Wahren1-11/+18
The custom sdhost controller on BCM2835 is feed by the critical VPU clock. In preparation for PM suspend/resume support, add a proper clock handling to the driver like in the other clock consumers (e.g. I2C). Move the clock handling behind mmc_of_parse(), because it could return with -EPROBE_DEFER and we want to minimize potential clock operation during boot phase. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Message-ID: <20241025103621.4780-5-wahrenst@gmx.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: bcm2835: Fix type of current clock speedStefan Wahren1-1/+1
The type of mmc_ios.clock is unsigned int, so the cached value should be of the same type. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Message-ID: <20241025103621.4780-4-wahrenst@gmx.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: sdhci-pci-gli: GL9767: Fix low power mode in the SD Express processBen Chuang1-0/+3
When starting the SD Express process, the low power negotiation mode will be disabled, so we need to re-enable it after switching back to SD mode. Fixes: 0e92aec2efa0 ("mmc: sdhci-pci-gli: Add support SD Express card for GL9767") Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Cc: stable@vger.kernel.org Message-ID: <20241025060017.1663697-2-benchuanggli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-28mmc: sdhci-pci-gli: GL9767: Fix low power mode on the set clock functionBen Chuang1-14/+21
On sdhci_gl9767_set_clock(), the vendor header space(VHS) is read-only after calling gl9767_disable_ssc_pll() and gl9767_set_ssc_pll_205mhz(). So the low power negotiation mode cannot be enabled again. Introduce gl9767_set_low_power_negotiation() function to fix it. The explanation process is as below. static void sdhci_gl9767_set_clock() { ... gl9767_vhs_write(); ... value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF; pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <--- (a) gl9767_disable_ssc_pll(); <--- (b) sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); if (clock == 0) return; <-- (I) ... if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) { ... gl9767_set_ssc_pll_205mhz(); <--- (c) } ... value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF; pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value); <-- (II) gl9767_vhs_read(); } (a) disable low power negotiation mode. When return on (I), the low power mode is disabled. After (b) and (c), VHS is read-only, the low power mode cannot be enabled on (II). Reported-by: Georg Gottleuber <ggo@tuxedocomputers.com> Fixes: d2754355512e ("mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767") Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Tested-by: Georg Gottleuber <ggo@tuxedocomputers.com> Cc: stable@vger.kernel.org Message-ID: <20241025060017.1663697-1-benchuanggli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25dt-bindings: mmc: Add sdhci compatible for QCS615Yuanjie Yang1-0/+1
Document the sdhci compatible for Qualcomm QCS615 to support function for emmc and sd card on the Soc. Signed-off-by: Yuanjie Yang <quic_yuanjiey@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20241023092708.604195-2-quic_yuanjiey@quicinc.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: core: Use GFP_NOIO in ACMD22Avri Altman1-0/+4
While reviewing the SDUC series, Adrian made a comment concerning the memory allocation code in mmc_sd_num_wr_blocks() - see [1]. Prevent memory allocations from triggering I/O operations while ACMD22 is in progress. [1] https://lore.kernel.org/linux-mmc/3016fd71-885b-4ef9-97ed-46b4b0cb0e35@intel.com/ Suggested-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 051913dada04 ("mmc_block: do not DMA to stack") Signed-off-by: Avri Altman <avri.altman@wdc.com> Cc: stable@vger.kernel.org Message-ID: <20241021153227.493970-1-avri.altman@wdc.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25dt-bindings: mmc: sdhci-msm: Add SAR2130P compatibleDmitry Baryshkov1-0/+1
Document compatible for the SDHCI Controller on SAR2130P platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Message-ID: <20241017-sar2130p-mmc-v1-1-c84da16a001e@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: pwrseq_simple: add support for one reset controlCatalin Popescu1-9/+35
Reset controls being refcounted, they allow to share gpios across drivers. Right now, reset framework and reset-gpio driver supports only one reset gpio, so add support for one single reset control. If more than one reset gpio is configured in the device tree, then fallback to classic gpio control. Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com> Message-ID: <20241017131957.1171323-1-catalin.popescu@leica-geosystems.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: mtk-sd: add support for mt7988Frank Wunderlich1-0/+1
Add support for mmc on MT7988 SoC. We can use mt7986 platform data in driver, but mt7988 needs different clocks so for binding we need own compatible. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241012143826.7690-3-linux@fw-web.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25dt-bindings: mmc: mtk-sd: Add mt7988 SoCFrank Wunderlich1-0/+22
Add binding definitions for mmc on MT7988 SoC. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241012143826.7690-2-linux@fw-web.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: mtk-sd: Add support for MT8196Andy-ld Lu1-19/+126
Mediatek SoC MT8196 features a new design for tx/rx path. The new tx path incorporates register settings that are closely associated with bus timing. And the difference between new rx path and older versions is the usage of distinct register bits when setting the data sampling edge as part of the tuning process. Besides, the register settings for STOP_DLY_SEL and POP_EN_CNT are different from previous SoCs. For the changes mentioned in relation to the MT8196, the new compatible string 'mediatek,mt8196-mmc' is introduced. This is to accommodate different settings and workflows specific to the MT8196. Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241011024906.8173-3-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25mmc: mtk-sd: Add stop_dly_sel and pop_en_cnt to platform dataAndy-ld Lu1-2/+19
There are modified register settings for STOP_DLY_SEL and POP_EN_CNT from our next generation SoCs, due to the advanced chip manufacturing process and the resulting changes in the internal signal timing. Add two new fields to the compatibility structure to reflect the modifications. For legacy SoCs, also add the original value of 'stop_dly_sel' to the platform data, for unified code setting. Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241011024906.8173-2-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-25dt-bindings: mmc: mtk-sd: Add support for MT8196Andy-ld Lu1-0/+2
Extend the devicetree bindings to include the MT8196 mmc controller, new tx/rx would be supported from MT8196, and the register settings of STOP_DLY_SEL and POP_EN_CNT would also be variant. Signed-off-by: Andy-ld Lu <andy-ld.lu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20241011024906.8173-4-andy-ld.lu@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-pci-gli: enable UHS-II mode for GL9767Victor Shih1-1/+201
Changes are: * Enable the internal clock when do reset on UHS-II mode. * Increase timeout value before detecting UHS-II interface. * Add vendor settings for UHS-II mode. * Use the function sdhci_gli_wait_software_reset_done() for gl9767 reset. * Remove unnecessary code from sdhci_gl9767_reset(). Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Signed-off-by: Lucas Lai <lucas.lai@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-17-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-pci-gli: enable UHS-II mode for GL9755Victor Shih1-1/+234
Changes are: * Disable GL9755 overcurrent interrupt when power on/off on UHS-II. * Enable the internal clock when do reset on UHS-II mode. * Increase timeout value before detecting UHS-II interface. * Add vendor settings fro UHS-II mode. * Remove sdhci_gli_enable_internal_clock functon unused clk_ctrl variable. * Make a function sdhci_gli_wait_software_reset_done() for gl9755 reset. * Remove unnecessary code from sdhci_gl9755_reset(). Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Signed-off-by: Lucas Lai <lucas.lai@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-16-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-pci: add UHS-II support frameworkVictor Shih3-1/+19
This patch prepares for adding UHS-II support at a specific UHS-II capable sdhci-pci controller, GL9755 for now. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-15-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add pre-detect_init hookBen Chuang2-0/+4
This "pre" hook for detect_init(), uhs2_pre_detect_init, will be required to enable UHS-II support, at least, on GL9755. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-14-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add request() and othersVictor Shih3-16/+437
This is a sdhci version of mmc's request operation. It covers both UHS-I and UHS-II. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-13-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add irq() and othersVictor Shih4-48/+298
This is a UHS-II version of sdhci's request() operation. It handles UHS-II related command interrupts and errors. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-12-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add related functions to initialize the interfaceVictor Shih1-0/+204
UHS-II interface (related registers) will be initialized here. The operations include mmc's uhs2_set_reg operations, mmc's uhs2_detect_init operations, uhs2_[enable|disable]_clk operations. After detected the UHS-II interface, the host's UHS-II capabilities will be set up here and interrupts will also be enabled. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-11-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add set_ios()Victor Shih4-21/+165
This is a sdhci version of mmc's set_ios operation. This is used to handle basic IO bus setting. It covers both UHS-I and UHS-II. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-10-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add add_host() and others to set up the driverVictor Shih2-0/+93
This is a UHS-II version of sdhci's add_host/remove_host operation. Any sdhci drivers which are capable of handling UHS-II cards must call those functions instead of the corresponding sdhci's. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-9-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add set_timeout()Victor Shih2-0/+74
This is a UHS-II version of sdhci's set_timeout() operation. Use sdhci_uhs2_set_timeout() to set and calculate the timeout time. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-8-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add set_power() to support vdd2Victor Shih4-28/+84
This is a UHS-II version of sdhci's set_power operation. Use sdhci_uhs2_set_power() to set VDD2 for support UHS2 interface. VDD2, as well as VDD, is handled here. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-7-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: add reset functionVictor Shih2-0/+38
Sdhci_uhs2_reset() does a UHS-II specific reset operation. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-6-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci-uhs2: dump UHS-II registersVictor Shih4-0/+38
Dump UHS-II specific registers, if available, in sdhci_dumpregs() for informative/debugging use. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-5-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci: add UHS-II module and add a kernel configurationVictor Shih3-0/+51
This patch adds sdhci-uhs2.c as a module for UHS-II support. This is a skeleton for further development in this patch series. This kernel configuration, CONFIG_MMC_SDHCI_UHS2, will be used in the following commits to indicate UHS-II specific code in sdhci controllers. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-4-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: sdhci: add UHS-II related definitions in headersVictor Shih2-1/+228
Add UHS-II related definitions in sdhci.h and sdhci-uhs2.h. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Message-ID: <20241018105333.4569-3-victorshihgli@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-24mmc: core: Support UHS-II card control and accessVictor Shih8-37/+1103
Embed UHS-II access/control functionality into the MMC request processing flow. Signed-off-by: Jason Lai <jason.lai@genesyslogic.com.tw> Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw> Message-ID: <20241018105333.4569-2-victorshihgli@gmail.com> [Ulf: A couple of cleanups and fixed sd_uhs2_power_off()] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: mmc_spi: drop buggy snprintf()Bartosz Golaszewski1-6/+3
GCC 13 complains about the truncated output of snprintf(): drivers/mmc/host/mmc_spi.c: In function ‘mmc_spi_response_get’: drivers/mmc/host/mmc_spi.c:227:64: error: ‘snprintf’ output may be truncated before the last format character [-Werror=format-truncation=] 227 | snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s", | ^ drivers/mmc/host/mmc_spi.c:227:9: note: ‘snprintf’ output between 26 and 43 bytes into a destination of size 32 227 | snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s", | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 228 | cmd->opcode, maptype(cmd)); Drop it and fold the string it generates into the only place where it's emitted - the dev_dbg() call at the end of the function. Fixes: 15a0580ced08 ("mmc_spi host driver") Suggested-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241008160134.69934-1-brgl@bgdev.pl Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14dt-bindings: mmc: sdhci-msm: Document the X1E80100 SDHCI ControllerAbel Vesa1-0/+1
Document the SDHCI Controller on the X1E80100 Platform. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241008-x1e80100-qcp-sdhc-v1-1-dfef4c92ae31@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: davinci: use generic device_get_match_data()Bartosz Golaszewski1-2/+2
There's no reason for this driver to use the OF-specific variant so switch to using the generic device_get_match_data() helper instead. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241007114918.52066-2-brgl@bgdev.pl Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: davinci: order includes alphabeticallyBartosz Golaszewski1-11/+10
For better readability, put all header inclusions in alphabetical order. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241007114918.52066-1-brgl@bgdev.pl Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: sdhci-of-arasan: Support for emmc hardware resetPaul Alvin1-0/+18
Add hw_reset callback to support emmc hardware reset, this callback get called from the mmc core only when "cap-mmc-hw-reset" property is defined in the DT. Signed-off-by: Paul Alvin <alvin.paulp@amd.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20241007095445.19340-1-alvin.paulp@amd.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14dt-bindings: mmc: sdhci-msm: add IPQ5424 compatibleSricharan Ramabadhran1-0/+1
The IPQ5424 supports eMMC with an SDHCI controller. Add the appropriate compatible to the documentation. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/20241004102342.2414317-4-quic_srichara@quicinc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: mtk-sd: fix devm_clk_get_optional usageRosen Penev1-3/+2
This already returns NULL when not found. However, it can return EPROBE_DEFER and should thus return here. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20240930224919.355359-4-rosenp@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: mtd-sd: use devm_platform_ioremap_resourceRosen Penev1-7/+3
My guess is some automated tool missed this transformation. Now looks clearer as do what's happening. Also allows removal of struct resource. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20240930224919.355359-3-rosenp@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: mtk-sd: use devm_mmc_alloc_hostRosen Penev1-35/+20
Allows removing several gotos. Also fixed some wrong ones. Added dev_err_probe where EPROBE_DEFER is possible. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20240930224919.355359-2-rosenp@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14dt-bindings: mmc: cdns,sdhci: ref sdhci-common.yamlPierre-Henry Moussay1-1/+1
Since the Cadence sdhci controller is sdhci compatible, the cdns,sdhci.yaml should ref sdhci-common.yaml to use 'sdhci-caps-mask' property. Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com> Link: https://lore.kernel.org/r/20240930095449.1813195-17-pierre-henry.moussay@microchip.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14dt-bindings: mmc: cdns: document Microchip PIC64GX MMC/SDHCI controllerPierre-Henry Moussay1-0/+1
PIC64GX is compatible with cdns,sd4hc without any additional feature Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240930095449.1813195-12-pierre-henry.moussay@microchip.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: mtk-sd: Implement Host Software Queue for eMMC and SD CardAngeloGioacchino Del Regno2-2/+48
Add support for Host Software Queue (HSQ) and enable it when the controller instance does not have Command Queue Engine HW support. It was chosen to enable HSQ only for eMMC and SD/MicroSD cards and not for SDIO as performance improvements are seen only for the former. Performance was measured with a SanDisk Extreme Ultra A2 MicroSD card in a MediaTek MT8195T Acer Chromebook Spin 513 (CP513-2H), by running FIO (bs=4k) on an ArchLinux userspace. .... Summarizing .... Random read: +24.28% IOPS, +24.29% BW Sequential read: +3.14% IOPS, +3.49% BW Random RW (avg): +50.53% IOPS, +50.68% BW Below, more data from the benchmarks. Before: - Random read: IOPS=1643, BW=6574KiB/s bw ( KiB/s): min= 4578, max= 7440, per=99.95%, avg=6571.55, stdev=74.16, samples=953 iops : min= 1144, max= 1860, avg=1642.14, stdev=18.54, samples=953 lat (msec) : 100=0.01%, 250=0.12%, 500=0.38%, 750=97.89%, 1000=1.44%, 2000=0.16% - Sequential read: IOPS=19.1k, BW=74.4MiB/s bw ( KiB/s): min=12288, max=118483, per=100.00%, avg=76293.38, stdev=1971.42, samples=956 iops : min= 3072, max=29620, avg=19072.14, stdev=492.87, samples=956 lat (msec) : 4=0.01%, 10=0.01%, 20=0.21%, 50=23.95%, 100=75.67%, 250=0.05%, 500=0.03%, 750=0.08% - Random R/W: read: IOPS=282, BW=1129KiB/s (1156kB/s) write: IOPS=284, BW=1136KiB/s read bw ( KiB/s): min= 31, max= 3496, per=100.00%, avg=1703.67, stdev=155.42, samples=630 read iops : min= 7, max= 873, avg=425.22, stdev=38.85, samples=630 wri bw ( KiB/s): min= 31, max= 3443, per=100.00%, avg=1674.27, stdev=164.23, samples=644 wri iops : min= 7, max= 860, avg=417.87, stdev=41.03, samples=644 lat (msec) : 250=0.13%, 500=0.44%, 750=0.84%, 1000=22.29%, 2000=74.01%, >=2000=2.30% After: - Random read: IOPS=2042, BW=8171KiB/s bw ( KiB/s): min= 4907, max= 9072, per=99.94%, avg=8166.80, stdev=93.77, samples=954 iops : min= 1226, max= 2268, avg=2040.78, stdev=23.41, samples=954 lat (msec) : 100=0.03%, 250=0.13%, 500=52.88%, 750=46.64%, 1000=0.32% - Sequential read: IOPS=19.7k, BW=77.0MiB/s bw ( KiB/s): min=67980, max=94248, per=100.00%, avg=78894.27, stdev=1475.07, samples=956 iops : min=16994, max=23562, avg=19722.45, stdev=368.76, samples=956 lat (msec) : 4=0.01%, 10=0.01%, 20=0.05%, 50=28.78%, 100=71.14%, 250=0.01%, 500=0.02% - Random R/W: read: IOPS=424, BW=1699KiB/s write: IOPS=428, BW=1714KiB/s read bw ( KiB/s): min= 228, max= 2856, per=100.00%, avg=1796.60, stdev=112.59, samples=901 read iops : min= 54, max= 712, avg=447.81, stdev=28.21, samples=901 wri bw ( KiB/s): min= 28, max= 2904, per=100.00%, avg=1780.11, stdev=128.27, samples=916 wri iops : min= 4, max= 724, avg=443.69, stdev=32.14, samples=916 Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240930090156.33537-1-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14mmc: host: Fix typos in comments across various filesYu Jiaoliang8-9/+9
This patch corrects several typos in comments within the mmc/host directory. No functional changes are introduced, only comment improvements for better readability. Detected using codespell. Signed-off-by: Yu Jiaoliang <yujiaoliang@vivo.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20240929093418.526901-1-yujiaoliang@vivo.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-10-14memstick: Constify struct memstick_device_idChristophe JAILLET4-5/+5
'struct memstick_device_id' are not modified in these drivers. Constifying this structure moves some data to a read-only section, so increases overall security. Update memstick_dev_match(), memstick_bus_match() and struct memstick_driver accordingly. On a x86_64, with allmodconfig, as an example: Before: ====== text data bss dec hex filename 74055 3455 88 77598 12f1e drivers/memstick/core/ms_block.o After: ===== text data bss dec hex filename 74087 3423 88 77598 12f1e drivers/memstick/core/ms_block.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/6509d6f6ed64193f04e747a98ccea7492c976ca8.1727540434.git.christophe.jaillet@wanadoo.fr Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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