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2016-09-08arm64: dts: r8a7796: salvator-x: add serial console pinsUlrich Hecht1-0/+16
Adds pin control for SCIF2. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7796: Add pinctrl device nodeTakeshi Kihara1-0/+5
This patch adds pinctrl device node for R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB outputLaurent Pinchart1-0/+7
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable GPIO ledsVladimir Barinov1-0/+11
This supports GPIO leds on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: Sound SSI supportVladimir Barinov1-0/+118
This supports SSI sound for H3ULCB board. SSI DMA mode used. CS2000 used as AUDIO_CLK_B. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable SDHI0Vladimir Barinov1-0/+49
This supports SDHI0 on H3ULCB board SD card slot Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable GPIO keysVladimir Barinov1-0/+13
This supports GPIO keys on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed propertySimon Horman1-2/+0
Remove cap-mmc-highspeed property from SDHI2 and SDHI3. This property is unnecessary as the driver automatically sets the highspeed capability. Furthermore its use is inconsistent with SDHI0 and SDHI1 which are also highspeed capable but do not have this property present. Found by inspection. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable USB2.0 Host channel 1Vladimir Barinov1-0/+8
This supports USB2.0 Host channel 1 on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable USB2 PHY of channel 1Vladimir Barinov1-0/+12
This supports USB2 PHY channel #1 on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable WDTVladimir Barinov1-0/+5
This supports watchdog timer for H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable EXTALR clkVladimir Barinov1-0/+4
This enables EXTALR clock that can be used for the watchdog. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable I2C2Vladimir Barinov1-0/+12
This supports I2C2 bus on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable EthernetAVBVladimir Barinov1-0/+32
This supports Ethernet AVB on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable SCIF clk and pinsVladimir Barinov1-0/+13
This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: initial device treeVladimir Barinov2-1/+52
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost board. This commit supports the following peripherals: - SCIF (console) Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: add H3ULCB board DT bindingsVladimir Barinov1-0/+2
Add H3ULCB Device tree bindings Documentation, listing it as a supported board. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodesGeert Uytterhoeven1-2/+4
The audio-dmac nodes used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: renesas: salvator-x: Enable DULaurent Pinchart1-0/+44
Only the VGA output is supported for now. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add DU device to DTLaurent Pinchart1-0/+46
Add the DU device to r8a7795.dtsi in a disabled state. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add VSP instancesLaurent Pinchart1-0/+90
The r8a7795 has 9 VSP instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add FCPV nodesLaurent Pinchart1-0/+63
The FCPs handle the interface between various IP cores and memory. Add the instances related to the VSP2s. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable HSUSBYoshihiro Shimoda1-0/+4
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0Yoshihiro Shimoda1-0/+8
We have to set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0Yoshihiro Shimoda1-0/+24
This patch also adds a regulator node for USB2.0 to handle VBUS on/off by the phy-rcar-gen3-usb2 driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add HSUSB device nodeYoshihiro Shimoda1-0/+17
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: set maximum frequency for SDHI clocksWolfram Sang1-0/+4
Define the upper limit otherwise the driver cannot utilize max speeds. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FDP1 device nodesKieran Bingham1-0/+27
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FCPF device nodesKieran Bingham1-0/+21
Provide nodes for the FCP devices dedicated to the FDP device channels. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-19pinctrl: sh-pfc: r8a7796: Add SDHI pins, groups and functionsTakeshi Kihara1-0/+275
This patch adds SDHI pins, groups and functions to R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-19pinctrl: sh-pfc: r8a7796: Add SCIF pins, groups and functionsTakeshi Kihara1-0/+300
This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-19pinctrl: sh-pfc: Initial R8A7796 PFC supportTakeshi Kihara6-0/+2086
This patch adds initial pinctrl driver to support for the R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [uli: rebased on top of renesas-drivers] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-16pinctrl: sh-pfc: r8a7795: Add DU supportLaurent Pinchart1-0/+100
Only the DU parallel RGB output signals are included, HDMI and TCON pins will be added in separate groups. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: r8a7792: Add DU pin groupsSergei Shtylyov1-0/+144
Add DU pin groups to the R8A7792 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: r8a7792: Add VIN pin groupsSergei Shtylyov1-0/+577
Add VIN[0-5] pin groups to the R8A7792 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> [geert: Fix VI1_D14_G6_Y6 and VI1_D15_G7_Y7 pins] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: r8a7795: Correct header from R-Car Gen3 to R8A7795Geert Uytterhoeven1-1/+1
This source file handles r8a7795 only, which is not the sole member of the R-Car Gen3 family. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-08pinctrl: sh-pfc: r8a7792: Add CAN pin groupsSergei Shtylyov1-0/+37
Add CAN0/1 data/clock pin groups to R8A7792 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: r8a7792: Add SDHI pin groupsSergei Shtylyov1-0/+51
Add SDHI0 pin groups to the R8A7792 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: r8a7792: Add EtherAVB pin groupsSergei Shtylyov1-0/+99
Add the EtherAVB pin groups to the R8A7792 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: Add R8A7792 PFC supportSergei Shtylyov6-6/+1748
Add the PFC support for the R8A7792 SoC including pin groups for some on-chip devices such as SCIF, INTC, and LBSC... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> [geert: s/LSBC/LBSC/] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: Fix overly long linesSergei Shtylyov1-40/+55
The PORT_GP_CFG_<n>() macros take up more than 80 columns -- and not for a good reason. Make the header file checkpatch.pl-proof at least in this respect... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-08pinctrl: sh-pfc: r8a7795: Add bias pinconf supportUlrich Hecht1-12/+242
Implements pull-up and pull-down. On this SoC there is no simple mapping of GP pins to bias register bits, so we need a table. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-08-07Linux 4.8-rc1Linus Torvalds1-2/+2
2016-08-07block: rename bio bi_rw to bi_opfJens Axboe51-157/+158
Since commit 63a4cc24867d, bio->bi_rw contains flags in the lower portion and the op code in the higher portions. This means that old code that relies on manually setting bi_rw is most likely going to be broken. Instead of letting that brokeness linger, rename the member, to force old and out-of-tree code to break at compile time instead of at runtime. No intended functional changes in this commit. Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07target: iblock_execute_sync_cache() should use bio_set_op_attrs()Jens Axboe1-1/+1
The original commit missed this function, it needs to mark it a write flush. Cc: Mike Christie <mchristi@redhat.com> Fixes: e742fc32fcb4 ("target: use bio op accessors") Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07mm: make __swap_writepage() use bio_set_op_attrs()Jens Axboe1-2/+3
Cleaner than manipulating bio->bi_rw flags directly. Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07block/mm: make bdev_ops->rw_page() take a bool for read/writeJens Axboe11-53/+51
Commit abf545484d31 changed it from an 'rw' flags type to the newer ops based interface, but now we're effectively leaking some bdev internals to the rest of the kernel. Since we only care about whether it's a read or a write at that level, just pass in a bool 'is_write' parameter instead. Then we can also move op_is_write() and friends back under CONFIG_BLOCK protection. Reviewed-by: Mike Christie <mchristi@redhat.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07fs: return EPERM on immutable inodeEryu Guan4-4/+5
In most cases, EPERM is returned on immutable inode, and there're only a few places returning EACCES. I noticed this when running LTP on overlayfs, setxattr03 failed due to unexpected EACCES on immutable inode. So converting all EACCES to EPERM on immutable inode. Acked-by: Dave Chinner <dchinner@redhat.com> Signed-off-by: Eryu Guan <guaneryu@gmail.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-08-05ramoops: use persistent_ram_free() instead of kfree() for freeing przHiraku Toyooka1-3/+3
persistent_ram_zone(=prz) structures are allocated by persistent_ram_new(), which includes vmap() or ioremap(). But they are currently freed by kfree(). This uses persistent_ram_free() for correct this asymmetry usage. Signed-off-by: Hiraku Toyooka <hiraku.toyooka.gu@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.kw@hitachi.com> Cc: Mark Salyzyn <salyzyn@android.com> Cc: Seiji Aguchi <seiji.aguchi.tr@hitachi.com> Signed-off-by: Kees Cook <keescook@chromium.org>
2016-08-05ramoops: use DT reserved-memory bindingsKees Cook4-33/+56
Instead of a ramoops-specific node, use a child node of /reserved-memory. This requires that of_platform_device_create() be explicitly called for the node, though, since "/reserved-memory" does not have its own "compatible" property. Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Rob Herring <robh@kernel.org>
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