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2024-10-24arm64: dts: rockchip: reorder audio/hdmi nodes in Orange Pi 5Jimmy Hon1-11/+11
Fix the node order so analog-audio is before hdmi0-con Audio was submitted first, and it wanted to live above the leds node. Next, the HDMI was submitted, but it wanted to live above the leds node. However, HDMI was approved first, so the Audio node ended up living above the leds node. Fixes: ae46756faff8 ("arm64: dts: rockchip: analog audio on Orange Pi 5") Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241024041851.5600-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: analog audio on Orange Pi 5Jimmy Hon1-0/+64
Analog audio using es8388 codec via the headset jack and onboard mic Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241008031429.2410-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add dtsi file for RK3399S SoC variantDragan Simic2-22/+124
Following the hierarchical representation of the SoC data that's been already established in the commit 296602b8e5f7 ("arm64: dts: rockchip: Move RK3399 OPPs to dtsi files for SoC variants"), add new SoC dtsi file for the Rockchip RK3399S SoC, which is yet another variant of the Rockchip RK3399 SoC. The only perceivable differences between the RK3399S and the RK3399 are in the supported CPU DVFS OPPs, which result from the RK3399S being binned for lower maximum CPU frequencies than the regular RK3399 variant. The RK3399S variant is used in the Pine64 PinePhone Pro only, [1] whose board dts file included the necessary adjustments to the CPU DVFS OPPs. This commit effectively moves those adjustments into the separate RK3399S SoC dtsi file, following the above-mentioned "encapsulation" approach. No functional changes are introduced, which was validated by decompiling and comparing the affected dtb file before and after these changes. [1] https://wiki.pine64.org/index.php/PinePhone_Pro Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/c32622e4a6897378d9df81c8c3eda1bdb9211e0b.1728632052.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Convert dts files used as parents to dtsi filesDragan Simic22-2066/+2197
Including a board dts file is not the right way to represent the hierarchical nature of the board dts files and to create a dts file for another variant of an ancestor board. However, a few boards and their variants (ab)used this approach, so let's clean that up by converting the common ancestors into dtsi files, and by adding separate board-variant dts files. No functional changes are introduced, which was validated by decompiling and comparing all affected board dtb files before and after these changes. In more detail, the affected dtb files have some of their blocks shuffled around a bit and some of their phandles have different values, as a result of the changes to the order in which the building blocks from the parent dtsi files are included, but they effectively remain the same as the originals. The only perceivable introduced change is the turning of "roc-rk3328-cc" into "ROC-RK3328-CC", which is the model name of one of the affected boards, which was performed to match the styling of the official board name. As a side note, due to the nature of introduced changes, this commit is best viewed using "-B80%/80% -M20% -C5%" as the set of options for git-log(1). Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/f3d789c14fe34a53327cac03cd3837e530e21f5c.1728937091.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: fix the pcie refclock oscillator on Rock 5 ITXHeiko Stuebner1-2/+36
The Rock 5 ITX uses two PCIe controllers to drive both a M.2 slot and its SATA controller with 2 lanes each. The supply for the refclk oscillator is the same that supplies the M.2 slot, but the SATA controller port is supplied by a different rail. This leads to the effect that if the PCIe30x4 controller for the M.2 probes first, everything works normally. But if the PCIe30x2 controller that is connected to the SATA controller probes first, it will hang on the first DBI read as nothing will have enabled the refclock before. Fix this by describing the clock generator with its supplies so that both controllers can reference it as needed. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240906082511.2963890-6-heiko@sntech.de
2024-10-22arm64: dts: rockchip: Add FriendlyARM NanoPi R3S boardTianling Shen2-0/+555
The NanoPi R3S(as "R3S") is an open source platform with dual-Gbps Ethernet ports designed and developed by FriendlyElec for IoT applications. Specification: - Rockchip RK3566 - 2GB LPDDR4X RAM - optional 32GB eMMC module - SD card slot - 2x 1000 Base-T - 3x LEDs (POWER, LAN, WAN) - 2x Buttons (Reset, MaskROM) - 1x USB 3.0 Port - Type-C 5V 2A Power Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241020173946.225960-2-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22dt-bindings: arm: rockchip: Add FriendlyARM NanoPi R3STianling Shen1-0/+5
Add devicetree binding for FriendlyARM NanoPi R3S. Signed-off-by: Tianling Shen <cnsztl@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241020173946.225960-1-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on Orange Pi 5Jimmy Hon1-0/+47
Add the necessary DT changes to enable HDMI0 on Orange Pi 5 Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20241019021034.1710-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: add and enable gpu node for Radxa ROCK 5AFUKAUMI Naoki1-0/+5
add gpu node to make it usable on Radxa ROCK 5A. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20241019025008.852-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on orangepi-5-plusCristian Ciocaltea1-0/+47
Add the necessary DT changes to enable HDMI0 on Orange Pi 5 Plus. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-4-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on rk3588-evb1Cristian Ciocaltea1-0/+47
Add the necessary DT changes to enable HDMI0 on Rockchip RK3588 EVB1. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-3-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Enable HDMI0 on rock-5bCristian Ciocaltea1-0/+47
Add the necessary DT changes to enable HDMI0 on Radxa ROCK 5B. Tested-by: FUKAUMI Naoki <naoki@radxa.com> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-2-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add HDMI0 node to rk3588Cristian Ciocaltea1-0/+41
Add support for the HDMI0 output port found on RK3588 SoC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-1-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22arm64: dts: rockchip: Add Radxa e20c boardYao Zi2-0/+23
Add board-level device tree for Radxa e20c board[1]. This basic implementation supports boot into a kernel with only UART console. Other features will be added later. [1]: https://docs.radxa.com/en/e/e20c Signed-off-by: Yao Zi <ziyao@disroot.org> Link: https://lore.kernel.org/r/20240829092705.6241-5-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>