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2019-04-18ARM: dtsi: axp81x: add USB power supply nodeQuentin Schulz1-0/+4
The AXP813/818 has a VBUS power input. Add a device node for it, now that we support it. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> [wens@csie.org: Add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-18arm64: dts: allwinner: a64-amarula-relic: Add OV5640 camera nodeJagan Teki1-0/+50
Amarula A64-Relic board by default bound with OV5640 camera, so add support for it with below pin information. - PE13, PE12 via i2c-gpio bitbanging - CLK_CSI_MCLK as external clock - PE1 as external clock pin muxing - ALDO1 as AVDD supply - DLDO3 as DOVDD supply - ELDO3 as DVDD supply - PE14 gpio for reset pin - PE15 gpio for powerdown pin Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-18arm64: dts: allwinner: a64: Add pinmux setting for CSI MCLK on PE1Jagan Teki1-0/+6
Some camera modules have the SoC feeding a master clock to the sensor instead of having a standalone crystal. This clock signal is generated from the clock control unit and output from the CSI MCLK function of pin PE1. Add a pinmux setting for it for camera sensors to reference. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-18ARM: tegra: Add ACTMON support on Tegra30Dmitry Osipenko1-0/+11
Add support for ACTMON on Tegra30. This is used to monitor activity from different components. Based on the collected statistics, the rate at which the external memory needs to be clocked can be derived. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: dts: Ux500: Add MCDE and Samsung displayLinus Walleij3-11/+65
This adds and updates the device tree nodes for the MCDE display controller and connects the Samsung display to the TVK1281618 user interface board (UIB) so we get nicely working graphics on this reference design. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-17ARM: dts: ux500: Add Mali-400Linus Walleij1-0/+24
This adds the Mali-400 block, also known as SGA500 or the Smart Graphics Adapter, to the DBx500 DTS file. All resources and bindings are already in place so this just works. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-17ARM: dts: ape6evm: Reorder bootargsMagnus Damm1-1/+1
Reorder bootargs parameters to make the APE6EVM board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-04-17ARM: dts: marzen: Add rw to bootargs and use ip=dhcpMagnus Damm1-1/+1
Add rw as bootargs parameter and change from ip=on to ip=dhcp to make the Marzen board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-04-17ARM: dts: bockw: Reorder bootargsMagnus Damm1-1/+1
Reorder bootargs parameters to make the BockW board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-04-17ARM: dts: kzm9d: Add rw parameter to bootargsMagnus Damm1-1/+1
Add rw as bootargs parameter to make the KZM9D board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-04-17ARM: dts: sun8i: mapleboard: Remove cd-invertedMaxime Ripard1-2/+1
The cd-inverted property can also be expressed using the GPIO flags. Use the active low GPIO flag to have the same semantic without the confusion. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17arm64: dts: allwinner: Fix DE2 bus node nameMaxime Ripard2-2/+2
According to the device tree specification, any bus should have a 'bus' node name. Since it isn't the case for us on the DE2 bus, fix that. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17ARM: dts: sun5i: Reorder pinctrl nodesMaxime Ripard1-10/+10
We try to keep the PIO nodes ordered alphabetically, but this doesn't always work out. Let's fix it. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17ARM: dts: sun6i: i7: Remove useless propertyMaxime Ripard1-1/+0
The I7 DTS uses an spdif-out property with an "okay" value. However, that property isn't documented anywhere, and isn't used anywhere either. Remove it. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17ARM: dts: sun4i: lime: Fix the USB PHY ID detect GPIO propertiesMaxime Ripard1-1/+1
While the USB PHY Device Tree mandates that the name of the ID detect pin should be usb0_id_det-gpios, a significant number of device tree use usb0_id_det-gpio instead. This was functional because the GPIO framework falls back to the gpio suffix that is legacy, but we should fix this. Commit 2c515b0d05a9 ("ARM: sunxi: Fix the USB PHY ID detect GPIO properties") was supposed to fix this, but one fell through the cracks. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17ARM: dts: sun4i: protab2: Remove stale pinctrl-names entryMaxime Ripard1-1/+0
Some nodes still have pinctrl-names entry, yet they don't have any pinctrl group anymore. Drop them. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17arm64: tegra: Remove regulator hacks on Jetson TX2Thierry Reding1-23/+0
Various regulators were marked as always-on for Jetson TX2. At this point, all of the regulators are properly hooked up, so this workaround is no longer required. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: tegra: Enable XUSB on P2771Thierry Reding2-4/+130
Enable the relevant pads for XUSB support on P2771-0000 and hook up the USB supply voltage regulators to the ports. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: tegra: Add XUSB and pad controller on Tegra186Thierry Reding1-0/+135
Adds the XUSB pad and XUSB controllers on Tegra186. Reviewed-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: tegra: venice2: Move PLL power supplies to XUSB pad controllerThierry Reding1-0/+5
The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: tegra: nyan: Move PLL power supplies to XUSB pad controllerThierry Reding1-0/+5
The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the XUSB controller to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: tegra: jetson-tk1: Move PLL power supplies to XUSB pad controllerThierry Reding1-0/+5
The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: tegra: apalis: Move PLL power supplies to XUSB pad controllerThierry Reding2-0/+12
The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: tegra: Remove gratuitous parentheses in SPDX license identifierThierry Reding2-2/+2
Parentheses in the SPDX license identifier are only used to group sub- expressions. If there's no need for such grouping, the parentheses can be omitted. Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17ARM: tegra: Convert to SPDX license tags for Tegra124 ApalisIgor Opaniuk3-113/+6
Replace boiler plate licenses texts with the SPDX license identifiers in Colibri/Apalis DTS files. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> [treding@nvidia.com: drop unneeded parentheses, keep license at X11] Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: tegra: Add NVIDIA Jetson Nano Developer Kit supportThierry Reding2-0/+651
The Jetson Nano Developer Kit is a Tegra X1 based development board. It is similar to Jetson TX1 but it is not pin compatible. It features 4 GB of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot used for storage. HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0 and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI Ethernet controller provides onboard network connectivity. An M.2 Key-E slot with PCIe x1 adds additional possibilities. A 40-pin header on the board can be used to extend the capabilities and exposed interfaces of the Jetson Nano. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: tegra: smaug: Move PLL power supplies to XUSB pad controllerThierry Reding1-0/+5
The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: tegra: jetson-tx1: Move PLL power supplies to XUSB pad controllerThierry Reding1-0/+5
The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: dts: allwinner: Remove useless phy-names from EHCI and OHCIMaxime Ripard3-6/+0
Neither the OHCI or EHCI bindings are using the phy-names property, so we can just drop it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17ARM: dts: sunxi: h3/h5: Remove useless phy-names from EHCI and OHCIMaxime Ripard1-6/+0
Neither the OHCI or EHCI bindings are using the phy-names property, so we can just drop it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-17ARM: dts: sunxi: Remove useless phy-names from EHCI and OHCIMaxime Ripard8-28/+0
Neither the OHCI or EHCI bindings are using the phy-names property, so we can just drop it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-16ARM: dts: meson8b: odroid-c1: prepare support for the RTCMartin Blumenstingl1-0/+14
The Odroid-C1 has the 32.768 kHz oscillator (X3 in the schematics) which is required for the RTC. A battery can be connected separately (to the BT1 header) - then the "rtc" node can be enabled manually. By default the RTC is disabled because the boards typically come without the RTC battery. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16ARM: dts: meson8b: ec100: enable the RTCMartin Blumenstingl1-0/+14
The RTC is always enabled on this board since the battery is already connected in the factory. According to the schematics the VCC_RTC regulator (which is either powered by the internal 3.3V or a battery) is connected to the 0.9V RTC_VDD input of the SoCs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16ARM: dts: meson: add support for the RTCMartin Blumenstingl3-0/+19
The 32-bit Meson SoCs have an RTC block in the AO (always on) area. The RTC requires an external 32.768 kHz oscillator to work properly. Whether or not this crystal exists depends on the board, so it has to be added for each board.dts (instead of adding it somewhere in a generic .dtsi). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16arm64: dts: meson-g12a-u200: Add support for Video DisplayNeil Armstrong1-0/+54
This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the U200 Reference Design. AO-CEC-B is used by default and AO-CEC-A is disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16arm64: dts: meson-g12a-sei510: Add support for Video DisplayNeil Armstrong1-0/+53
This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the SEI510 STB. AO-CEC-B is used by default and AO-CEC-A is disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16arm64: dts: meson-g12a-x96-max: Add support for Video DisplayNeil Armstrong1-0/+54
This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the X96 Max STB. AO-CEC-B is used by default and AO-CEC-A is disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16arm64: dts: meson-g12a: Add AO-CEC nodesNeil Armstrong1-0/+34
Amlogic G12A embeds 2 CEC controllers : - AO-CEC-A the same controller as in GXBB, GXL & GXM SoCs - AO-CEC-B is a new controller Note, the two controller can work simultanously since 2 Pads can handle CEC, thus this SoC can handle 2 distinct CEC busses. This patch adds the nodes for the AO-CEC-A and AO-CEC-B controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16arm64: dts: meson-g12a: Add VPU and HDMI related nodesNeil Armstrong1-0/+131
Add VPU and HDMI display support. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson-g12a-x96-max: Enable USBNeil Armstrong1-0/+5
Enable the USB2 and USB3 Host ports on the X96 Max Set-Top-Box. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson-g12a-u200: Enable USBNeil Armstrong1-0/+12
Enable the USB2 OTG and USB3 Host ports on the S905D2 Reference Design. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson-g12a-sei510: Enable USBNeil Armstrong1-0/+5
Enable the USB2 and USB3 Host ports on the SEI520 Set-Top-Box. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson-g12a-sei510: Add ADC Key and BT supportNeil Armstrong1-0/+30
Add support for the : - ADC Touch key - Bluetooth Module on UART A Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson-g12a-u200: add regulatorsJerome Brunet1-0/+79
Add system regulators for the S905D U200 reference design. Add some regulators. Still missing * VDD_EE (0.8V - PWM controlled) * VDD_CPU (PWM controlled) Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson: g12a: Add mali-g31 gpu nodeNeil Armstrong1-0/+27
This patch adds the ARM Mali G31 GPU node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson: g12a: Add G12A USB nodesNeil Armstrong1-0/+75
This patch adds the nodes for the USB Complex found in the Amlogic G12A SoC. It includes the : - 2 USB2 PHYs - 1 USB3 + PCIE Combo PHY - the USB Glue with it's DWC2 and DWC3 sub-nodes Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15arm64: dts: meson: g12a: Add SAR ADC nodeNeil Armstrong1-0/+15
This patch adds the SAR ADC controller node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15dt-bindings: power: amlogic, meson-gx-pwrc: Add G12A compatibleNeil Armstrong1-1/+3
The Amlogic G12A has a slighly different Power Control, but uses the same address space and sysctrl registers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15ARM: dts: am335x: wega: Replaced register offsets with definesChristina Quast1-34/+34
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-15ARM: dts: am335x: sl50: Replaced register offsets with definesChristina Quast1-104/+104
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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