wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2023-03-31	dt-bindings: clock: mediatek: Add new MT8188 clock	Garmin.Chang	3	-0/+852
2023-03-20	clk: mediatek: mt81xx: Ensure fhctl code is available	Arnd Bergmann	1	-0/+3
2023-03-17	clk: mediatek: Ensure fhctl code is available for COMMON_CLK_MT6795	Stephen Boyd	1	-0/+1
2023-03-13	clk: mediatek: mt8135: Convert to simple probe and enable module build	AngeloGioacchino Del Regno	2	-102/+76
2023-03-13	clk: mediatek: mt8135: Join root_clk_alias and top_divs arrays	AngeloGioacchino Del Regno	1	-6/+1
2023-03-13	clk: mediatek: mt8135-apmixedsys: Convert to platform_driver and module	AngeloGioacchino Del Regno	1	-5/+48
2023-03-13	clk: mediatek: mt8135: Properly use CLK_IS_CRITICAL flag	AngeloGioacchino Del Regno	1	-6/+8
2023-03-13	clk: mediatek: mt8135: Move apmixedsys to its own file	AngeloGioacchino Del Regno	3	-47/+63
2023-03-13	clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriate	AngeloGioacchino Del Regno	148	-1/+150
2023-03-13	clk: mediatek: Kconfig: Allow module build for core mt8192 clocks	AngeloGioacchino Del Regno	1	-1/+1
2023-03-13	clk: mediatek: mt8192: Move apmixedsys clock driver to its own file	AngeloGioacchino Del Regno	3	-218/+219
2023-03-13	clk: mediatek: Split configuration options for MT8186 clock drivers	AngeloGioacchino Del Regno	2	-6/+91
2023-03-13	clk: mediatek: Allow building most MT6797 clock drivers as modules	AngeloGioacchino Del Regno	1	-4/+4
2023-03-13	clk: mediatek: Allow building most MT6765 clock drivers as modules	AngeloGioacchino Del Regno	1	-13/+13
2023-03-13	clk: mediatek: Allow all MT8183 clocks to be built as modules	AngeloGioacchino Del Regno	1	-12/+12
2023-03-13	clk: mediatek: Allow all MT8167 clocks to be built as modules	AngeloGioacchino Del Regno	1	-8/+8
2023-03-13	clk: mediatek: Allow MT7622 clocks to be built as modules	AngeloGioacchino Del Regno	1	-4/+4
2023-03-13	clk: mediatek: Allow building MT8192 non-critical clocks as modules	AngeloGioacchino Del Regno	1	-12/+12
2023-03-13	clk: mediatek: Split MT8195 clock drivers and allow module build	AngeloGioacchino Del Regno	2	-7/+113
2023-03-13	clk: mediatek: mt2712: Change Kconfig options to allow module build	AngeloGioacchino Del Regno	1	-8/+8
2023-03-13	clk: mediatek: Add MODULE_LICENSE() where missing	AngeloGioacchino Del Regno	109	-1/+109
2023-03-13	clk: mediatek: Switch to module_platform_driver() where possible	AngeloGioacchino Del Regno	96	-149/+98
2023-03-13	clk: mediatek: mt8186-mcu: Migrate to common probe mechanism	AngeloGioacchino Del Regno	1	-55/+13
2023-03-13	clk: mediatek: mt7986-eth: Migrate to common probe mechanism	AngeloGioacchino Del Regno	1	-51/+32
2023-03-13	clk: mediatek: mt7986-infracfg: Migrate to common probe mechanism	AngeloGioacchino Del Regno	1	-44/+17
2023-03-13	clk: mediatek: mt7986-apmixed: Use PLL_AO flag to set critical clock	AngeloGioacchino Del Regno	1	-3/+1
2023-03-13	clk: mediatek: Propagate struct device with mtk_clk_register_dividers()	AngeloGioacchino Del Regno	4	-6/+9
2023-03-13	clk: mediatek: mt8516: Allow building clock drivers as modules	AngeloGioacchino Del Regno	1	-2/+2
2023-03-13	clk: mediatek: mt8516: Convert to platform driver and simple probe	AngeloGioacchino Del Regno	2	-66/+57
2023-03-13	clk: mediatek: mt8516: Move apmixedsys clock driver to its own file	AngeloGioacchino Del Regno	3	-82/+122
2023-03-13	clk: mediatek: mt7622: Convert to platform driver and simple probe	AngeloGioacchino Del Regno	1	-94/+31
2023-03-13	clk: mediatek: mt7622: Move infracfg to clk-mt7622-infracfg.c	AngeloGioacchino Del Regno	3	-74/+134
2023-03-13	clk: mediatek: mt7622-apmixedsys: Add .remove() callback for module build	AngeloGioacchino Del Regno	1	-1/+15
2023-03-13	clk: mediatek: mt7622: Move apmixedsys clock driver to its own file	AngeloGioacchino Del Regno	3	-88/+138
2023-03-13	clk: mediatek: mt7622: Properly use CLK_IS_CRITICAL flag	AngeloGioacchino Del Regno	1	-20/+15
2023-03-13	clk: mediatek: Consistently use GATE_MTK() macro	AngeloGioacchino Del Regno	47	-839/+223
2023-03-13	clk: mediatek: mt8183: Convert all remaining clocks to common probe	AngeloGioacchino Del Regno	1	-132/+34
2023-03-13	clk: mediatek: mt8183: Compress clocks arrays entries where possible	AngeloGioacchino Del Regno	1	-300/+150
2023-03-13	clk: mediatek: mt8183: Move apmixedsys clock driver to its own file	AngeloGioacchino Del Regno	3	-154/+194
2023-03-13	clk: mediatek: mt8167: Convert to mtk_clk_simple_{probe,remove}()	AngeloGioacchino Del Regno	5	-113/+101
2023-03-13	clk: mediatek: mt8167: Remove __initconst annotation from arrays	AngeloGioacchino Del Regno	5	-54/+54
2023-03-13	clk: mediatek: mt8167: Move apmixedsys as platform_driver in new file	AngeloGioacchino Del Regno	3	-103/+144
2023-03-13	clk: mediatek: mt8167: Compress GATE_TOPx macros	AngeloGioacchino Del Regno	1	-64/+16
2023-03-13	clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()	AngeloGioacchino Del Regno	1	-204/+37
2023-03-13	clk: mediatek: mt8365: Join top_misc_mux_gates and top_misc_muxes arrays	AngeloGioacchino Del Regno	1	-32/+14
2023-03-13	clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks	AngeloGioacchino Del Regno	1	-107/+82
2023-03-13	clk: mediatek: mt8365: Move apmixedsys clock driver to its own file	AngeloGioacchino Del Regno	3	-144/+165
2023-03-13	clk: mediatek: mt2712: Change to use module_platform_driver macro	AngeloGioacchino Del Regno	1	-11/+5
2023-03-13	clk: mediatek: mt2712-apmixedsys: Add .remove() callback for module build	AngeloGioacchino Del Regno	1	-1/+14
2023-03-13	clk: mediatek: mt2712: Move apmixedsys clock driver to its own file	AngeloGioacchino Del Regno	3	-165/+154