From d27c76fcd4190cab051543b2ffa2f183a6142c0a Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Fri, 20 Sep 2024 18:44:59 +0300 Subject: dt-bindings: arm: cpus: Add Samsung Mongoose M2 Add a compatible for the Samsung Mongoose M2, found in exynos8895. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240920154508.1618410-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index f308ff6c3532..e41a8aec6066 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -206,6 +206,7 @@ properties: - qcom,kryo780 - qcom,oryon - qcom,scorpion + - samsung,mongoose-m2 enable-method: $ref: /schemas/types.yaml#/definitions/string -- cgit v1.2.3-59-g8ed1b From 2caf56f6cf69b026749a2c6c8ad083e5c47b8362 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Fri, 20 Sep 2024 18:45:07 +0300 Subject: dt-bindings: arm: samsung: Document dreamlte board binding Add binding for the Samsung Galaxy S8 (SM-G950F) board, which is based on the Samsung Exynos8895 SoC. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240920154508.1618410-10-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 01dcbd8aa703..49884a7ab5c6 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -224,6 +224,12 @@ properties: - winlink,e850-96 # WinLink E850-96 - const: samsung,exynos850 + - description: Exynos8895 based boards + items: + - enum: + - samsung,dreamlte # Samsung Galaxy S8 (SM-G950F) + - const: samsung,exynos8895 + - description: Exynos Auto v9 based boards items: - enum: -- cgit v1.2.3-59-g8ed1b From 496374c1d0045177cb5c3e85ce33b2179b11a413 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Fri, 20 Sep 2024 18:45:05 +0300 Subject: dt-bindings: soc: samsung: exynos-pmu: Add exynos8895 compatible Add exynos8895-pmu compatible to the bindings documentation. Since Samsung, as usual, reuses devices from older designs, use the samsung,exynos7-pmu compatible. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240920154508.1618410-8-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 15fcd8f1d8bc..5c4ba6c65e69 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -53,6 +53,7 @@ properties: - items: - enum: - samsung,exynos7885-pmu + - samsung,exynos8895-pmu - samsung,exynosautov9-pmu - samsung,exynosautov920-pmu - tesla,fsd-pmu -- cgit v1.2.3-59-g8ed1b From dcabaa8ae457647e334bbcaf21f9209315e8f752 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Fri, 20 Sep 2024 18:45:06 +0300 Subject: arm64: dts: exynos: Add initial support for exynos8895 SoC Exynos 8895 SoC is an ARMv8 mobile SoC found in the Samsung Galaxy S8 (dreamlte), S8 Plus (dream2lte), Note 8 (greatlte) and the Meizu 15 Plus (m1891). Add minimal support for that SoC, including: - All 8 cores via PSCI - ChipID - Generic ARMV8 Timer - Enumarate all pinctrl nodes The devices using this SoC suffer from an issue caused by the stock Samsung bootloader, as it doesn't configure CNTFRQ_EL0. Hence it's needed to hardcode the adequate frequency in the timer node, otherwise the kernel panics. Further platform support will be added over time. Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20240920154508.1618410-9-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi | 1094 ++++++++++++++++++++ arch/arm64/boot/dts/exynos/exynos8895.dtsi | 251 +++++ 2 files changed, 1345 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos8895.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi new file mode 100644 index 000000000000..51e9c9c4b166 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi @@ -0,0 +1,1094 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_abox { + gph0: gph0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph1: gph1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph3: gph3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + }; + + bt_hostwake: bt-hostwake-pins { + samsung,pins = "gpa2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_wake: pcie-wake-pins { + samsung,pins = "gpa3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart1_bus: uart1-bus-pins { + samsung,pins = "gpa4-4", "gpa4-3", "gpa4-2", "gpa4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + wlan_host_wake: wlan-host-wake-pins { + samsung,pins = "gpa0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; +}; + +&pinctrl_busc { + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins = "gpb2-1", "gpb2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins = "gpb2-0"; + samsung,pin-function = ; + samsung,pin-con-pdn = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; + +&pinctrl_fsys0 { + gpi0: gpi0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpi1: gpi1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gpi0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gpi0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; +}; + +&pinctrl_fsys1 { + gpj0: gpj0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj1: gpj1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + bt_btwake: bt-btwake-pins { + samsung,pins = "gpj1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + bt_en: bt-en-pins { + samsung,pins ="gpj1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + cfg_wlanen: cfg-wlanen-pins { + samsung,pins = "gpj1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins = "gpj0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins = "gpj0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins = "gpj0-3", "gpj0-4", "gpj0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* For Drive strength swapping */ + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fast-slew-rate-3x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; + +&pinctrl_peric0 { + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd0: gpd0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd2: gpd2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd3: gpd3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe7: gpe7-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins = "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins = "gpd1-3", "gpd1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins = "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins = "gpd1-7", "gpd1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins = "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins = "gpd2-3", "gpd2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins = "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins = "gpd3-3", "gpd3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hs_i2c14_bus: hs-i2c14-bus-pins { + samsung,pins = "gpe6-3", "gpe6-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins = "gpd1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins = "gpd1-7", "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins = "gpd1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins = "gpd2-3", "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins = "gpd2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins = "gpd3-3", "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins = "gpd3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins = "gpd0-7", "gpd0-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus: uart2-bus-pins { + samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins = "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus: uart3-bus-pins { + samsung,pins = "gpd1-7", "gpd1-6", "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins = "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus: uart4-bus-pins { + samsung,pins = "gpd2-3", "gpd2-2", "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins = "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus: uart5-bus-pins { + samsung,pins = "gpd3-3", "gpd3-2", "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins = "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric1 { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc2: gpc2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc3: gpc3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe2: gpe2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe3: gpe3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe4: gpe4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe5: gpe5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe6: gpe6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk0: gpk0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + hrm_irq: hrm-irq-pins { + samsung,pins = "gpe6-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins = "gpc2-1", "gpc2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins = "gpc2-3", "gpc2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins = "gpc2-5", "gpc2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins = "gpc2-7", "gpc2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins = "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins = "gpe5-3", "gpe5-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins = "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins = "gpe1-3", "gpe1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins = "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins = "gpe1-7", "gpe1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins = "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins = "gpe2-3", "gpe2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins = "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins = "gpe2-7", "gpe2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins = "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins = "gpe3-3", "gpe3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins = "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins = "gpe3-7", "gpe3-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins = "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins = "gpe4-3", "gpe4-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins = "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins = "gpe4-7", "gpe4-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins = "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins = "gpe5-7", "gpe5-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins = "gpc3-3", "gpc3-2", "gpc3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins = "gpc3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins = "gpc3-7", "gpc3-6", "gpc3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins = "gpc3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins = "gpe5-3", "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins = "gpe5-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins = "gpe1-3", "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins = "gpe1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins = "gpe1-7", "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins = "gpe1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins = "gpe2-3", "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins = "gpe2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_bus: spi10-bus-pins { + samsung,pins = "gpe2-7", "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins = "gpe2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_bus: spi11-bus-pins { + samsung,pins = "gpe3-3", "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins = "gpe3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi12_bus: spi12-bus-pins { + samsung,pins = "gpe3-7", "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins = "gpe3-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi13_bus: spi13-bus-pins { + samsung,pins = "gpe4-3", "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins = "gpe4-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi14_bus: spi14-bus-pins { + samsung,pins = "gpe4-7", "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins = "gpe4-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi15_bus: spi15-bus-pins { + samsung,pins = "gpe5-7", "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins = "gpe5-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + uart6_bus: uart6-bus-pins { + samsung,pins = "gpe5-3", "gpe5-2", "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins = "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus: uart7-bus-pins { + samsung,pins = "gpe1-3", "gpe1-2", "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins = "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus: uart8-bus-pins { + samsung,pins = "gpe1-7", "gpe1-6", "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins = "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus: uart9-bus-pins { + samsung,pins = "gpe2-3", "gpe2-2", "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins = "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus: uart10-bus-pins { + samsung,pins = "gpe2-7", "gpe2-6", "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins = "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus: uart11-bus-pins { + samsung,pins = "gpe3-3", "gpe3-2", "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins = "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart12_bus: uart12-bus-pins { + samsung,pins = "gpe3-7", "gpe3-6", "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins = "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart13_bus: uart13-bus-pins { + samsung,pins = "gpe4-3", "gpe4-2", "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins = "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart14_bus: uart14-bus-pins { + samsung,pins = "gpe4-7", "gpe4-6", "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins = "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart15_bus: uart15-bus-pins { + samsung,pins = "gpe5-7", "gpe5-6", "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins = "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_vts { + gph2: gph2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi new file mode 100644 index 000000000000..223ebd482f10 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include + +/ { + compatible = "samsung,exynos8895"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_abox; + pinctrl2 = &pinctrl_vts; + pinctrl3 = &pinctrl_fsys0; + pinctrl4 = &pinctrl_fsys1; + pinctrl5 = &pinctrl_busc; + pinctrl6 = &pinctrl_peric0; + pinctrl7 = &pinctrl_peric1; + }; + + arm-a53-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + /* There's no PMU model for the Mongoose cores */ + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu4: cpu@0 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu5: cpu@1 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x1>; + enable-method = "psci"; + }; + + cpu6: cpu@2 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x2>; + enable-method = "psci"; + }; + + cpu7: cpu@3 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x3>; + enable-method = "psci"; + }; + + cpu0: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu1: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x101>; + enable-method = "psci"; + }; + + cpu2: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x102>; + enable-method = "psci"; + }; + + cpu3: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x103>; + enable-method = "psci"; + }; + }; + + oscclk: osc-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "oscclk"; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + cpu_suspend = <0xc4000001>; + }; + + soc: soc@0 { + compatible = "simple-bus"; + ranges = <0x0 0x0 0x0 0x20000000>; + + #address-cells = <1>; + #size-cells = <1>; + + chipid@10000000 { + compatible = "samsung,exynos8895-chipid", + "samsung,exynos850-chipid"; + reg = <0x10000000 0x24>; + }; + + gic: interrupt-controller@10201000 { + compatible = "arm,gic-400"; + reg = <0x10201000 0x1000>, + <0x10202000 0x1000>, + <0x10204000 0x2000>, + <0x10206000 0x2000>; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + #address-cells = <0>; + #size-cells = <1>; + }; + + pinctrl_peric0: pinctrl@104d0000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x104d0000 0x1000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10980000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x10980000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys0: pinctrl@11050000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x11050000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys1: pinctrl@11430000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x11430000 0x1000>; + interrupts = ; + }; + + pinctrl_abox: pinctrl@13e60000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x13e60000 0x1000>; + }; + + pinctrl_vts: pinctrl@14080000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x14080000 0x1000>; + }; + + pinctrl_busc: pinctrl@15a30000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x15a30000 0x1000>; + interrupts = ; + }; + + pmu_system_controller: system-controller@16480000 { + compatible = "samsung,exynos8895-pmu", + "samsung,exynos7-pmu", "syscon"; + reg = <0x16480000 0x10000>; + }; + + pinctrl_alive: pinctrl@164b0000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x164b0000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos8895-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + /* Hypervisor Virtual Timer interrupt is not wired to GIC */ + interrupts = , + , + , + ; + /* + * Non-updatable, broken stock Samsung bootloader does not + * configure CNTFRQ_EL0 + */ + clock-frequency = <26000000>; + }; +}; + +#include "exynos8895-pinctrl.dtsi" +#include "arm/samsung/exynos-syscon-restart.dtsi" -- cgit v1.2.3-59-g8ed1b From 296621bfa3ddefcbc4a3c1f64f6e868680a1be59 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Fri, 20 Sep 2024 18:45:08 +0300 Subject: arm64: dts: exynos: Add initial support for Samsung Galaxy S8 Samsung Galaxy S8 (SM-G950F), codenamed dreamlte, is a mobile phone from 2017. It features 4GB RAM, 64GB UFS 2.1, Exynos 8895 SoC and a 1440x2960 Super AMOLED display. This initial device tree enables SimpleFB, PSTORE and GPIO keys. Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20240920154508.1618410-11-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/Makefile | 1 + arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts | 126 +++++++++++++++++++++ 2 files changed, 127 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index d7f2191c2cdb..18f5a3eed523 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -7,5 +7,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos7-espresso.dtb \ exynos7885-jackpotlte.dtb \ exynos850-e850-96.dtb \ + exynos8895-dreamlte.dtb \ exynosautov9-sadk.dtb \ exynosautov920-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts new file mode 100644 index 000000000000..3a376ab2bb9e --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Galaxy S8 (dreamlte/SM-G950F) device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +/dts-v1/; +#include "exynos8895.dtsi" +#include +#include +#include + +/ { + model = "Samsung Galaxy S8 (SM-G950F)"; + compatible = "samsung,dreamlte", "samsung,exynos8895"; + chassis-type = "handset"; + + chosen { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + framebuffer: framebuffer@cc000000 { + compatible = "simple-framebuffer"; + reg = <0 0xcc000000 (1440 * 2960 * 4)>; + width = <1440>; + height = <2960>; + stride = <(1440 * 4)>; + format = "a8r8g8b8"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x3c800000>, + <0x0 0xc0000000 0x40000000>, + <0x8 0x80000000 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + ramoops@92000000 { + compatible = "ramoops"; + reg = <0 0x92000000 0x8000>; + record-size = <0x4000>; + console-size = <0x4000>; + }; + + cont_splash_mem: framebuffer@cc000000 { + reg = <0 0xcc000000 (1440 * 2960 * 4)>; + no-map; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&key_power &key_voldown &key_volup &key_wink>; + pinctrl-names = "default"; + + power-key { + label = "Power"; + linux,code = ; + gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + voldown-key { + label = "Volume Down"; + linux,code = ; + gpios = <&gpa0 4 GPIO_ACTIVE_LOW>; + }; + + volup-key { + label = "Volume Up"; + linux,code = ; + gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; + }; + + /* Typically used for Bixby. Map it as a camera button for now */ + wink-key { + label = "Camera"; + linux,code = ; + gpios = <&gpa0 6 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + }; +}; + +&oscclk { + clock-frequency = <26000000>; +}; + +&pinctrl_alive { + key_power: key-power-pins { + samsung,pins = "gpa2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_voldown: key-voldown-pins { + samsung,pins = "gpa0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_volup: key-volup-pins { + samsung,pins = "gpa0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_wink: key-wink-pins { + samsung,pins = "gpa0-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; -- cgit v1.2.3-59-g8ed1b From 440e3dcd7c739ba5b256196a89e796fb7e59c755 Mon Sep 17 00:00:00 2001 From: Sunyeal Hong Date: Wed, 9 Oct 2024 13:21:08 +0900 Subject: dt-bindings: clock: exynosautov920: add peric1, misc and hsi0/1 clock definitions Add peric1, misc and hsi0/1 clock definitions. - CMU_PERIC1 for USI, IC2 and I3C - CMU_MISC for MISC, GIC and OTP - HSI0 for PCIE - HSI1 for USB and MMC Signed-off-by: Sunyeal Hong Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20241009042110.2379903-2-sunyeal.hong@samsung.com Signed-off-by: Krzysztof Kozlowski --- include/dt-bindings/clock/samsung,exynosautov920.h | 47 ++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/include/dt-bindings/clock/samsung,exynosautov920.h b/include/dt-bindings/clock/samsung,exynosautov920.h index c720f344b6bf..0c681f2ba3d0 100644 --- a/include/dt-bindings/clock/samsung,exynosautov920.h +++ b/include/dt-bindings/clock/samsung,exynosautov920.h @@ -160,6 +160,7 @@ #define DOUT_CLKCMU_SNW_NOC 144 #define DOUT_CLKCMU_SSP_NOC 145 #define DOUT_CLKCMU_TAA_NOC 146 +#define DOUT_TCXO_DIV2 147 /* CMU_PERIC0 */ #define CLK_MOUT_PERIC0_IP_USER 1 @@ -188,4 +189,50 @@ #define CLK_DOUT_PERIC0_USI_I2C 23 #define CLK_DOUT_PERIC0_I3C 24 +/* CMU_PERIC1 */ +#define CLK_MOUT_PERIC1_IP_USER 1 +#define CLK_MOUT_PERIC1_NOC_USER 2 +#define CLK_MOUT_PERIC1_USI09_USI 3 +#define CLK_MOUT_PERIC1_USI10_USI 4 +#define CLK_MOUT_PERIC1_USI11_USI 5 +#define CLK_MOUT_PERIC1_USI12_USI 6 +#define CLK_MOUT_PERIC1_USI13_USI 7 +#define CLK_MOUT_PERIC1_USI14_USI 8 +#define CLK_MOUT_PERIC1_USI15_USI 9 +#define CLK_MOUT_PERIC1_USI16_USI 10 +#define CLK_MOUT_PERIC1_USI17_USI 11 +#define CLK_MOUT_PERIC1_USI_I2C 12 +#define CLK_MOUT_PERIC1_I3C 13 + +#define CLK_DOUT_PERIC1_USI09_USI 14 +#define CLK_DOUT_PERIC1_USI10_USI 15 +#define CLK_DOUT_PERIC1_USI11_USI 16 +#define CLK_DOUT_PERIC1_USI12_USI 17 +#define CLK_DOUT_PERIC1_USI13_USI 18 +#define CLK_DOUT_PERIC1_USI14_USI 19 +#define CLK_DOUT_PERIC1_USI15_USI 20 +#define CLK_DOUT_PERIC1_USI16_USI 21 +#define CLK_DOUT_PERIC1_USI17_USI 22 +#define CLK_DOUT_PERIC1_USI_I2C 23 +#define CLK_DOUT_PERIC1_I3C 24 + +/* CMU_MISC */ +#define CLK_MOUT_MISC_NOC_USER 1 +#define CLK_MOUT_MISC_GIC 2 + +#define CLK_DOUT_MISC_OTP 3 +#define CLK_DOUT_MISC_NOCP 4 +#define CLK_DOUT_MISC_OSC_DIV2 5 + +/* CMU_HSI0 */ +#define CLK_MOUT_HSI0_NOC_USER 1 + +#define CLK_DOUT_HSI0_PCIE_APB 2 + +/* CMU_HSI1 */ +#define CLK_MOUT_HSI1_MMC_CARD_USER 1 +#define CLK_MOUT_HSI1_NOC_USER 2 +#define CLK_MOUT_HSI1_USBDRD_USER 3 +#define CLK_MOUT_HSI1_USBDRD 4 + #endif /* _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H */ -- cgit v1.2.3-59-g8ed1b From ef1c2a54cbc7d9446659115c3a61e03f97ba4a57 Mon Sep 17 00:00:00 2001 From: Sunyeal Hong Date: Wed, 9 Oct 2024 13:21:10 +0900 Subject: arm64: dts: exynosautov920: add peric1, misc and hsi0/1 clock DT nodes Add cmu_peric1 for USI, I2C and I3C clocks respectively. Add cmu_misc for MISC, GIC and OTP clocks respectively. Add cmu_hsi0 for PCIE clocks respectively. Add cmu_hsi1 for USB and MMC clocks respectively. Signed-off-by: Sunyeal Hong Link: https://lore.kernel.org/r/20241009042110.2379903-4-sunyeal.hong@samsung.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 50 ++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index 91882b37fdb3..c759134c909e 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -172,6 +172,17 @@ reg = <0x10000000 0x24>; }; + cmu_misc: clock-controller@10020000 { + compatible = "samsung,exynosautov920-cmu-misc"; + reg = <0x10020000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_MISC_NOC>; + clock-names = "oscclk", + "noc"; + }; + gic: interrupt-controller@10400000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -247,6 +258,19 @@ status = "disabled"; }; + cmu_peric1: clock-controller@10c00000 { + compatible = "samsung,exynosautov920-cmu-peric1"; + reg = <0x10c00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_PERIC1_NOC>, + <&cmu_top DOUT_CLKCMU_PERIC1_IP>; + clock-names = "oscclk", + "noc", + "ip"; + }; + syscon_peric1: syscon@10c20000 { compatible = "samsung,exynosautov920-peric1-sysreg", "syscon"; @@ -283,12 +307,38 @@ reg = <0x11860000 0x10000>; }; + cmu_hsi0: clock-controller@16000000 { + compatible = "samsung,exynosautov920-cmu-hsi0"; + reg = <0x16000000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_HSI0_NOC>; + clock-names = "oscclk", + "noc"; + }; + pinctrl_hsi0: pinctrl@16040000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x16040000 0x10000>; interrupts = ; }; + cmu_hsi1: clock-controller@16400000 { + compatible = "samsung,exynosautov920-cmu-hsi1"; + reg = <0x16400000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_HSI1_NOC>, + <&cmu_top DOUT_CLKCMU_HSI1_USBDRD>, + <&cmu_top DOUT_CLKCMU_HSI1_MMC_CARD>; + clock-names = "oscclk", + "noc", + "usbdrd", + "mmc_card"; + }; + pinctrl_hsi1: pinctrl@16450000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x16450000 0x10000>; -- cgit v1.2.3-59-g8ed1b From 0d16910e899d0645e45128102c5113836eaf9bc1 Mon Sep 17 00:00:00 2001 From: Igor Belwon Date: Wed, 16 Oct 2024 17:47:42 +0200 Subject: dt-bindings: arm: cpus: Add Samsung Mongoose M5 Add a compatible for the Samsung Mongoose M5 cores, found in the Exynos 990. Signed-off-by: Igor Belwon Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20241016154747.64343-2-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index e41a8aec6066..c54d20dd9d7e 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -207,6 +207,7 @@ properties: - qcom,oryon - qcom,scorpion - samsung,mongoose-m2 + - samsung,mongoose-m5 enable-method: $ref: /schemas/types.yaml#/definitions/string -- cgit v1.2.3-59-g8ed1b From f7aeff28f2768443a49600625b6f3d0aad1fdd52 Mon Sep 17 00:00:00 2001 From: Igor Belwon Date: Wed, 16 Oct 2024 17:47:44 +0200 Subject: dt-bindings: arm: samsung: samsung-boards: Add bindings for Exynos 990 boards Add devicetree bindings for Exynos 990 boards. Currently the Galaxy Note20 5G (c1s). Signed-off-by: Igor Belwon Link: https://lore.kernel.org/r/20241016154747.64343-4-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 49884a7ab5c6..d25a17e69725 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -230,6 +230,12 @@ properties: - samsung,dreamlte # Samsung Galaxy S8 (SM-G950F) - const: samsung,exynos8895 + - description: Exynos990 based boards + items: + - enum: + - samsung,c1s # Samsung Galaxy Note20 5G (SM-N981B) + - const: samsung,exynos990 + - description: Exynos Auto v9 based boards items: - enum: -- cgit v1.2.3-59-g8ed1b From 1e5f14efd65caf1d173af8fb4eeb3e04b2625ad3 Mon Sep 17 00:00:00 2001 From: Igor Belwon Date: Wed, 16 Oct 2024 17:47:46 +0200 Subject: arm64: dts: exynos: Add initial support for the Exynos 990 SoC The Exynos 990 SoC is an ARMv8 mobile SoC found in Samsung Galaxy N/S20 series phones (x1sxxx, c1sxxx). Add minimal support for this SoC, including: - All 8 cores via PSCI - ChipID - Generic timer. - Pinctrl The devices using this SoC suffer from the same issue as Exynos 8895 caused by the stock Samsung bootloader, as it doesn't configure CNTFRQ_EL0. Hence it's needed to hardcode the adequate frequency in the timer node, otherwise the kernel panics. Signed-off-by: Igor Belwon Link: https://lore.kernel.org/r/20241016154747.64343-6-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi | 2195 +++++++++++++++++++++ arch/arm64/boot/dts/exynos/exynos990.dtsi | 251 +++ 2 files changed, 2446 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos990.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi new file mode 100644 index 000000000000..a03d36458d76 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos990-pinctrl.dtsi @@ -0,0 +1,2195 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Exynos 990 pin-mux and pin-config device tree source + * + * Copyright (c) 2024, Igor Belwon + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + ; + }; + + gpq0: gpq0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins = "gpq0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + speedy1_bus: speedy1-bus-pins { + samsung,pins = "gpq0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* UART1 is also referred to as UART_BT in downstream. */ + uart1_bus_single: uart1-bus-pins { + samsung,pins = "gpq0-3", "gpq0-2", "gpq0-1", "gpq0-0"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-pud = ; + }; + + uart1_rxd_pull: uart1-bus-rxd-pins { + samsung,pins = "gpq0-0"; + samsung,pin-pud = ; + }; + + uart1_bus_rts: uart1-bus-rts-pins { + samsung,pins = "gpq0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart1_bus_tx_input: uart1-bus-tx-input-pins { + samsung,pins = "gpq0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart1_bus_tx_dat: uart1-bus-tx-dat-pins { + samsung,pins = "gpq0-1"; + }; + + uart1_bus_tx_con: uart1-bus-tx-con-pins { + samsung,pins = "gpq0-1"; + samsung,pin-function = ; + }; + + wlan_host_wake: wlan-host-wake-pins { + samsung,pins = "gpa0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_cmgp { + gpm0: gpm0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm1: gpm1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm2: gpm2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm3: gpm3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm4: gpm4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm5: gpm5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm6: gpm6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm7: gpm7-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm8: gpm8-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm9: gpm9-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm10: gpm10-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm11: gpm11-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm12: gpm12-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm13: gpm13-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm14: gpm14-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm15: gpm15-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm16: gpm16-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm17: gpm17-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm18: gpm18-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm19: gpm19-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm20: gpm20-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm21: gpm21-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm22: gpm22-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm23: gpm23-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm24: gpm24-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm25: gpm25-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm26: gpm26-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm27: gpm27-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm28: gpm28-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm29: gpm29-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm30: gpm30-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm31: gpm31-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm32: gpm32-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + gpm33: gpm33-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + hsi2c38_bus: hsi2c38-bus-pins { + samsung,pins = "gpm0-0", "gpm1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c39_bus: hsi2c39-bus-pins { + samsung,pins = "gpm2-0", "gpm3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c40_bus: hsi2c40-bus-pins { + samsung,pins = "gpm4-0", "gpm5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c41_bus: hsi2c41-bus-pins { + samsung,pins = "gpm6-0", "gpm7-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c42_bus: hsi2c42-bus-pins { + samsung,pins = "gpm8-0", "gpm9-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c43_bus: hsi2c43-bus-pins { + samsung,pins = "gpm10-0", "gpm11-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c44_bus: hsi2c44-bus-pins { + samsung,pins = "gpm12-0", "gpm13-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c45_bus: hsi2c45-bus-pins { + samsung,pins = "gpm14-0", "gpm15-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi19_bus: spi19-bus-pins { + samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi19_cs: spi19-cs-pins { + samsung,pins = "gpm3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi19_cs_func: spi19-cs-func-pins { + samsung,pins = "gpm3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi20_bus: spi20-bus-pins { + samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi20_cs: spi20-cs-pins { + samsung,pins = "gpm7-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi20_cs_func: spi20-cs-func-pins { + samsung,pins = "gpm7-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi21_bus: spi21-bus-pins { + samsung,pins = "gpm8-0", "gpm9-0", "gpm10-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi21_cs: spi21-cs-pins { + samsung,pins = "gpm11-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi21_cs_func: spi21-cs-func-pins { + samsung,pins = "gpm11-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi22_bus: spi22-bus-pins { + samsung,pins = "gpm12-0", "gpm13-0", "gpm14-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi22_cs: spi22-cs-pins { + samsung,pins = "gpm15-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi22_cs_func: spi22-cs-func-pins { + samsung,pins = "gpm15-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + uart21_bus_single: uart21-bus-pins { + samsung,pins = "gpm0-0", "gpm1-0", "gpm2-0", "gpm3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart21_bus_dual: uart21-bus-dual-pins { + samsung,pins = "gpm0-0", "gpm1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart22_bus_single: uart22-bus-pins { + samsung,pins = "gpm4-0", "gpm5-0", "gpm6-0", "gpm7-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart22_bus_dual: uart22-bus-dual-pins { + samsung,pins = "gpm4-0", "gpm5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart23_bus_single: uart23-bus-pins { + samsung,pins = "gpm8-0", "gpm9-0", "gpm10-0", "gpm11-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart23_bus_dual: uart23-bus-dual-pins { + samsung,pins = "gpm8-0", "gpm9-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart24_bus_single: uart24-bus-pins { + samsung,pins = "gpm12-0", "gpm13-0", "gpm14-0", "gpm15-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart24_bus_dual: uart24-bus-dual-pins { + samsung,pins = "gpm12-0", "gpm13-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_hsi1 { + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf2: gpf2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pcie0_clkreq: pcie0-clkreq-pins { + samsung,pins = "gpf0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie0_perst: pcie0-perst-pins { + samsung,pins = "gpf0-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie1_clkreq: pcie1-clkreq-pins { + samsung,pins = "gpf0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie1_perst: pcie1-perst-pins { + samsung,pins = "gpf0-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gpf2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gpf2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins = "gpf1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins = "gpf1-3", "gpf1-4", "gpf1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_1x: sd2-clk-fast-slew-rate-1x-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_1_5x: sd2-clk-fast-slew-rate-1-5x-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk-fast-slew-rate-2x-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_2_5x: sd2-clk-fast-slew-rate-2-5x-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk-fas-slew-rate-3x-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk-fast-slew-rate-4x-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_pins_as_pdn: sd2-pins-as-pdn-pins { + samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4", "gpf1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_hsi2 { + gpf3: gpf3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pcie2_clkreq: pcie2-clkreq-pins { + samsung,pins = "gpf3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie2_perst: pcie2-perst-pins { + samsung,pins = "gpf3-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; +}; + +&pinctrl_peric0 { + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp0: gpp0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp1: gpp1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp3: gpp3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp4: gpp4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins = "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins = "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins = "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins = "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins = "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins = "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins = "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins = "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins = "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_fp_inactive: spi4-fp-inactive-pins { + samsung,pins = "gpp2-3", "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_fp_cs_func_high: spi4-fp-cs-func-high-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi13_bus: spi13-bus-pins { + samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi13_cs_func: spi13-cs-func-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi14_bus: spi14-bus-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi14_cs_func: spi14-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi15_bus: spi15-bus-pins { + samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi15_cs_func: spi15-cs-func-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins = "gpp4-6", "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus_single: uart2-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus_single: uart3-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus_single: uart4-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus_single: uart5-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_bus_single: uart6-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus_single: uart7-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart15_bus_single: uart15-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart16_bus_single: uart16-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart16_bus_dual: uart16-bus-dual-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart17_bus_single: uart17-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart17_bus_dual: uart17-bus-dual-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric1 { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp5: gpp5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp6: gpp6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp7: gpp7-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp8: gpp8-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp9: gpp9-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + aud_i2s0_bus: aud-i2s0-bus-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s0_idle: aud-i2s0-idle-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_bus: aud-i2s1-bus-pins { + samsung,pins = "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_idle: aud-i2s1-idle-pins { + samsung,pins = "gpb0-4", "gpb0-5", "gpb0-6", "gpb0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_bus: aud-i2s2-bus-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_idle: aud-i2s2-idle-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_bus: aud-i2s3-bus-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_idle: aud-i2s3-idle-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_bus: aud-i2s4-bus-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_pci: aud-i2s4-pci-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_idle: aud-i2s4-idle-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_bus: aud-i2s5-bus-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_idle: aud-i2s5-idle-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_dsd_bus: aud-dsd-bus-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_dsd_idle: aud-dsd-idle-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + cfg_wlanen: cfg-wlanen-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + cnss_wlan_en_active: cnss-wlan-en-active-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + cnss_wlan_en_sleep: cnss-wlan-en-sleep-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + decon_f_te_on: decon-f-te-on-pins { + samsung,pins = "gpc0-4"; + samsung,pin-function = <0xf>; + }; + + decon_f_te_off: decon-f-te-off-pins { + samsung,pins = "gpc0-4"; + samsung,pin-function = ; + }; + + decon_s_te_on: decon-s-te-on-pins { + samsung,pins = "gpc0-5"; + samsung,pin-function = <0xf>; + }; + + decon_s_te_off: decon-s-te-off-pins { + samsung,pins = "gpc0-5"; + samsung,pin-function = ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins = "gpp5-2", "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins = "gpp5-6", "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins = "gpp6-0", "gpp6-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins = "gpp6-2", "gpp6-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins = "gpp6-4", "gpp6-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins = "gpp6-6", "gpp6-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins = "gpp7-0", "gpp7-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins = "gpp7-2", "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins = "gpp7-4", "gpp7-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins = "gpp7-6", "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins = "gpp8-0", "gpp8-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins = "gpp8-2", "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins = "gpp8-4", "gpp8-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c33_bus: hsi2c33-bus-pins { + samsung,pins = "gpp8-6", "gpp8-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c34_bus: hsi2c34-bus-pins { + samsung,pins = "gpp9-0", "gpp9-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c35_bus: hsi2c35-bus-pins { + samsung,pins = "gpp9-2", "gpp9-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c36_bus: hsi2c36-bus-pins { + samsung,pins = "gpp9-4", "gpp9-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c37_bus: hsi2c37-bus-pins { + samsung,pins = "gpp9-6", "gpp9-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk0_out: sensor-mclk0-out-pins { + samsung,pins = "gpc0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk1_out: sensor-mclk1-out-pins { + samsung,pins = "gpg1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk2_out: sensor-mclk2-out-pins { + samsung,pins = "gpc0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk3_out: sensor-mclk3-out-pins { + samsung,pins = "gpc0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk4_out: sensor-mclk4-out-pins { + samsung,pins = "gpc0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk5_out: sensor-mclk5-out-pins { + samsung,pins = "gpg1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk0_fn: sensor-mclk0-fn-pins { + samsung,pins = "gpc0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk1_fn: sensor-mclk1-fn-pins { + samsung,pins = "gpg1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk2_fn: sensor-mclk2-fn-pins { + samsung,pins = "gpc0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk3_fn: sensor-mclk3-fn-pins { + samsung,pins = "gpc0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk4_fn: sensor-mclk4-fn-pins { + samsung,pins = "gpc0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sensor_mclk5_fn: sensor-mclk5-fn-pins { + samsung,pins = "gpg1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins = "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins = "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins = "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins = "gpp6-2", "gpp6-1", "gpp6-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins = "gpp6-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins = "gpp6-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins = "gpp6-6", "gpp6-5", "gpp6-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins = "gpp6-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins = "gpp6-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_bus: spi10-bus-pins { + samsung,pins = "gpp7-2", "gpp7-1", "gpp7-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins = "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs_func: spi10-cs-func-pins { + samsung,pins = "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_bus: spi11-bus-pins { + samsung,pins = "gpp7-6", "gpp7-5", "gpp7-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins = "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs_func: spi11-cs-func-pins { + samsung,pins = "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi12_bus: spi12-bus-pins { + samsung,pins = "gpp8-2", "gpp8-1", "gpp8-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins = "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi12_cs_func: spi12-cs-func-pins { + samsung,pins = "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi16_bus: spi16-bus-pins { + samsung,pins = "gpp8-6", "gpp8-5", "gpp8-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + spi16_cs: spi16-cs-pins { + samsung,pins = "gpp8-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi16_cs_func: spi16-cs-func-pins { + samsung,pins = "gpp8-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + spi17_bus: spi17-bus-pins { + samsung,pins = "gpp9-2", "gpp9-1", "gpp9-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi17_cs: spi17-cs-pins { + samsung,pins = "gpp9-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi17_cs_func: spi17-cs-func-pins { + samsung,pins = "gpp9-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi18_bus: spi18-bus-pins { + samsung,pins = "gpp9-6", "gpp9-5", "gpp9-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi18_cs: spi18-cs-pins { + samsung,pins = "gpp9-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi18_cs_func: spi18-cs-func-pins { + samsung,pins = "gpp9-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + uart8_bus_single: uart8-bus-pins { + samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus_single: uart9-bus-pins { + samsung,pins = "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus_single: uart10-bus-pins { + samsung,pins = "gpp6-3", "gpp6-2", "gpp6-1", "gpp6-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins = "gpp6-0", "gpp6-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus_single: uart11-bus-pins { + samsung,pins = "gpp6-7", "gpp6-6", "gpp6-5", "gpp6-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins = "gpp6-4", "gpp6-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart12_bus_single: uart12-bus-pins { + samsung,pins = "gpp7-3", "gpp7-2", "gpp7-1", "gpp7-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins = "gpp7-0", "gpp7-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart13_bus_single: uart13-bus-pins { + samsung,pins = "gpp7-7", "gpp7-6", "gpp7-5", "gpp7-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins = "gpp7-4", "gpp7-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart14_bus_single: uart14-bus-pins { + samsung,pins = "gpp8-3", "gpp8-2", "gpp8-1", "gpp8-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins = "gpp8-0", "gpp8-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart18_bus_single: uart18-bus-pins { + samsung,pins = "gpp8-7", "gpp8-6", "gpp8-5", "gpp8-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart18_bus_dual: uart18-bus-dual-pins { + samsung,pins = "gpp8-4", "gpp8-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart19_bus_single: uart19-bus-pins { + samsung,pins = "gpp9-3", "gpp9-2", "gpp9-1", "gpp9-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart19_bus_dual: uart19-bus-dual-pins { + samsung,pins = "gpp9-0", "gpp9-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart20_bus_single: uart20-bus-pins { + samsung,pins = "gpp9-7", "gpp9-6", "gpp9-5", "gpp9-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart20_bus_dual: uart20-bus-dual-pins { + samsung,pins = "gpp9-4", "gpp9-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_vts { + gpv0: gpv0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + amic_pdm: amic-pdm-pins { + samsung,pins = "gpv0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_bus_clk: dmic-bus-clk-pins { + samsung,pins = "gpv0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_bus_clk_idle: dmic-bus-clk-idle-pins { + samsung,pins = "gpv0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_bus_clk1: dmic-bus-clk1-pins { + samsung,pins = "gpv0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_bus_clk1_idle: dmic-bus-clk1-idle-pins { + samsung,pins = "gpv0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_bus_clk2: dmic-bus-clk2-pins { + samsung,pins = "gpv0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_bus_clk2_idle: dmic-bus-clk2-idle-pins { + samsung,pins = "gpv0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_pdm: dmic-pdm-pins { + samsung,pins = "gpv0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_pdm_idle: dmic-pdm-idle-pins { + samsung,pins = "gpv0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_pdm1_bus: dmic-pdm1-bus-pins { + samsung,pins = "gpv0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_pdm1_idle: dmic-pdm1-idle-pins { + samsung,pins = "gpv0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_pdm2_bus: dmic-pdm2-bus-pins { + samsung,pins = "gpv0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + dmic_pdm2_idle: dmic-pdm2-idle-pins { + samsung,pins = "gpv0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi new file mode 100644 index 000000000000..c1986f00e443 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Exynos 990 SoC device tree source + * + * Copyright (c) 2024, Igor Belwon + */ + +#include + +/ { + compatible = "samsung,exynos990"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_cmgp; + pinctrl2 = &pinctrl_hsi1; + pinctrl3 = &pinctrl_hsi2; + pinctrl4 = &pinctrl_peric0; + pinctrl5 = &pinctrl_peric1; + pinctrl6 = &pinctrl_vts; + }; + + arm-a55-pmu { + compatible = "arm,cortex-a55-pmu"; + interrupts = , + , + , + ; + + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + arm-a76-pmu { + compatible = "arm,cortex-a76-pmu"; + interrupts = , + ; + + interrupt-affinity = <&cpu4>, + <&cpu5>; + }; + + /* There's no PMU model for cluster2, which are the Mongoose cores. */ + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + + core1 { + cpu = <&cpu1>; + }; + + core2 { + cpu = <&cpu2>; + }; + + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + + core1 { + cpu = <&cpu5>; + }; + }; + + cluster2 { + core0 { + cpu = <&cpu6>; + }; + + core1 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x3>; + enable-method = "psci"; + }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x4>; + enable-method = "psci"; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x5>; + enable-method = "psci"; + }; + + cpu6: cpu@200 { + device_type = "cpu"; + compatible = "samsung,mongoose-m5"; + reg = <0x6>; + enable-method = "psci"; + }; + + cpu7: cpu@201 { + device_type = "cpu"; + compatible = "samsung,mongoose-m5"; + reg = <0x7>; + enable-method = "psci"; + }; + }; + + oscclk: clock-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "oscclk"; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "hvc"; + }; + + soc: soc@0 { + compatible = "simple-bus"; + ranges = <0x0 0x0 0x0 0x20000000>; + + #address-cells = <1>; + #size-cells = <1>; + + chipid@10000000 { + compatible = "samsung,exynos990-chipid", + "samsung,exynos850-chipid"; + reg = <0x10000000 0x100>; + }; + + gic: interrupt-controller@10101000 { + compatible = "arm,gic-400"; + reg = <0x10101000 0x1000>, + <0x10102000 0x1000>, + <0x10104000 0x2000>, + <0x10106000 0x2000>; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + #address-cells = <0>; + #size-cells = <1>; + }; + + pinctrl_peric0: pinctrl@10430000 { + compatible = "samsung,exynos990-pinctrl"; + reg = <0x10430000 0x1000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10730000 { + compatible = "samsung,exynos990-pinctrl"; + reg = <0x10730000 0x1000>; + interrupts = ; + }; + + pinctrl_hsi1: pinctrl@13040000 { + compatible = "samsung,exynos990-pinctrl"; + reg = <0x13040000 0x1000>; + interrupts = ; + }; + + pinctrl_hsi2: pinctrl@13c30000 { + compatible = "samsung,exynos990-pinctrl"; + reg = <0x13c30000 0x1000>; + interrupts = ; + }; + + pinctrl_vts: pinctrl@15580000 { + compatible = "samsung,exynos990-pinctrl"; + reg = <0x15580000 0x1000>; + }; + + pinctrl_alive: pinctrl@15850000 { + compatible = "samsung,exynos990-pinctrl"; + reg = <0x15850000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos990-wakeup-eint", + "samsung,exynos850-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_cmgp: pinctrl@15c30000 { + compatible = "samsung,exynos990-pinctrl"; + reg = <0x15c30000 0x1000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + + /* + * Non-updatable, broken stock Samsung bootloader does not + * configure CNTFRQ_EL0 + */ + clock-frequency = <26000000>; + }; +}; + +#include "exynos990-pinctrl.dtsi" -- cgit v1.2.3-59-g8ed1b From 8354f854a90bcecd32dc1dc9646e805d60e96f0a Mon Sep 17 00:00:00 2001 From: Igor Belwon Date: Wed, 16 Oct 2024 17:47:47 +0200 Subject: arm64: dts: exynos: Add initial support for Samsung Galaxy Note20 5G (c1s) Add initial support for the Samsung Galaxy Note20 5G (c1s/SM-N981B) phone. It was launched in 2020, and it's based on the Exynos 990 SoC. It has only one configuration with 8GB of RAM, albeit storage options may differ. This device tree adds support for the following: - SimpleFB - 8GB RAM - Buttons Signed-off-by: Igor Belwon Link: https://lore.kernel.org/r/20241016154747.64343-7-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/Makefile | 1 + arch/arm64/boot/dts/exynos/exynos990-c1s.dts | 115 +++++++++++++++++++++++++++ 2 files changed, 116 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos990-c1s.dts diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index 18f5a3eed523..7a934499b235 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -8,5 +8,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos7885-jackpotlte.dtb \ exynos850-e850-96.dtb \ exynos8895-dreamlte.dtb \ + exynos990-c1s.dtb \ exynosautov9-sadk.dtb \ exynosautov920-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts new file mode 100644 index 000000000000..36a6f1377e92 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Galaxy Note20 5G (c1s/SM-N981B) device tree source + * + * Copyright (c) 2024, Igor Belwon + */ + +/dts-v1/; +#include "exynos990.dtsi" +#include +#include +#include + +/ { + model = "Samsung Galaxy Note20"; + compatible = "samsung,c1s", "samsung,exynos990"; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@f1000000 { + compatible = "simple-framebuffer"; + reg = <0 0xf1000000 0 (1080 * 2400 * 4)>; + width = <1080>; + height = <2400>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x3ab00000>, + /* Memory hole */ + <0x0 0xc1200000 0x0 0x1ee00000>, + /* Memory hole */ + <0x0 0xe1900000 0x0 0x1e700000>, + /* Memory hole - last block */ + <0x8 0x80000000 0x1 0x7ec00000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cont_splash_mem: framebuffer@f1000000 { + reg = <0 0xf1000000 0 0x13c6800>; + no-map; + }; + + abox_reserved: audio@f7fb0000 { + reg = <0 0xf7fb0000 0 0x2a50000>; + no-map; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&key_power &key_voldown &key_volup>; + pinctrl-names = "default"; + + power-key { + label = "Power"; + linux,code = ; + gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + voldown-key { + label = "Volume Down"; + linux,code = ; + gpios = <&gpa0 4 GPIO_ACTIVE_LOW>; + }; + + volup-key { + label = "Volume Up"; + linux,code = ; + gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&oscclk { + clock-frequency = <26000000>; +}; + +&pinctrl_alive { + key_power: key-power-pins { + samsung,pins = "gpa2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_voldown: key-voldown-pins { + samsung,pins = "gpa0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_volup: key-volup-pins { + samsung,pins = "gpa0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; -- cgit v1.2.3-59-g8ed1b From a81dca057273c32b8554b3bc562480d4b3816155 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Wed, 23 Oct 2024 12:01:34 +0300 Subject: dt-bindings: clock: samsung: Add Exynos8895 SoC Provide dt-schema documentation for Samsung Exynos8895 SoC clock controller CMU blocks: - CMU_FSYS0/1 - CMU_PERIC0/1 - CMU_PERIS - CMU_TOP Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20241023090136.537395-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/samsung,exynos8895-clock.yaml | 239 +++++++++++ include/dt-bindings/clock/samsung,exynos8895.h | 453 +++++++++++++++++++++ 2 files changed, 692 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos8895-clock.yaml create mode 100644 include/dt-bindings/clock/samsung,exynos8895.h diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos8895-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos8895-clock.yaml new file mode 100644 index 000000000000..111de33ce00b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/samsung,exynos8895-clock.yaml @@ -0,0 +1,239 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/samsung,exynos8895-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos8895 SoC clock controller + +maintainers: + - Ivaylo Ivanov + - Chanwoo Choi + - Krzysztof Kozlowski + +description: | + Exynos8895 clock controller is comprised of several CMU units, generating + clocks for different domains. Those CMU units are modeled as separate device + tree nodes, and might depend on each other. The root clock in that root tree + is an external clock: OSCCLK (26 MHz). This external clock must be defined + as a fixed-rate clock in dts. + + CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and + dividers; all other clocks of function blocks (other CMUs) are usually + derived from CMU_TOP. + + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All clocks available for usage + in clock consumer nodes are defined as preprocessor macros in + 'include/dt-bindings/clock/samsung,exynos8895.h' header. + +properties: + compatible: + enum: + - samsung,exynos8895-cmu-fsys0 + - samsung,exynos8895-cmu-fsys1 + - samsung,exynos8895-cmu-peric0 + - samsung,exynos8895-cmu-peric1 + - samsung,exynos8895-cmu-peris + - samsung,exynos8895-cmu-top + + clocks: + minItems: 1 + maxItems: 16 + + clock-names: + minItems: 1 + maxItems: 16 + + "#clock-cells": + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - reg + - "#clock-cells" + +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos8895-cmu-fsys0 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_FSYS0 BUS clock (from CMU_TOP) + - description: CMU_FSYS0 DPGTC clock (from CMU_TOP) + - description: CMU_FSYS0 MMC_EMBD clock (from CMU_TOP) + - description: CMU_FSYS0 UFS_EMBD clock (from CMU_TOP) + - description: CMU_FSYS0 USBDRD30 clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: dpgtc + - const: mmc + - const: ufs + - const: usbdrd30 + + - if: + properties: + compatible: + contains: + const: samsung,exynos8895-cmu-fsys1 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_FSYS1 BUS clock (from CMU_TOP) + - description: CMU_FSYS1 PCIE clock (from CMU_TOP) + - description: CMU_FSYS1 UFS_CARD clock (from CMU_TOP) + - description: CMU_FSYS1 MMC_CARD clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: pcie + - const: ufs + - const: mmc + + - if: + properties: + compatible: + contains: + const: samsung,exynos8895-cmu-peric0 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_PERIC0 BUS clock (from CMU_TOP) + - description: CMU_PERIC0 UART_DBG clock (from CMU_TOP) + - description: CMU_PERIC0 USI00 clock (from CMU_TOP) + - description: CMU_PERIC0 USI01 clock (from CMU_TOP) + - description: CMU_PERIC0 USI02 clock (from CMU_TOP) + - description: CMU_PERIC0 USI03 clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: uart + - const: usi0 + - const: usi1 + - const: usi2 + - const: usi3 + + - if: + properties: + compatible: + contains: + const: samsung,exynos8895-cmu-peric1 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_PERIC1 BUS clock (from CMU_TOP) + - description: CMU_PERIC1 SPEEDY2 clock (from CMU_TOP) + - description: CMU_PERIC1 SPI_CAM0 clock (from CMU_TOP) + - description: CMU_PERIC1 SPI_CAM1 clock (from CMU_TOP) + - description: CMU_PERIC1 UART_BT clock (from CMU_TOP) + - description: CMU_PERIC1 USI04 clock (from CMU_TOP) + - description: CMU_PERIC1 USI05 clock (from CMU_TOP) + - description: CMU_PERIC1 USI06 clock (from CMU_TOP) + - description: CMU_PERIC1 USI07 clock (from CMU_TOP) + - description: CMU_PERIC1 USI08 clock (from CMU_TOP) + - description: CMU_PERIC1 USI09 clock (from CMU_TOP) + - description: CMU_PERIC1 USI10 clock (from CMU_TOP) + - description: CMU_PERIC1 USI11 clock (from CMU_TOP) + - description: CMU_PERIC1 USI12 clock (from CMU_TOP) + - description: CMU_PERIC1 USI13 clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: speedy + - const: cam0 + - const: cam1 + - const: uart + - const: usi4 + - const: usi5 + - const: usi6 + - const: usi7 + - const: usi8 + - const: usi9 + - const: usi10 + - const: usi11 + - const: usi12 + - const: usi13 + + - if: + properties: + compatible: + contains: + const: samsung,exynos8895-cmu-peris + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_PERIS BUS clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + + - if: + properties: + compatible: + contains: + const: samsung,exynos8895-cmu-top + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + + clock-names: + items: + - const: oscclk + +additionalProperties: false + +examples: + - | + #include + + cmu_fsys1: clock-controller@11400000 { + compatible = "samsung,exynos8895-cmu-fsys1"; + reg = <0x11400000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_FSYS1_BUS>, + <&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>, + <&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>, + <&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>; + clock-names = "oscclk", "bus", "pcie", "ufs", "mmc"; + }; + +... diff --git a/include/dt-bindings/clock/samsung,exynos8895.h b/include/dt-bindings/clock/samsung,exynos8895.h new file mode 100644 index 000000000000..27998c53f929 --- /dev/null +++ b/include/dt-bindings/clock/samsung,exynos8895.h @@ -0,0 +1,453 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) 2024 Ivaylo Ivanov + * Author: Ivaylo Ivanov + * + * Device Tree binding constants for Exynos8895 clock controller. + */ + +#ifndef _DT_BINDINGS_CLOCK_EXYNOS8895_H +#define _DT_BINDINGS_CLOCK_EXYNOS8895_H + +/* CMU_TOP */ +#define CLK_FOUT_SHARED0_PLL 1 +#define CLK_FOUT_SHARED1_PLL 2 +#define CLK_FOUT_SHARED2_PLL 3 +#define CLK_FOUT_SHARED3_PLL 4 +#define CLK_FOUT_SHARED4_PLL 5 +#define CLK_MOUT_PLL_SHARED0 6 +#define CLK_MOUT_PLL_SHARED1 7 +#define CLK_MOUT_PLL_SHARED2 8 +#define CLK_MOUT_PLL_SHARED3 9 +#define CLK_MOUT_PLL_SHARED4 10 +#define CLK_MOUT_CP2AP_MIF_CLK_USER 11 +#define CLK_MOUT_CMU_ABOX_CPUABOX 12 +#define CLK_MOUT_CMU_APM_BUS 13 +#define CLK_MOUT_CMU_BUS1_BUS 14 +#define CLK_MOUT_CMU_BUSC_BUS 15 +#define CLK_MOUT_CMU_BUSC_BUSPHSI2C 16 +#define CLK_MOUT_CMU_CAM_BUS 17 +#define CLK_MOUT_CMU_CAM_TPU0 18 +#define CLK_MOUT_CMU_CAM_TPU1 19 +#define CLK_MOUT_CMU_CAM_VRA 20 +#define CLK_MOUT_CMU_CIS_CLK0 21 +#define CLK_MOUT_CMU_CIS_CLK1 22 +#define CLK_MOUT_CMU_CIS_CLK2 23 +#define CLK_MOUT_CMU_CIS_CLK3 24 +#define CLK_MOUT_CMU_CORE_BUS 25 +#define CLK_MOUT_CMU_CPUCL0_SWITCH 26 +#define CLK_MOUT_CMU_CPUCL1_SWITCH 27 +#define CLK_MOUT_CMU_DBG_BUS 28 +#define CLK_MOUT_CMU_DCAM_BUS 29 +#define CLK_MOUT_CMU_DCAM_IMGD 30 +#define CLK_MOUT_CMU_DPU_BUS 31 +#define CLK_MOUT_CMU_DROOPDETECTOR 32 +#define CLK_MOUT_CMU_DSP_BUS 33 +#define CLK_MOUT_CMU_FSYS0_BUS 34 +#define CLK_MOUT_CMU_FSYS0_DPGTC 35 +#define CLK_MOUT_CMU_FSYS0_MMC_EMBD 36 +#define CLK_MOUT_CMU_FSYS0_UFS_EMBD 37 +#define CLK_MOUT_CMU_FSYS0_USBDRD30 38 +#define CLK_MOUT_CMU_FSYS1_BUS 39 +#define CLK_MOUT_CMU_FSYS1_MMC_CARD 40 +#define CLK_MOUT_CMU_FSYS1_PCIE 41 +#define CLK_MOUT_CMU_FSYS1_UFS_CARD 42 +#define CLK_MOUT_CMU_G2D_G2D 43 +#define CLK_MOUT_CMU_G2D_JPEG 44 +#define CLK_MOUT_CMU_HPM 45 +#define CLK_MOUT_CMU_IMEM_BUS 46 +#define CLK_MOUT_CMU_ISPHQ_BUS 47 +#define CLK_MOUT_CMU_ISPLP_BUS 48 +#define CLK_MOUT_CMU_IVA_BUS 49 +#define CLK_MOUT_CMU_MFC_BUS 50 +#define CLK_MOUT_CMU_MIF_SWITCH 51 +#define CLK_MOUT_CMU_PERIC0_BUS 52 +#define CLK_MOUT_CMU_PERIC0_UART_DBG 53 +#define CLK_MOUT_CMU_PERIC0_USI00 54 +#define CLK_MOUT_CMU_PERIC0_USI01 55 +#define CLK_MOUT_CMU_PERIC0_USI02 56 +#define CLK_MOUT_CMU_PERIC0_USI03 57 +#define CLK_MOUT_CMU_PERIC1_BUS 58 +#define CLK_MOUT_CMU_PERIC1_SPEEDY2 59 +#define CLK_MOUT_CMU_PERIC1_SPI_CAM0 60 +#define CLK_MOUT_CMU_PERIC1_SPI_CAM1 61 +#define CLK_MOUT_CMU_PERIC1_UART_BT 62 +#define CLK_MOUT_CMU_PERIC1_USI04 63 +#define CLK_MOUT_CMU_PERIC1_USI05 64 +#define CLK_MOUT_CMU_PERIC1_USI06 65 +#define CLK_MOUT_CMU_PERIC1_USI07 66 +#define CLK_MOUT_CMU_PERIC1_USI08 67 +#define CLK_MOUT_CMU_PERIC1_USI09 68 +#define CLK_MOUT_CMU_PERIC1_USI10 69 +#define CLK_MOUT_CMU_PERIC1_USI11 70 +#define CLK_MOUT_CMU_PERIC1_USI12 71 +#define CLK_MOUT_CMU_PERIC1_USI13 72 +#define CLK_MOUT_CMU_PERIS_BUS 73 +#define CLK_MOUT_CMU_SRDZ_BUS 74 +#define CLK_MOUT_CMU_SRDZ_IMGD 75 +#define CLK_MOUT_CMU_VPU_BUS 76 +#define CLK_DOUT_CMU_ABOX_CPUABOX 77 +#define CLK_DOUT_CMU_APM_BUS 78 +#define CLK_DOUT_CMU_BUS1_BUS 79 +#define CLK_DOUT_CMU_BUSC_BUS 80 +#define CLK_DOUT_CMU_BUSC_BUSPHSI2C 81 +#define CLK_DOUT_CMU_CAM_BUS 82 +#define CLK_DOUT_CMU_CAM_TPU0 83 +#define CLK_DOUT_CMU_CAM_TPU1 84 +#define CLK_DOUT_CMU_CAM_VRA 85 +#define CLK_DOUT_CMU_CIS_CLK0 86 +#define CLK_DOUT_CMU_CIS_CLK1 87 +#define CLK_DOUT_CMU_CIS_CLK2 88 +#define CLK_DOUT_CMU_CIS_CLK3 89 +#define CLK_DOUT_CMU_CORE_BUS 90 +#define CLK_DOUT_CMU_CPUCL0_SWITCH 91 +#define CLK_DOUT_CMU_CPUCL1_SWITCH 92 +#define CLK_DOUT_CMU_DBG_BUS 93 +#define CLK_DOUT_CMU_DCAM_BUS 94 +#define CLK_DOUT_CMU_DCAM_IMGD 95 +#define CLK_DOUT_CMU_DPU_BUS 96 +#define CLK_DOUT_CMU_DSP_BUS 97 +#define CLK_DOUT_CMU_FSYS0_BUS 98 +#define CLK_DOUT_CMU_FSYS0_DPGTC 99 +#define CLK_DOUT_CMU_FSYS0_MMC_EMBD 100 +#define CLK_DOUT_CMU_FSYS0_UFS_EMBD 101 +#define CLK_DOUT_CMU_FSYS0_USBDRD30 102 +#define CLK_DOUT_CMU_FSYS1_BUS 103 +#define CLK_DOUT_CMU_FSYS1_MMC_CARD 104 +#define CLK_DOUT_CMU_FSYS1_UFS_CARD 105 +#define CLK_DOUT_CMU_G2D_G2D 106 +#define CLK_DOUT_CMU_G2D_JPEG 107 +#define CLK_DOUT_CMU_G3D_SWITCH 108 +#define CLK_DOUT_CMU_HPM 109 +#define CLK_DOUT_CMU_IMEM_BUS 110 +#define CLK_DOUT_CMU_ISPHQ_BUS 111 +#define CLK_DOUT_CMU_ISPLP_BUS 112 +#define CLK_DOUT_CMU_IVA_BUS 113 +#define CLK_DOUT_CMU_MFC_BUS 114 +#define CLK_DOUT_CMU_MODEM_SHARED0 115 +#define CLK_DOUT_CMU_MODEM_SHARED1 116 +#define CLK_DOUT_CMU_PERIC0_BUS 117 +#define CLK_DOUT_CMU_PERIC0_UART_DBG 118 +#define CLK_DOUT_CMU_PERIC0_USI00 119 +#define CLK_DOUT_CMU_PERIC0_USI01 120 +#define CLK_DOUT_CMU_PERIC0_USI02 121 +#define CLK_DOUT_CMU_PERIC0_USI03 122 +#define CLK_DOUT_CMU_PERIC1_BUS 123 +#define CLK_DOUT_CMU_PERIC1_SPEEDY2 124 +#define CLK_DOUT_CMU_PERIC1_SPI_CAM0 125 +#define CLK_DOUT_CMU_PERIC1_SPI_CAM1 126 +#define CLK_DOUT_CMU_PERIC1_UART_BT 127 +#define CLK_DOUT_CMU_PERIC1_USI04 128 +#define CLK_DOUT_CMU_PERIC1_USI05 129 +#define CLK_DOUT_CMU_PERIC1_USI06 130 +#define CLK_DOUT_CMU_PERIC1_USI07 131 +#define CLK_DOUT_CMU_PERIC1_USI08 132 +#define CLK_DOUT_CMU_PERIC1_USI09 133 +#define CLK_DOUT_CMU_PERIC1_USI10 134 +#define CLK_DOUT_CMU_PERIC1_USI11 135 +#define CLK_DOUT_CMU_PERIC1_USI12 136 +#define CLK_DOUT_CMU_PERIC1_USI13 137 +#define CLK_DOUT_CMU_PERIS_BUS 138 +#define CLK_DOUT_CMU_SRDZ_BUS 139 +#define CLK_DOUT_CMU_SRDZ_IMGD 140 +#define CLK_DOUT_CMU_VPU_BUS 141 +#define CLK_DOUT_CMU_SHARED0_DIV2 142 +#define CLK_DOUT_CMU_SHARED0_DIV4 143 +#define CLK_DOUT_CMU_SHARED1_DIV2 144 +#define CLK_DOUT_CMU_SHARED1_DIV4 145 +#define CLK_DOUT_CMU_SHARED2_DIV2 146 +#define CLK_DOUT_CMU_SHARED3_DIV2 147 +#define CLK_DOUT_CMU_SHARED4_DIV2 148 +#define CLK_DOUT_CMU_FSYS1_PCIE 149 +#define CLK_DOUT_CMU_CP2AP_MIF_CLK_DIV2 150 +#define CLK_DOUT_CMU_CMU_OTP 151 +#define CLK_GOUT_CMU_DROOPDETECTOR 152 +#define CLK_GOUT_CMU_MIF_SWITCH 153 +#define CLK_GOUT_CMU_ABOX_CPUABOX 154 +#define CLK_GOUT_CMU_APM_BUS 155 +#define CLK_GOUT_CMU_BUS1_BUS 156 +#define CLK_GOUT_CMU_BUSC_BUS 157 +#define CLK_GOUT_CMU_BUSC_BUSPHSI2C 158 +#define CLK_GOUT_CMU_CAM_BUS 159 +#define CLK_GOUT_CMU_CAM_TPU0 160 +#define CLK_GOUT_CMU_CAM_TPU1 161 +#define CLK_GOUT_CMU_CAM_VRA 162 +#define CLK_GOUT_CMU_CIS_CLK0 163 +#define CLK_GOUT_CMU_CIS_CLK1 164 +#define CLK_GOUT_CMU_CIS_CLK2 165 +#define CLK_GOUT_CMU_CIS_CLK3 166 +#define CLK_GOUT_CMU_CORE_BUS 167 +#define CLK_GOUT_CMU_CPUCL0_SWITCH 168 +#define CLK_GOUT_CMU_CPUCL1_SWITCH 169 +#define CLK_GOUT_CMU_DBG_BUS 170 +#define CLK_GOUT_CMU_DCAM_BUS 171 +#define CLK_GOUT_CMU_DCAM_IMGD 172 +#define CLK_GOUT_CMU_DPU_BUS 173 +#define CLK_GOUT_CMU_DSP_BUS 174 +#define CLK_GOUT_CMU_FSYS0_BUS 175 +#define CLK_GOUT_CMU_FSYS0_DPGTC 176 +#define CLK_GOUT_CMU_FSYS0_MMC_EMBD 177 +#define CLK_GOUT_CMU_FSYS0_UFS_EMBD 178 +#define CLK_GOUT_CMU_FSYS0_USBDRD30 179 +#define CLK_GOUT_CMU_FSYS1_BUS 180 +#define CLK_GOUT_CMU_FSYS1_MMC_CARD 181 +#define CLK_GOUT_CMU_FSYS1_PCIE 182 +#define CLK_GOUT_CMU_FSYS1_UFS_CARD 183 +#define CLK_GOUT_CMU_G2D_G2D 184 +#define CLK_GOUT_CMU_G2D_JPEG 185 +#define CLK_GOUT_CMU_G3D_SWITCH 186 +#define CLK_GOUT_CMU_HPM 187 +#define CLK_GOUT_CMU_IMEM_BUS 188 +#define CLK_GOUT_CMU_ISPHQ_BUS 189 +#define CLK_GOUT_CMU_ISPLP_BUS 190 +#define CLK_GOUT_CMU_IVA_BUS 191 +#define CLK_GOUT_CMU_MFC_BUS 192 +#define CLK_GOUT_CMU_MODEM_SHARED0 193 +#define CLK_GOUT_CMU_MODEM_SHARED1 194 +#define CLK_GOUT_CMU_PERIC0_BUS 195 +#define CLK_GOUT_CMU_PERIC0_UART_DBG 196 +#define CLK_GOUT_CMU_PERIC0_USI00 197 +#define CLK_GOUT_CMU_PERIC0_USI01 198 +#define CLK_GOUT_CMU_PERIC0_USI02 199 +#define CLK_GOUT_CMU_PERIC0_USI03 200 +#define CLK_GOUT_CMU_PERIC1_BUS 201 +#define CLK_GOUT_CMU_PERIC1_SPEEDY2 202 +#define CLK_GOUT_CMU_PERIC1_SPI_CAM0 203 +#define CLK_GOUT_CMU_PERIC1_SPI_CAM1 204 +#define CLK_GOUT_CMU_PERIC1_UART_BT 205 +#define CLK_GOUT_CMU_PERIC1_USI04 206 +#define CLK_GOUT_CMU_PERIC1_USI05 207 +#define CLK_GOUT_CMU_PERIC1_USI06 208 +#define CLK_GOUT_CMU_PERIC1_USI07 209 +#define CLK_GOUT_CMU_PERIC1_USI08 210 +#define CLK_GOUT_CMU_PERIC1_USI09 211 +#define CLK_GOUT_CMU_PERIC1_USI10 212 +#define CLK_GOUT_CMU_PERIC1_USI11 213 +#define CLK_GOUT_CMU_PERIC1_USI12 214 +#define CLK_GOUT_CMU_PERIC1_USI13 215 +#define CLK_GOUT_CMU_PERIS_BUS 216 +#define CLK_GOUT_CMU_SRDZ_BUS 217 +#define CLK_GOUT_CMU_SRDZ_IMGD 218 +#define CLK_GOUT_CMU_VPU_BUS 219 + +/* CMU_PERIS */ +#define CLK_MOUT_PERIS_BUS_USER 1 +#define CLK_MOUT_PERIS_GIC 2 +#define CLK_GOUT_PERIS_CMU_PERIS_PCLK 3 +#define CLK_GOUT_PERIS_AD_AXI_P_PERIS_ACLKM 4 +#define CLK_GOUT_PERIS_AD_AXI_P_PERIS_ACLKS 5 +#define CLK_GOUT_PERIS_AXI2APB_PERISP0_ACLK 6 +#define CLK_GOUT_PERIS_AXI2APB_PERISP1_ACLK 7 +#define CLK_GOUT_PERIS_BUSIF_TMU_PCLK 8 +#define CLK_GOUT_PERIS_GIC_CLK 9 +#define CLK_GOUT_PERIS_LHM_AXI_P_PERIS_I_CLK 10 +#define CLK_GOUT_PERIS_MCT_PCLK 11 +#define CLK_GOUT_PERIS_OTP_CON_BIRA_PCLK 12 +#define CLK_GOUT_PERIS_OTP_CON_TOP_PCLK 13 +#define CLK_GOUT_PERIS_PMU_PERIS_PCLK 14 +#define CLK_GOUT_PERIS_RSTNSYNC_CLK_PERIS_BUSP_CLK 15 +#define CLK_GOUT_PERIS_RSTNSYNC_CLK_PERIS_GIC_CLK 16 +#define CLK_GOUT_PERIS_SYSREG_PERIS_PCLK 17 +#define CLK_GOUT_PERIS_TZPC00_PCLK 18 +#define CLK_GOUT_PERIS_TZPC01_PCLK 19 +#define CLK_GOUT_PERIS_TZPC02_PCLK 20 +#define CLK_GOUT_PERIS_TZPC03_PCLK 21 +#define CLK_GOUT_PERIS_TZPC04_PCLK 22 +#define CLK_GOUT_PERIS_TZPC05_PCLK 23 +#define CLK_GOUT_PERIS_TZPC06_PCLK 24 +#define CLK_GOUT_PERIS_TZPC07_PCLK 25 +#define CLK_GOUT_PERIS_TZPC08_PCLK 26 +#define CLK_GOUT_PERIS_TZPC09_PCLK 27 +#define CLK_GOUT_PERIS_TZPC10_PCLK 28 +#define CLK_GOUT_PERIS_TZPC11_PCLK 29 +#define CLK_GOUT_PERIS_TZPC12_PCLK 30 +#define CLK_GOUT_PERIS_TZPC13_PCLK 31 +#define CLK_GOUT_PERIS_TZPC14_PCLK 32 +#define CLK_GOUT_PERIS_TZPC15_PCLK 33 +#define CLK_GOUT_PERIS_WDT_CLUSTER0_PCLK 34 +#define CLK_GOUT_PERIS_WDT_CLUSTER1_PCLK 35 +#define CLK_GOUT_PERIS_XIU_P_PERIS_ACLK 36 + +/* CMU_FSYS0 */ +#define CLK_MOUT_FSYS0_BUS_USER 1 +#define CLK_MOUT_FSYS0_DPGTC_USER 2 +#define CLK_MOUT_FSYS0_MMC_EMBD_USER 3 +#define CLK_MOUT_FSYS0_UFS_EMBD_USER 4 +#define CLK_MOUT_FSYS0_USBDRD30_USER 5 +#define CLK_GOUT_FSYS0_FSYS0_CMU_FSYS0_PCLK 6 +#define CLK_GOUT_FSYS0_AHBBR_FSYS0_HCLK 7 +#define CLK_GOUT_FSYS0_AXI2AHB_FSYS0_ACLK 8 +#define CLK_GOUT_FSYS0_AXI2AHB_USB_FSYS0_ACLK 9 +#define CLK_GOUT_FSYS0_AXI2APB_FSYS0_ACLK 10 +#define CLK_GOUT_FSYS0_BTM_FSYS0_I_ACLK 11 +#define CLK_GOUT_FSYS0_BTM_FSYS0_I_PCLK 12 +#define CLK_GOUT_FSYS0_DP_LINK_I_GTC_EXT_CLK 13 +#define CLK_GOUT_FSYS0_DP_LINK_I_PCLK 14 +#define CLK_GOUT_FSYS0_ETR_MIU_I_ACLK 15 +#define CLK_GOUT_FSYS0_ETR_MIU_I_PCLK 16 +#define CLK_GOUT_FSYS0_GPIO_FSYS0_PCLK 17 +#define CLK_GOUT_FSYS0_LHM_AXI_D_USBTV_I_CLK 18 +#define CLK_GOUT_FSYS0_LHM_AXI_G_ETR_I_CLK 19 +#define CLK_GOUT_FSYS0_LHM_AXI_P_FSYS0_I_CLK 20 +#define CLK_GOUT_FSYS0_LHS_ACEL_D_FSYS0_I_CLK 21 +#define CLK_GOUT_FSYS0_MMC_EMBD_I_ACLK 22 +#define CLK_GOUT_FSYS0_MMC_EMBD_SDCLKIN 23 +#define CLK_GOUT_FSYS0_PMU_FSYS0_PCLK 24 +#define CLK_GOUT_FSYS0_BCM_FSYS0_ACLK 25 +#define CLK_GOUT_FSYS0_BCM_FSYS0_PCLK 26 +#define CLK_GOUT_FSYS0_RSTNSYNC_CLK_FSYS0_BUS_CLK 27 +#define CLK_GOUT_FSYS0_SYSREG_FSYS0_PCLK 28 +#define CLK_GOUT_FSYS0_UFS_EMBD_I_ACLK 29 +#define CLK_GOUT_FSYS0_UFS_EMBD_I_CLK_UNIPRO 30 +#define CLK_GOUT_FSYS0_UFS_EMBD_I_FMP_CLK 31 +#define CLK_GOUT_FSYS0_USBTV_I_USB30DRD_ACLK 32 +#define CLK_GOUT_FSYS0_USBTV_I_USB30DRD_REF_CLK 33 +#define CLK_GOUT_FSYS0_USBTV_I_USB30DRD_SUSPEND_CLK 34 +#define CLK_GOUT_FSYS0_USBTV_I_USBTVH_AHB_CLK 35 +#define CLK_GOUT_FSYS0_USBTV_I_USBTVH_CORE_CLK 36 +#define CLK_GOUT_FSYS0_USBTV_I_USBTVH_XIU_CLK 37 +#define CLK_GOUT_FSYS0_US_D_FSYS0_USB_ACLK 38 +#define CLK_GOUT_FSYS0_XIU_D_FSYS0_ACLK 39 +#define CLK_GOUT_FSYS0_XIU_D_FSYS0_USB_ACLK 40 +#define CLK_GOUT_FSYS0_XIU_P_FSYS0_ACLK 41 + +/* CMU_FSYS1 */ +#define CLK_MOUT_FSYS1_BUS_USER 1 +#define CLK_MOUT_FSYS1_MMC_CARD_USER 2 +#define CLK_MOUT_FSYS1_PCIE_USER 3 +#define CLK_MOUT_FSYS1_UFS_CARD_USER 4 +#define CLK_GOUT_FSYS1_PCIE_PHY_REF_CLK_IN 5 +#define CLK_GOUT_FSYS1_ADM_AHB_SSS_HCLKM 6 +#define CLK_GOUT_FSYS1_AHBBR_FSYS1_HCLK 7 +#define CLK_GOUT_FSYS1_AXI2AHB_FSYS1_ACLK 8 +#define CLK_GOUT_FSYS1_AXI2APB_FSYS1P0_ACLK 9 +#define CLK_GOUT_FSYS1_AXI2APB_FSYS1P1_ACLK 10 +#define CLK_GOUT_FSYS1_BTM_FSYS1_I_ACLK 11 +#define CLK_GOUT_FSYS1_BTM_FSYS1_I_PCLK 12 +#define CLK_GOUT_FSYS1_FSYS1_CMU_FSYS1_PCLK 13 +#define CLK_GOUT_FSYS1_GPIO_FSYS1_PCLK 14 +#define CLK_GOUT_FSYS1_LHM_AXI_P_FSYS1_I_CLK 15 +#define CLK_GOUT_FSYS1_LHS_ACEL_D_FSYS1_I_CLK 16 +#define CLK_GOUT_FSYS1_MMC_CARD_I_ACLK 17 +#define CLK_GOUT_FSYS1_MMC_CARD_SDCLKIN 18 +#define CLK_GOUT_FSYS1_PCIE_DBI_ACLK_0 19 +#define CLK_GOUT_FSYS1_PCIE_DBI_ACLK_1 20 +#define CLK_GOUT_FSYS1_PCIE_IEEE1500_WRAPPER_FOR_PCIE_PHY_LC_X2_INST_0_I_SCL_APB_PCLK 21 +#define CLK_GOUT_FSYS1_PCIE_MSTR_ACLK_0 22 +#define CLK_GOUT_FSYS1_PCIE_MSTR_ACLK_1 23 +#define CLK_GOUT_FSYS1_PCIE_PCIE_SUB_CTRL_INST_0_I_DRIVER_APB_CLK 24 +#define CLK_GOUT_FSYS1_PCIE_PCIE_SUB_CTRL_INST_1_I_DRIVER_APB_CLK 25 +#define CLK_GOUT_FSYS1_PCIE_PIPE2_DIGITAL_X2_WRAP_INST_0_I_APB_PCLK_SCL 26 +#define CLK_GOUT_FSYS1_PCIE_SLV_ACLK_0 27 +#define CLK_GOUT_FSYS1_PCIE_SLV_ACLK_1 28 +#define CLK_GOUT_FSYS1_PMU_FSYS1_PCLK 29 +#define CLK_GOUT_FSYS1_BCM_FSYS1_ACLK 30 +#define CLK_GOUT_FSYS1_BCM_FSYS1_PCLK 31 +#define CLK_GOUT_FSYS1_RSTNSYNC_CLK_FSYS1_BUS_CLK 32 +#define CLK_GOUT_FSYS1_RTIC_I_ACLK 33 +#define CLK_GOUT_FSYS1_RTIC_I_PCLK 34 +#define CLK_GOUT_FSYS1_SSS_I_ACLK 35 +#define CLK_GOUT_FSYS1_SSS_I_PCLK 36 +#define CLK_GOUT_FSYS1_SYSREG_FSYS1_PCLK 37 +#define CLK_GOUT_FSYS1_TOE_WIFI0_I_CLK 38 +#define CLK_GOUT_FSYS1_TOE_WIFI1_I_CLK 39 +#define CLK_GOUT_FSYS1_UFS_CARD_I_ACLK 40 +#define CLK_GOUT_FSYS1_UFS_CARD_I_CLK_UNIPRO 41 +#define CLK_GOUT_FSYS1_UFS_CARD_I_FMP_CLK 42 +#define CLK_GOUT_FSYS1_XIU_D_FSYS1_ACLK 43 +#define CLK_GOUT_FSYS1_XIU_P_FSYS1_ACLK 44 + +/* CMU_PERIC0 */ +#define CLK_MOUT_PERIC0_BUS_USER 1 +#define CLK_MOUT_PERIC0_UART_DBG_USER 2 +#define CLK_MOUT_PERIC0_USI00_USER 3 +#define CLK_MOUT_PERIC0_USI01_USER 4 +#define CLK_MOUT_PERIC0_USI02_USER 5 +#define CLK_MOUT_PERIC0_USI03_USER 6 +#define CLK_GOUT_PERIC0_PERIC0_CMU_PERIC0_PCLK 7 +#define CLK_GOUT_PERIC0_AXI2APB_PERIC0_ACLK 8 +#define CLK_GOUT_PERIC0_GPIO_PERIC0_PCLK 9 +#define CLK_GOUT_PERIC0_LHM_AXI_P_PERIC0_I_CLK 10 +#define CLK_GOUT_PERIC0_PMU_PERIC0_PCLK 11 +#define CLK_GOUT_PERIC0_PWM_I_PCLK_S0 12 +#define CLK_GOUT_PERIC0_RSTNSYNC_CLK_PERIC0_BUSP_CLK 13 +#define CLK_GOUT_PERIC0_SPEEDY2_TSP_CLK 14 +#define CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK 15 +#define CLK_GOUT_PERIC0_UART_DBG_EXT_UCLK 16 +#define CLK_GOUT_PERIC0_UART_DBG_PCLK 17 +#define CLK_GOUT_PERIC0_USI00_I_PCLK 18 +#define CLK_GOUT_PERIC0_USI00_I_SCLK_USI 19 +#define CLK_GOUT_PERIC0_USI01_I_PCLK 20 +#define CLK_GOUT_PERIC0_USI01_I_SCLK_USI 21 +#define CLK_GOUT_PERIC0_USI02_I_PCLK 22 +#define CLK_GOUT_PERIC0_USI02_I_SCLK_USI 23 +#define CLK_GOUT_PERIC0_USI03_I_PCLK 24 +#define CLK_GOUT_PERIC0_USI03_I_SCLK_USI 25 + +/* CMU_PERIC1 */ +#define CLK_MOUT_PERIC1_BUS_USER 1 +#define CLK_MOUT_PERIC1_SPEEDY2_USER 2 +#define CLK_MOUT_PERIC1_SPI_CAM0_USER 3 +#define CLK_MOUT_PERIC1_SPI_CAM1_USER 4 +#define CLK_MOUT_PERIC1_UART_BT_USER 5 +#define CLK_MOUT_PERIC1_USI04_USER 6 +#define CLK_MOUT_PERIC1_USI05_USER 7 +#define CLK_MOUT_PERIC1_USI06_USER 8 +#define CLK_MOUT_PERIC1_USI07_USER 9 +#define CLK_MOUT_PERIC1_USI08_USER 10 +#define CLK_MOUT_PERIC1_USI09_USER 11 +#define CLK_MOUT_PERIC1_USI10_USER 12 +#define CLK_MOUT_PERIC1_USI11_USER 13 +#define CLK_MOUT_PERIC1_USI12_USER 14 +#define CLK_MOUT_PERIC1_USI13_USER 15 +#define CLK_GOUT_PERIC1_PERIC1_CMU_PERIC1_PCLK 16 +#define CLK_GOUT_PERIC1_RSTNSYNC_CLK_PERIC1_SPEEDY2_CLK 17 +#define CLK_GOUT_PERIC1_AXI2APB_PERIC1P0_ACLK 18 +#define CLK_GOUT_PERIC1_AXI2APB_PERIC1P1_ACLK 19 +#define CLK_GOUT_PERIC1_AXI2APB_PERIC1P2_ACLK 20 +#define CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK 21 +#define CLK_GOUT_PERIC1_HSI2C_CAM0_IPCLK 22 +#define CLK_GOUT_PERIC1_HSI2C_CAM1_IPCLK 23 +#define CLK_GOUT_PERIC1_HSI2C_CAM2_IPCLK 24 +#define CLK_GOUT_PERIC1_HSI2C_CAM3_IPCLK 25 +#define CLK_GOUT_PERIC1_LHM_AXI_P_PERIC1_I_CLK 26 +#define CLK_GOUT_PERIC1_PMU_PERIC1_PCLK 27 +#define CLK_GOUT_PERIC1_RSTNSYNC_CLK_PERIC1_BUSP_CLK 28 +#define CLK_GOUT_PERIC1_SPEEDY2_DDI1_CLK 29 +#define CLK_GOUT_PERIC1_SPEEDY2_DDI1_SCLK 30 +#define CLK_GOUT_PERIC1_SPEEDY2_DDI2_CLK 31 +#define CLK_GOUT_PERIC1_SPEEDY2_DDI2_SCLK 32 +#define CLK_GOUT_PERIC1_SPEEDY2_DDI_CLK 33 +#define CLK_GOUT_PERIC1_SPEEDY2_DDI_SCLK 34 +#define CLK_GOUT_PERIC1_SPEEDY2_TSP1_CLK 35 +#define CLK_GOUT_PERIC1_SPEEDY2_TSP2_CLK 36 +#define CLK_GOUT_PERIC1_SPI_CAM0_PCLK 37 +#define CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK 38 +#define CLK_GOUT_PERIC1_SPI_CAM1_PCLK 39 +#define CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK 40 +#define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK 41 +#define CLK_GOUT_PERIC1_UART_BT_EXT_UCLK 42 +#define CLK_GOUT_PERIC1_UART_BT_PCLK 43 +#define CLK_GOUT_PERIC1_USI04_I_PCLK 44 +#define CLK_GOUT_PERIC1_USI04_I_SCLK_USI 45 +#define CLK_GOUT_PERIC1_USI05_I_PCLK 46 +#define CLK_GOUT_PERIC1_USI05_I_SCLK_USI 47 +#define CLK_GOUT_PERIC1_USI06_I_PCLK 48 +#define CLK_GOUT_PERIC1_USI06_I_SCLK_USI 49 +#define CLK_GOUT_PERIC1_USI07_I_PCLK 50 +#define CLK_GOUT_PERIC1_USI07_I_SCLK_USI 51 +#define CLK_GOUT_PERIC1_USI08_I_PCLK 52 +#define CLK_GOUT_PERIC1_USI08_I_SCLK_USI 53 +#define CLK_GOUT_PERIC1_USI09_I_PCLK 54 +#define CLK_GOUT_PERIC1_USI09_I_SCLK_USI 55 +#define CLK_GOUT_PERIC1_USI10_I_PCLK 56 +#define CLK_GOUT_PERIC1_USI10_I_SCLK_USI 57 +#define CLK_GOUT_PERIC1_USI11_I_PCLK 58 +#define CLK_GOUT_PERIC1_USI11_I_SCLK_USI 59 +#define CLK_GOUT_PERIC1_USI12_I_PCLK 60 +#define CLK_GOUT_PERIC1_USI12_I_SCLK_USI 61 +#define CLK_GOUT_PERIC1_USI13_I_PCLK 62 +#define CLK_GOUT_PERIC1_USI13_I_SCLK_USI 63 +#define CLK_GOUT_PERIC1_XIU_P_PERIC1_ACLK 64 + +#endif /* _DT_BINDINGS_CLOCK_EXYNOS8895_H */ -- cgit v1.2.3-59-g8ed1b From e54eb0465e548a7c6115e336ec5cfec04bbe8747 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Wed, 23 Oct 2024 12:17:30 +0300 Subject: dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible Just like most Samsung Exynos SoCs, Exynos8895 uses almost the same Multi-Core Timer block with no functional differences. Add dedicated samsung,exynos8895-mct compatible to the dt-schema for representing the MCT timer of Exynos8895 SoC. Signed-off-by: Ivaylo Ivanov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20241023091734.538682-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 774b7992a0ca..02d1c355808e 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -33,6 +33,7 @@ properties: - samsung,exynos5420-mct - samsung,exynos5433-mct - samsung,exynos850-mct + - samsung,exynos8895-mct - tesla,fsd-mct - const: samsung,exynos4210-mct @@ -133,6 +134,7 @@ allOf: - samsung,exynos5420-mct - samsung,exynos5433-mct - samsung,exynos850-mct + - samsung,exynos8895-mct then: properties: interrupts: -- cgit v1.2.3-59-g8ed1b From fa986d1073805154888a788eda38d46a796346e8 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Wed, 23 Oct 2024 12:17:31 +0300 Subject: arm64: dts: exynos8895: Add clock management unit nodes Add clock management unit nodes for: - cmu_top, which provides muxes, divs and gates for other CMUs - cmu_peris, which provides clocks for GIC and MCT - cmu_fsys0, which provides clocks for USBDRD30 - cmu_fsys1, which provides clocks for MMC, UFS and PCIE - cmu_peric0, which provides clocks for UART_DBG, USI00 ~ USI03 - cmu_peric1, which provides clocks for SPI_CAM0/1, UART_BT, USI04 ~ USI13 Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20241023091734.538682-3-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos8895.dtsi | 85 ++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi index 223ebd482f10..54037b0dc630 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -5,6 +5,7 @@ * Copyright (c) 2024, Ivaylo Ivanov */ +#include #include / { @@ -159,6 +160,15 @@ reg = <0x10000000 0x24>; }; + cmu_peris: clock-controller@10010000 { + compatible = "samsung,exynos8895-cmu-peris"; + reg = <0x10010000 0x8000>; + #clock-cells = <1>; + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_PERIS_BUS>; + clock-names = "oscclk", "bus"; + }; + gic: interrupt-controller@10201000 { compatible = "arm,gic-400"; reg = <0x10201000 0x1000>, @@ -173,24 +183,91 @@ #size-cells = <1>; }; + cmu_peric0: clock-controller@10400000 { + compatible = "samsung,exynos8895-cmu-peric0"; + reg = <0x10400000 0x8000>; + #clock-cells = <1>; + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>, + <&cmu_top CLK_DOUT_CMU_PERIC0_UART_DBG>, + <&cmu_top CLK_DOUT_CMU_PERIC0_USI00>, + <&cmu_top CLK_DOUT_CMU_PERIC0_USI01>, + <&cmu_top CLK_DOUT_CMU_PERIC0_USI02>, + <&cmu_top CLK_DOUT_CMU_PERIC0_USI03>; + clock-names = "oscclk", "bus", "uart", "usi0", + "usi1", "usi2", "usi3"; + }; + pinctrl_peric0: pinctrl@104d0000 { compatible = "samsung,exynos8895-pinctrl"; reg = <0x104d0000 0x1000>; interrupts = ; }; + cmu_peric1: clock-controller@10800000 { + compatible = "samsung,exynos8895-cmu-peric1"; + reg = <0x10800000 0x8000>; + #clock-cells = <1>; + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>, + <&cmu_top CLK_DOUT_CMU_PERIC1_SPEEDY2>, + <&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM0>, + <&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM1>, + <&cmu_top CLK_DOUT_CMU_PERIC1_UART_BT>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI04>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI05>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI06>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI07>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI08>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI09>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI10>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI11>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI12>, + <&cmu_top CLK_DOUT_CMU_PERIC1_USI13>; + clock-names = "oscclk", "bus", "speedy", "cam0", + "cam1", "uart", "usi4", "usi5", + "usi6", "usi7", "usi8", "usi9", + "usi10", "usi11", "usi12", "usi13"; + }; + pinctrl_peric1: pinctrl@10980000 { compatible = "samsung,exynos8895-pinctrl"; reg = <0x10980000 0x1000>; interrupts = ; }; + cmu_fsys0: clock-controller@11000000 { + compatible = "samsung,exynos8895-cmu-fsys0"; + reg = <0x11000000 0x8000>; + #clock-cells = <1>; + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_FSYS0_BUS>, + <&cmu_top CLK_DOUT_CMU_FSYS0_DPGTC>, + <&cmu_top CLK_DOUT_CMU_FSYS0_MMC_EMBD>, + <&cmu_top CLK_DOUT_CMU_FSYS0_UFS_EMBD>, + <&cmu_top CLK_DOUT_CMU_FSYS0_USBDRD30>; + clock-names = "oscclk", "bus", "dpgtc", "mmc", + "ufs", "usbdrd30"; + }; + pinctrl_fsys0: pinctrl@11050000 { compatible = "samsung,exynos8895-pinctrl"; reg = <0x11050000 0x1000>; interrupts = ; }; + cmu_fsys1: clock-controller@11400000 { + compatible = "samsung,exynos8895-cmu-fsys1"; + reg = <0x11400000 0x8000>; + #clock-cells = <1>; + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_CMU_FSYS1_BUS>, + <&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>, + <&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>, + <&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>; + clock-names = "oscclk", "bus", "pcie", "ufs", "mmc"; + }; + pinctrl_fsys1: pinctrl@11430000 { compatible = "samsung,exynos8895-pinctrl"; reg = <0x11430000 0x1000>; @@ -213,6 +290,14 @@ interrupts = ; }; + cmu_top: clock-controller@15a80000 { + compatible = "samsung,exynos8895-cmu-top"; + reg = <0x15a80000 0x8000>; + #clock-cells = <1>; + clocks = <&oscclk>; + clock-names = "oscclk"; + }; + pmu_system_controller: system-controller@16480000 { compatible = "samsung,exynos8895-pmu", "samsung,exynos7-pmu", "syscon"; -- cgit v1.2.3-59-g8ed1b From 9ad6c3bd1bcbb73e2a5723e13b9d06e2296b07e4 Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Wed, 23 Oct 2024 12:17:32 +0300 Subject: arm64: dts: exynos8895: Add Multi Core Timer (MCT) node MCT has one global timer and 8 CPU local timers. The global timer can generate 4 interrupts, and each local timer can generate an interrupt making 12 interrupts in total. Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20241023091734.538682-4-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos8895.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi index 54037b0dc630..e6c8a49668e2 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -169,6 +169,26 @@ clock-names = "oscclk", "bus"; }; + timer@10040000 { + compatible = "samsung,exynos8895-mct", + "samsung,exynos4210-mct"; + reg = <0x10040000 0x800>; + clocks = <&oscclk>, <&cmu_peris CLK_GOUT_PERIS_MCT_PCLK>; + clock-names = "fin_pll", "mct"; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + }; + gic: interrupt-controller@10201000 { compatible = "arm,gic-400"; reg = <0x10201000 0x1000>, -- cgit v1.2.3-59-g8ed1b From a5541d737c8de71948bcdaee912bcb6b0781af7e Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Wed, 23 Oct 2024 12:17:34 +0300 Subject: arm64: dts: exynos8895: Add spi_0/1 nodes Add nodes for spi_0 (SPI_CAM0) and spi_1 (SPI_CAM1), which allows using them. Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20241023091734.538682-6-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos8895.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi index e6c8a49668e2..9f9ac5359879 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -256,6 +256,36 @@ interrupts = ; }; + spi_0: spi@109d0000 { + compatible = "samsung,exynos8895-spi", + "samsung,exynos850-spi"; + reg = <0x109d0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_PCLK>, + <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK>; + clock-names = "spi", "spi_busclk0"; + interrupts = ; + pinctrl-0 = <&spi0_bus>; + pinctrl-names = "default"; + status = "disabled"; + }; + + spi_1: spi@109e0000 { + compatible = "samsung,exynos8895-spi", + "samsung,exynos850-spi"; + reg = <0x109e0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_PCLK>, + <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK>; + clock-names = "spi", "spi_busclk0"; + interrupts = ; + pinctrl-0 = <&spi1_bus>; + pinctrl-names = "default"; + status = "disabled"; + }; + cmu_fsys0: clock-controller@11000000 { compatible = "samsung,exynos8895-cmu-fsys0"; reg = <0x11000000 0x8000>; -- cgit v1.2.3-59-g8ed1b From 608c8f408dac3d1fd96191494f1a32ba2b1e133d Mon Sep 17 00:00:00 2001 From: Markuss Broks Date: Sat, 26 Oct 2024 23:32:32 +0300 Subject: dt-bindings: arm: cpus: Add Samsung Mongoose M3 Add the compatible for Samsung Mongoose M3 CPU core to the schema. Mongoose M3 (codenamed Meerkat) is the big core in Exynos9810 SoC, designed by Samsung. It implements ARMv8.2-A ISA. Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks Link: https://lore.kernel.org/r/20241026-exynos9810-v3-1-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index c54d20dd9d7e..2fa7d3513da8 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -207,6 +207,7 @@ properties: - qcom,oryon - qcom,scorpion - samsung,mongoose-m2 + - samsung,mongoose-m3 - samsung,mongoose-m5 enable-method: -- cgit v1.2.3-59-g8ed1b From 4c745ade9f2ba0e2ce273b75293d0e9b995dbd74 Mon Sep 17 00:00:00 2001 From: Markuss Broks Date: Sat, 26 Oct 2024 23:32:36 +0300 Subject: dt-bindings: soc: samsung: exynos-pmu: Add exynos9810 compatible Add compatible for Samsung Exynos9810 PMU to the schema. Like on other devices, it contains various registers related to power management and other vital to SoC functions. Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks Link: https://lore.kernel.org/r/20241026-exynos9810-v3-5-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 5c4ba6c65e69..6cdfe7e059a3 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -54,6 +54,7 @@ properties: - enum: - samsung,exynos7885-pmu - samsung,exynos8895-pmu + - samsung,exynos9810-pmu - samsung,exynosautov9-pmu - samsung,exynosautov920-pmu - tesla,fsd-pmu -- cgit v1.2.3-59-g8ed1b From 0a4907eea61d1b7d602a817f6c1de31609c48367 Mon Sep 17 00:00:00 2001 From: Markuss Broks Date: Sat, 26 Oct 2024 23:32:37 +0300 Subject: dt-bindings: arm: samsung: Document Exynos9810 and starlte board binding Add the compatibles for Exynos9810 SoC and samsung,starlte board to the list of boards. Samsung Galaxy S9 (SM-G960F, codenamed starlte) is a mobile phone, released in 2018. Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks Link: https://lore.kernel.org/r/20241026-exynos9810-v3-6-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index d25a17e69725..b5ba5ffc36d6 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -230,6 +230,12 @@ properties: - samsung,dreamlte # Samsung Galaxy S8 (SM-G950F) - const: samsung,exynos8895 + - description: Exynos9810 based boards + items: + - enum: + - samsung,starlte # Samsung Galaxy S9 (SM-G960F) + - const: samsung,exynos9810 + - description: Exynos990 based boards items: - enum: -- cgit v1.2.3-59-g8ed1b