From 92575a2182376e1244fe0c45e85158f5ebbd7b51 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 19 Feb 2025 08:52:13 +1300 Subject: dt-bindings: net: Add switch ports and interrupts to RTL9300 Add bindings for the ethernet-switch and interrupt properties for the RTL9300. Signed-off-by: Chris Packham Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250218195216.1034220-3-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski --- .../bindings/net/realtek,rtl9301-switch.yaml | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml') diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml index d0a93d5f03aa..5d29647bea2d 100644 --- a/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml +++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml @@ -14,6 +14,8 @@ description: number of different peripherals are accessed through a common register block, represented here as a syscon node. +$ref: ethernet-switch.yaml#/$defs/ethernet-ports + properties: compatible: items: @@ -28,12 +30,23 @@ properties: reg: maxItems: 1 + interrupts: + maxItems: 2 + + interrupt-names: + items: + - const: switch + - const: nic + '#address-cells': const: 1 '#size-cells': const: 1 + ethernet-ports: + type: object + patternProperties: 'reboot@[0-9a-f]+$': $ref: /schemas/power/reset/syscon-reboot.yaml# @@ -44,6 +57,8 @@ patternProperties: required: - compatible - reg + - interrupts + - interrupt-names additionalProperties: false @@ -52,6 +67,9 @@ examples: ethernet-switch@1b000000 { compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd"; reg = <0x1b000000 0x10000>; + interrupt-parent = <&intc>; + interrupts = <23>, <24>; + interrupt-names = "switch", "nic"; #address-cells = <1>; #size-cells = <1>; @@ -110,5 +128,17 @@ examples: }; }; }; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + port@1 { + reg = <1>; + }; + }; }; -- cgit v1.2.3-59-g8ed1b