From 91f3fd1124e002f970ef21c2459bf2ba4ac080ee Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 28 May 2020 15:59:02 +0200 Subject: dt-bindings: net: rename the bindings document for MediaTek STAR EMAC The driver itself was renamed before getting merged into mainline, but the binding document kept the old name. This makes both names consistent. Signed-off-by: Bartosz Golaszewski Acked-by: Rob Herring Signed-off-by: David S. Miller --- .../devicetree/bindings/net/mediatek,eth-mac.yaml | 89 ---------------------- .../bindings/net/mediatek,star-emac.yaml | 89 ++++++++++++++++++++++ 2 files changed, 89 insertions(+), 89 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/mediatek,eth-mac.yaml create mode 100644 Documentation/devicetree/bindings/net/mediatek,star-emac.yaml (limited to 'Documentation/devicetree/bindings') diff --git a/Documentation/devicetree/bindings/net/mediatek,eth-mac.yaml b/Documentation/devicetree/bindings/net/mediatek,eth-mac.yaml deleted file mode 100644 index f85d91a9d6e5..000000000000 --- a/Documentation/devicetree/bindings/net/mediatek,eth-mac.yaml +++ /dev/null @@ -1,89 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/net/mediatek,eth-mac.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: MediaTek STAR Ethernet MAC Controller - -maintainers: - - Bartosz Golaszewski - -description: - This Ethernet MAC is used on the MT8* family of SoCs from MediaTek. - It's compliant with 802.3 standards and supports half- and full-duplex - modes with flow-control as well as CRC offloading and VLAN tags. - -allOf: - - $ref: "ethernet-controller.yaml#" - -properties: - compatible: - enum: - - mediatek,mt8516-eth - - mediatek,mt8518-eth - - mediatek,mt8175-eth - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - clocks: - minItems: 3 - maxItems: 3 - - clock-names: - additionalItems: false - items: - - const: core - - const: reg - - const: trans - - mediatek,pericfg: - $ref: /schemas/types.yaml#definitions/phandle - description: - Phandle to the device containing the PERICFG register range. This is used - to control the MII mode. - - mdio: - type: object - description: - Creates and registers an MDIO bus. - -required: - - compatible - - reg - - interrupts - - clocks - - clock-names - - mediatek,pericfg - - phy-handle - -examples: - - | - #include - #include - - ethernet: ethernet@11180000 { - compatible = "mediatek,mt8516-eth"; - reg = <0x11180000 0x1000>; - mediatek,pericfg = <&pericfg>; - interrupts = ; - clocks = <&topckgen CLK_TOP_RG_ETH>, - <&topckgen CLK_TOP_66M_ETH>, - <&topckgen CLK_TOP_133M_ETH>; - clock-names = "core", "reg", "trans"; - phy-handle = <ð_phy>; - phy-mode = "rmii"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - eth_phy: ethernet-phy@0 { - reg = <0>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml b/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml new file mode 100644 index 000000000000..aea88e621792 --- /dev/null +++ b/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek STAR Ethernet MAC Controller + +maintainers: + - Bartosz Golaszewski + +description: + This Ethernet MAC is used on the MT8* family of SoCs from MediaTek. + It's compliant with 802.3 standards and supports half- and full-duplex + modes with flow-control as well as CRC offloading and VLAN tags. + +allOf: + - $ref: "ethernet-controller.yaml#" + +properties: + compatible: + enum: + - mediatek,mt8516-eth + - mediatek,mt8518-eth + - mediatek,mt8175-eth + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + additionalItems: false + items: + - const: core + - const: reg + - const: trans + + mediatek,pericfg: + $ref: /schemas/types.yaml#definitions/phandle + description: + Phandle to the device containing the PERICFG register range. This is used + to control the MII mode. + + mdio: + type: object + description: + Creates and registers an MDIO bus. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - mediatek,pericfg + - phy-handle + +examples: + - | + #include + #include + + ethernet: ethernet@11180000 { + compatible = "mediatek,mt8516-eth"; + reg = <0x11180000 0x1000>; + mediatek,pericfg = <&pericfg>; + interrupts = ; + clocks = <&topckgen CLK_TOP_RG_ETH>, + <&topckgen CLK_TOP_66M_ETH>, + <&topckgen CLK_TOP_133M_ETH>; + clock-names = "core", "reg", "trans"; + phy-handle = <ð_phy>; + phy-mode = "rmii"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy@0 { + reg = <0>; + }; + }; + }; -- cgit v1.2.3-59-g8ed1b