From 5b8adc815b80eb66d1a028ec7ce0d56ce6c7a81a Mon Sep 17 00:00:00 2001 From: Biju Das Date: Fri, 2 Sep 2022 07:27:52 +0100 Subject: ARM: dts: r9a06g032-rzn1d400-db: Enable CAN1 The CN10/CN11 on RZ/N1-EB board are headers to add jumpers to select which CAN interface to route to the real CAN connector J16. For a normal use case either we need to wire CAN1 or CAN2, but not both. This patch enables CAN1 and disables CAN2 by default assuming CN10/CN11 is wired for CAN1. Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20220902062752.56841-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts index 4bf813335e21..c18bbd7141c4 100644 --- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts @@ -26,6 +26,22 @@ }; }; +&can0 { + pinctrl-0 = <&pins_can0>; + pinctrl-names = "default"; + + /* Assuming CN10/CN11 are wired for CAN1 */ + status = "okay"; +}; + +&can1 { + pinctrl-0 = <&pins_can1>; + pinctrl-names = "default"; + + /* Please only enable can0 or can1, depending on CN10/CN11 */ + /* status = "okay"; */ +}; + ð_miic { status = "okay"; renesas,miic-switch-portin = ; @@ -52,6 +68,18 @@ }; &pinctrl{ + pins_can0: pins_can0 { + pinmux = , /* CAN0_TXD */ + ; /* CAN0_RXD */ + drive-strength = <6>; + }; + + pins_can1: pins_can1 { + pinmux = , /* CAN1_TXD */ + ; /* CAN1_RXD */ + drive-strength = <6>; + }; + pins_eth3: pins_eth3 { pinmux = , , -- cgit v1.2.3-59-g8ed1b