From 35dbb74aa752cff90e8dac1a24ed2a452aed0251 Mon Sep 17 00:00:00 2001 From: Rick Chen Date: Mon, 11 Dec 2017 15:53:15 +0800 Subject: clocksource/drivers/atcpit100: Add andestech atcpit100 timer ATCPIT100 is often used on the Andes architecture, This timer provide 4 PIT channels. Each PIT channel is a multi-function timer, can be configured as 32,16,8 bit timers or PWM as well. For system timer it will set channel 1 32-bit timer0 as clock source and count downwards until underflow and restart again. It also set channel 0 32-bit timer0 as clock event and count downwards until condition match. It will generate an interrupt for handling periodically. Signed-off-by: Rick Chen Signed-off-by: Greentime Hu Reviewed-by: Linus Walleij Add andestech atcpit100 timer --- drivers/clocksource/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clocksource/Makefile') diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index d6dec4489d66..a79523b22e52 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -76,3 +76,4 @@ obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o obj-$(CONFIG_H8300_TPU) += h8300_tpu.o obj-$(CONFIG_CLKSRC_ST_LPC) += clksrc_st_lpc.o obj-$(CONFIG_X86_NUMACHIP) += numachip.o +obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o -- cgit v1.2.3-59-g8ed1b