From 3f66bf401e9fde1c35bb8b02dd7975659c40411d Mon Sep 17 00:00:00 2001 From: Nirmoy Das Date: Mon, 9 Nov 2020 17:04:51 +0100 Subject: drm/amdgpu: fix compute queue priority if num_kcq is less than 4 Compute queues are configurable with module param, num_kcq. amdgpu_gfx_is_high_priority_compute_queue was setting 1st 4 queues to high priority queue leaving a null drm scheduler in adev->gpu_sched[hw_ip]["normal_prio"].sched if num_kcq < 5. This patch tries to fix it by alternating compute queue priority between normal and high priority. Fixes: 33abcb1f5a1719b1c (drm/amdgpu: set compute queue priority at mqd_init) Signed-off-by: Nirmoy Das Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index e584f48f3b54..97a8f786cf85 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -193,10 +193,14 @@ static bool amdgpu_gfx_is_multipipe_capable(struct amdgpu_device *adev) } bool amdgpu_gfx_is_high_priority_compute_queue(struct amdgpu_device *adev, - int queue) + int pipe, int queue) { - /* Policy: make queue 0 of each pipe as high priority compute queue */ - return (queue == 0); + bool multipipe_policy = amdgpu_gfx_is_multipipe_capable(adev); + int cond; + /* Policy: alternate between normal and high priority */ + cond = multipipe_policy ? pipe : queue; + + return ((cond % 2) != 0); } -- cgit v1.2.3-59-g8ed1b From d90a53d65ad207d8eb73445fc4ceef461a98f861 Mon Sep 17 00:00:00 2001 From: Prike Liang Date: Wed, 9 Sep 2020 11:08:00 +0800 Subject: drm/amdgpu: add amdgpu_gfx_state_change_set() set gfx power change entry (v2) The new amdgpu_gfx_state_change_set() funtion can support set GFX power change status to D0/D3. v2: squash in warning fix (Alex) Signed-off-by: Prike Liang Acked-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 20 ++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 7 +++++++ drivers/gpu/drm/amd/include/kgd_pp_interface.h | 1 + drivers/gpu/drm/amd/pm/inc/hwmgr.h | 1 + drivers/gpu/drm/amd/pm/inc/rv_ppsmc.h | 3 ++- drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c | 19 +++++++++++++++++++ drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 8 ++++++++ 7 files changed, 58 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 97a8f786cf85..380dd3a1baf4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -819,3 +819,23 @@ int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev) } return amdgpu_num_kcq; } + +/* amdgpu_gfx_state_change_set - Handle gfx power state change set + * @adev: amdgpu_device pointer + * @state: gfx power state(1 -sGpuChangeState_D0Entry and 2 -sGpuChangeState_D3Entry) + * + */ + +void amdgpu_gfx_state_change_set(struct amdgpu_device *adev, enum gfx_change_state state) +{ + + mutex_lock(&adev->pm.mutex); + + if (adev->powerplay.pp_funcs && + adev->powerplay.pp_funcs->gfx_state_change_set) + ((adev)->powerplay.pp_funcs->gfx_state_change_set( + (adev)->powerplay.pp_handle, state)); + + mutex_unlock(&adev->pm.mutex); + +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 671d4b37c397..6b5a8f4642cc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -47,6 +47,12 @@ enum gfx_pipe_priority { AMDGPU_GFX_PIPE_PRIO_MAX }; +/* Argument for PPSMC_MSG_GpuChangeState */ +enum gfx_change_state { + sGpuChangeState_D0Entry = 1, + sGpuChangeState_D3Entry, +}; + #define AMDGPU_GFX_QUEUE_PRIORITY_MINIMUM 0 #define AMDGPU_GFX_QUEUE_PRIORITY_MAXIMUM 15 @@ -394,4 +400,5 @@ int amdgpu_gfx_cp_ecc_error_irq(struct amdgpu_device *adev, uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev); +void amdgpu_gfx_state_change_set(struct amdgpu_device *adev, enum gfx_change_state state); #endif diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h index 94132c70d7af..f775aac6c1bd 100644 --- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h +++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h @@ -285,6 +285,7 @@ struct amd_pm_funcs { int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size); int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state); int (*smu_i2c_bus_access)(void *handle, bool acquire); + int (*gfx_state_change_set)(void *handle, uint32_t state); /* export to DC */ u32 (*get_sclk)(void *handle, bool low); u32 (*get_mclk)(void *handle, bool low); diff --git a/drivers/gpu/drm/amd/pm/inc/hwmgr.h b/drivers/gpu/drm/amd/pm/inc/hwmgr.h index 7e29ec2902dc..1bb379498a12 100644 --- a/drivers/gpu/drm/amd/pm/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/pm/inc/hwmgr.h @@ -366,6 +366,7 @@ struct pp_hwmgr_func { int (*disable_power_features_for_compute_performance)(struct pp_hwmgr *hwmgr, bool disable); ssize_t (*get_gpu_metrics)(struct pp_hwmgr *hwmgr, void **table); + int (*gfx_state_change)(struct pp_hwmgr *hwmgr, uint32_t state); }; struct pp_table_func { diff --git a/drivers/gpu/drm/amd/pm/inc/rv_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/rv_ppsmc.h index df4677da736c..4c7e08ba5fa4 100644 --- a/drivers/gpu/drm/amd/pm/inc/rv_ppsmc.h +++ b/drivers/gpu/drm/amd/pm/inc/rv_ppsmc.h @@ -83,7 +83,8 @@ #define PPSMC_MSG_SetSoftMaxVcn 0x34 #define PPSMC_MSG_PowerGateMmHub 0x35 #define PPSMC_MSG_SetRccPfcPmeRestoreRegister 0x36 -#define PPSMC_Message_Count 0x37 +#define PPSMC_MSG_GpuChangeState 0x37 +#define PPSMC_Message_Count 0x42 typedef uint16_t PPSMC_Result; typedef int PPSMC_Msg; diff --git a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c index eab9768029c1..e0d288208220 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c @@ -1629,6 +1629,24 @@ static ssize_t pp_get_gpu_metrics(void *handle, void **table) return size; } +static int pp_gfx_state_change_set(void *handle, uint32_t state) +{ + struct pp_hwmgr *hwmgr = handle; + + if (!hwmgr || !hwmgr->pm_en) + return -EINVAL; + + if (hwmgr->hwmgr_func->gfx_state_change == NULL) { + pr_info_ratelimited("%s was not implemented.\n", __func__); + return -EINVAL; + } + + mutex_lock(&hwmgr->smu_lock); + hwmgr->hwmgr_func->gfx_state_change(hwmgr, state); + mutex_unlock(&hwmgr->smu_lock); + return 0; +} + static const struct amd_pm_funcs pp_dpm_funcs = { .load_firmware = pp_dpm_load_fw, .wait_for_fw_loading_complete = pp_dpm_fw_loading_complete, @@ -1691,4 +1709,5 @@ static const struct amd_pm_funcs pp_dpm_funcs = { .set_df_cstate = pp_set_df_cstate, .set_xgmi_pstate = pp_set_xgmi_pstate, .get_gpu_metrics = pp_get_gpu_metrics, + .gfx_state_change_set = pp_gfx_state_change_set, }; diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c index 133a08444943..04226b1544e4 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c @@ -1439,6 +1439,13 @@ static int smu10_set_fine_grain_clk_vol(struct pp_hwmgr *hwmgr, return 0; } +static int smu10_gfx_state_change(struct pp_hwmgr *hwmgr, uint32_t state) +{ + smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GpuChangeState, state, NULL); + + return 0; +} + static const struct pp_hwmgr_func smu10_hwmgr_funcs = { .backend_init = smu10_hwmgr_backend_init, .backend_fini = smu10_hwmgr_backend_fini, @@ -1485,6 +1492,7 @@ static const struct pp_hwmgr_func smu10_hwmgr_funcs = { .set_power_profile_mode = smu10_set_power_profile_mode, .asic_reset = smu10_asic_reset, .set_fine_grain_clk_vol = smu10_set_fine_grain_clk_vol, + .gfx_state_change = smu10_gfx_state_change, }; int smu10_init_function_pointers(struct pp_hwmgr *hwmgr) -- cgit v1.2.3-59-g8ed1b From 8279bb4ec78568a34c4102e723df170b49fb7c33 Mon Sep 17 00:00:00 2001 From: Prike Liang Date: Tue, 20 Oct 2020 15:58:30 +0800 Subject: drm/amd/pm: add gfx_state_change_set() for rn gfx power switch (v2) The gfx_state_change_set() funtion can support set GFX power change status to D0/D3. v2: make sure to register callback (Alex) Signed-off-by: Prike Liang Reviewed-by: Alex Deucher Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 18 +++++++++--------- drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 2 ++ drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 12 ++++++++++++ drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 7 +++++++ 4 files changed, 30 insertions(+), 9 deletions(-) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 380dd3a1baf4..cd2c676a2797 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -828,14 +828,14 @@ int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev) void amdgpu_gfx_state_change_set(struct amdgpu_device *adev, enum gfx_change_state state) { - - mutex_lock(&adev->pm.mutex); - - if (adev->powerplay.pp_funcs && - adev->powerplay.pp_funcs->gfx_state_change_set) + if (is_support_sw_smu(adev)) { + smu_gfx_state_change_set(&adev->smu, state); + } else { + mutex_lock(&adev->pm.mutex); + if (adev->powerplay.pp_funcs && + adev->powerplay.pp_funcs->gfx_state_change_set) ((adev)->powerplay.pp_funcs->gfx_state_change_set( - (adev)->powerplay.pp_handle, state)); - - mutex_unlock(&adev->pm.mutex); - + (adev)->powerplay.pp_handle, state)); + mutex_unlock(&adev->pm.mutex); + } } diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h index 9724d6fd82f4..ae8ff7b07932 100644 --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h @@ -576,6 +576,7 @@ struct pptable_funcs { int (*post_init)(struct smu_context *smu); void (*interrupt_work)(struct smu_context *smu); int (*gpo_control)(struct smu_context *smu, bool enablement); + int (*gfx_state_change_set)(struct smu_context *smu, uint32_t state); }; typedef enum { @@ -764,6 +765,7 @@ int smu_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value); ssize_t smu_sys_get_gpu_metrics(struct smu_context *smu, void **table); int smu_enable_mgpu_fan_boost(struct smu_context *smu); +int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state); #endif #endif diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 39990790ed67..7b698c5ddad0 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -2529,3 +2529,15 @@ int smu_enable_mgpu_fan_boost(struct smu_context *smu) return ret; } + +int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state) +{ + int ret = 0; + + mutex_lock(&smu->mutex); + if (smu->ppt_funcs->gfx_state_change_set) + ret = smu->ppt_funcs->gfx_state_change_set(smu, state); + mutex_unlock(&smu->mutex); + + return ret; +} diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c index 66c1026489be..46c44f0abdfb 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c @@ -1136,6 +1136,12 @@ static ssize_t renoir_get_gpu_metrics(struct smu_context *smu, return sizeof(struct gpu_metrics_v2_0); } +static int renoir_gfx_state_change_set(struct smu_context *smu, uint32_t state) +{ + + return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GpuChangeState, state, NULL); +} + static const struct pptable_funcs renoir_ppt_funcs = { .set_power_state = NULL, .print_clk_levels = renoir_print_clk_levels, @@ -1171,6 +1177,7 @@ static const struct pptable_funcs renoir_ppt_funcs = { .get_pp_feature_mask = smu_cmn_get_pp_feature_mask, .set_pp_feature_mask = smu_cmn_set_pp_feature_mask, .get_gpu_metrics = renoir_get_gpu_metrics, + .gfx_state_change_set = renoir_gfx_state_change_set, }; void renoir_set_ppt_funcs(struct smu_context *smu) -- cgit v1.2.3-59-g8ed1b