From 7d5b10fcb81e511ddf79c1c6b7f6efb282f80680 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 6 Apr 2020 15:42:01 -0400 Subject: PCI/P2PDMA: Add AMD Zen Raven and Renoir Root Ports to whitelist MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the hardware architect, pre-Zen parts support p2p writes and Zen parts support both p2p reads and writes. Add entries for Zen parts Raven (0x15d0) and Renoir (0x1630). Link: https://lore.kernel.org/r/20200406194201.846411-1-alexander.deucher@amd.com Signed-off-by: Alex Deucher Signed-off-by: Bjorn Helgaas Acked-by: Christian König Acked-by: Huang Rui --- drivers/pci/p2pdma.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/pci/p2pdma.c') diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c index b73b10bce0df..e8e444eeb1cd 100644 --- a/drivers/pci/p2pdma.c +++ b/drivers/pci/p2pdma.c @@ -282,6 +282,8 @@ static const struct pci_p2pdma_whitelist_entry { } pci_p2pdma_whitelist[] = { /* AMD ZEN */ {PCI_VENDOR_ID_AMD, 0x1450, 0}, + {PCI_VENDOR_ID_AMD, 0x15d0, 0}, + {PCI_VENDOR_ID_AMD, 0x1630, 0}, /* Intel Xeon E5/Core i7 */ {PCI_VENDOR_ID_INTEL, 0x3c00, REQ_SAME_HOST_BRIDGE}, -- cgit v1.2.3-59-g8ed1b