From 738c58ccac386bb068cba2446bd9dbabeae09b62 Mon Sep 17 00:00:00 2001 From: Kamel Bouhara Date: Sat, 11 Jul 2020 01:08:08 +0200 Subject: ARM: at91: add atmel tcb capabilities Some atmel socs have extra tcb capabilities that allow using a generic clock source or enabling a quadrature decoder. Signed-off-by: Kamel Bouhara Signed-off-by: Alexandre Belloni Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200710230813.1005150-5-alexandre.belloni@bootlin.com --- include/soc/at91/atmel_tcb.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/soc/at91/atmel_tcb.h b/include/soc/at91/atmel_tcb.h index c3c7200ce151..1d7071dc0bca 100644 --- a/include/soc/at91/atmel_tcb.h +++ b/include/soc/at91/atmel_tcb.h @@ -36,9 +36,14 @@ struct clk; /** * struct atmel_tcb_config - SoC data for a Timer/Counter Block * @counter_width: size in bits of a timer counter register + * @has_gclk: boolean indicating if a timer counter has a generic clock + * @has_qdec: boolean indicating if a timer counter has a quadrature + * decoder. */ struct atmel_tcb_config { size_t counter_width; + bool has_gclk; + bool has_qdec; }; /** -- cgit v1.2.3-59-g8ed1b From ac756d05c468e535380c7b4b102105793c5d095e Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Thu, 23 Jul 2020 01:18:03 +0800 Subject: dt-bindings: timer: Add Ingenic X1000 OST bindings. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the OST bindings for the X1000 SoC from Ingenic. Tested-by: 周正 (Zhou Zheng) Signed-off-by: 周琰杰 (Zhou Yanjie) Reviewed-by: Paul Cercueil Reviewed-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200722171804.97559-2-zhouyanjie@wanyeetech.com --- .../devicetree/bindings/timer/ingenic,sysost.yaml | 63 ++++++++++++++++++++++ include/dt-bindings/clock/ingenic,sysost.h | 12 +++++ 2 files changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/ingenic,sysost.yaml create mode 100644 include/dt-bindings/clock/ingenic,sysost.h (limited to 'include') diff --git a/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml b/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml new file mode 100644 index 000000000000..df3eb76045e0 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/ingenic,sysost.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for SYSOST in Ingenic XBurst family SoCs + +maintainers: + - 周琰杰 (Zhou Yanjie) + +description: + The SYSOST in an Ingenic SoC provides one 64bit timer for clocksource + and one or more 32bit timers for clockevent. + +properties: + "#clock-cells": + const: 1 + + compatible: + enum: + - ingenic,x1000-ost + - ingenic,x2000-ost + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: ost + + interrupts: + maxItems: 1 + +required: + - "#clock-cells" + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +examples: + - | + #include + + ost: timer@12000000 { + compatible = "ingenic,x1000-ost"; + reg = <0x12000000 0x3c>; + + #clock-cells = <1>; + + clocks = <&cgu X1000_CLK_OST>; + clock-names = "ost"; + + interrupt-parent = <&cpuintc>; + interrupts = <3>; + }; +... diff --git a/include/dt-bindings/clock/ingenic,sysost.h b/include/dt-bindings/clock/ingenic,sysost.h new file mode 100644 index 000000000000..9ac88e90babf --- /dev/null +++ b/include/dt-bindings/clock/ingenic,sysost.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,tcu DT binding. + */ + +#ifndef __DT_BINDINGS_CLOCK_INGENIC_OST_H__ +#define __DT_BINDINGS_CLOCK_INGENIC_OST_H__ + +#define OST_CLK_PERCPU_TIMER 0 +#define OST_CLK_GLOBAL_TIMER 1 + +#endif /* __DT_BINDINGS_CLOCK_INGENIC_OST_H__ */ -- cgit v1.2.3-59-g8ed1b